76babe507b
da - Direct Access Devices (disks, optical devices, SS disks) cd - CDROM (or devices that can act like them, WORM, CD-RW, etc) ch - Medium Changer devices. sa - Sequential Access Devices (tape drives) pass - Application pass-thru driver targ - Target Mode "Processor Target" Emulator pt - Processor Target Devices (scanners, cpus, etc.) Submitted by: The CAM Team
392 lines
12 KiB
C
392 lines
12 KiB
C
/*
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* Structures and definitions for SCSI commands to Direct Access Devices
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*/
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/*
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* Some lines of this file come from a file of the name "scsi.h"
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* distributed by OSF as part of mach2.5,
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* so the following disclaimer has been kept.
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*
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* Copyright 1990 by Open Software Foundation,
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* Grenoble, FRANCE
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*
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* All Rights Reserved
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*
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* Permission to use, copy, modify, and distribute this software and
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* its documentation for any purpose and without fee is hereby granted,
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* provided that the above copyright notice appears in all copies and
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* that both the copyright notice and this permission notice appear in
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* supporting documentation, and that the name of OSF or Open Software
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* Foundation not be used in advertising or publicity pertaining to
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* distribution of the software without specific, written prior
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* permission.
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*
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* OSF DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE
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* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS,
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* IN NO EVENT SHALL OSF BE LIABLE FOR ANY SPECIAL, INDIRECT, OR
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* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM
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* LOSS OF USE, DATA OR PROFITS, WHETHER IN ACTION OF CONTRACT,
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* NEGLIGENCE, OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION
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* WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*/
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/*
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* Largely written by Julian Elischer (julian@tfs.com)
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* for TRW Financial Systems.
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*
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* TRW Financial Systems, in accordance with their agreement with Carnegie
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* Mellon University, makes this software available to CMU to distribute
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* or use in any manner that they see fit as long as this message is kept with
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* the software. For this reason TFS also grants any other persons or
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* organisations permission to use or modify this software.
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*
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* TFS supplies this software to be publicly redistributed
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* on the understanding that TFS is not responsible for the correct
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* functioning of this software in any circumstances.
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*
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* Ported to run under 386BSD by Julian Elischer (julian@tfs.com) Sept 1992
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*
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* $Id$
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*/
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#ifndef _SCSI_SCSI_DA_H
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#define _SCSI_SCSI_DA_H 1
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#include <sys/cdefs.h>
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struct scsi_rezero_unit
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{
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u_int8_t opcode;
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#define SRZU_LUN_MASK 0xE0
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u_int8_t byte2;
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u_int8_t reserved[3];
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u_int8_t control;
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};
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struct scsi_reassign_blocks
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{
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u_int8_t opcode;
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u_int8_t byte2;
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u_int8_t unused[3];
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u_int8_t control;
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};
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struct scsi_rw_6
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{
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u_int8_t opcode;
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u_int8_t addr[3];
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/* only 5 bits are valid in the MSB address byte */
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#define SRW_TOPADDR 0x1F
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u_int8_t length;
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u_int8_t control;
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};
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struct scsi_rw_10
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{
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u_int8_t opcode;
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#define SRW10_RELADDR 0x01
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#define SRW10_FUA 0x08
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#define SRW10_DPO 0x10
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u_int8_t byte2;
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u_int8_t addr[4];
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u_int8_t reserved;
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u_int8_t length[2];
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u_int8_t control;
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};
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struct scsi_rw_12
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{
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u_int8_t opcode;
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#define SRW12_RELADDR 0x01
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#define SRW12_FUA 0x08
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#define SRW12_DPO 0x10
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u_int8_t byte2;
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u_int8_t addr[4];
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u_int8_t reserved;
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u_int8_t length[4];
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u_int8_t control;
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};
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struct scsi_start_stop_unit
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{
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u_int8_t opcode;
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u_int8_t byte2;
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#define SSS_IMMED 0x01
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u_int8_t reserved[2];
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u_int8_t how;
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#define SSS_START 0x01
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#define SSS_LOEJ 0x02
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u_int8_t control;
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};
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struct scsi_read_defect_data_10
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{
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u_int8_t opcode;
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/*
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* The most significant 3 bits are the LUN, the other 5 are
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* reserved.
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*/
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#define SRDD10_LUN_MASK 0xE0
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u_int8_t byte2;
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#define SRDD10_GLIST 0x08
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#define SRDD10_PLIST 0x10
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#define SRDD10_DLIST_FORMAT_MASK 0x07
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#define SRDD10_BLOCK_FORMAT 0x00
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#define SRDD10_BYTES_FROM_INDEX_FORMAT 0x04
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#define SRDD10_PHYSICAL_SECTOR_FORMAT 0x05
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u_int8_t format;
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u_int8_t reserved[4];
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u_int8_t alloc_length[2];
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u_int8_t control;
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};
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struct scsi_read_defect_data_12
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{
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u_int8_t opcode;
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/*
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* The most significant 3 bits are the LUN, the other 5 are
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* reserved.
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*/
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#define SRDD12_LUN_MASK 0xE0
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u_int8_t byte2;
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#define SRDD12_GLIST 0x08
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#define SRDD12_PLIST 0x10
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#define SRDD12_DLIST_FORMAT_MASK 0x07
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#define SRDD12_BLOCK_FORMAT 0x00
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#define SRDD12_BYTES_FROM_INDEX_FORMAT 0x04
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#define SRDD12_PHYSICAL_SECTOR_FORMAT 0x05
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u_int8_t format;
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u_int8_t reserved[4];
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u_int8_t alloc_length[4];
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u_int8_t control;
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};
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/*
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* Opcodes
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*/
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#define REZERO_UNIT 0x01
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#define REASSIGN_BLOCKS 0x07
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#define READ_6 0x08
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#define WRITE_6 0x0a
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#define MODE_SELECT 0x15
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#define MODE_SENSE 0x1a
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#define START_STOP_UNIT 0x1b
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#define READ_10 0x28
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#define WRITE_10 0x2a
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#define READ_DEFECT_DATA_10 0x37
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#define READ_12 0xa8
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#define WRITE_12 0xaa
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#define READ_DEFECT_DATA_12 0xb7
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struct scsi_reassign_blocks_data
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{
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u_int8_t reserved[2];
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u_int8_t length[2];
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struct {
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u_int8_t dlbaddr[4]; /* defect logical block address */
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} defect_descriptor[1];
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};
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/*
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* This is the list header for the READ DEFECT DATA(10) command above.
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* It may be a bit wrong to append the 10 at the end of the data structure,
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* since it's only 4 bytes but it does tie it to the 10 byte command.
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*/
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struct scsi_read_defect_data_hdr_10
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{
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u_int8_t reserved;
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#define SRDDH10_GLIST 0x08
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#define SRDDH10_PLIST 0x10
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#define SRDDH10_DLIST_FORMAT_MASK 0x07
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#define SRDDH10_BLOCK_FORMAT 0x00
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#define SRDDH10_BYTES_FROM_INDEX_FORMAT 0x04
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#define SRDDH10_PHYSICAL_SECTOR_FORMAT 0x05
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u_int8_t format;
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u_int8_t length[2];
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};
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struct scsi_defect_desc_block
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{
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u_int8_t address[4];
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};
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struct scsi_defect_desc_bytes_from_index
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{
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u_int8_t cylinder[3];
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u_int8_t head;
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u_int8_t bytes_from_index[4];
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};
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struct scsi_defect_desc_phys_sector
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{
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u_int8_t cylinder[3];
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u_int8_t head;
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u_int8_t sector[4];
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};
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struct scsi_read_defect_data_hdr_12
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{
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u_int8_t reserved;
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#define SRDDH12_GLIST 0x08
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#define SRDDH12_PLIST 0x10
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#define SRDDH12_DLIST_FORMAT_MASK 0x07
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#define SRDDH12_BLOCK_FORMAT 0x00
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#define SRDDH12_BYTES_FROM_INDEX_FORMAT 0x04
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#define SRDDH12_PHYSICAL_SECTOR_FORMAT 0x05
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u_int8_t format;
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u_int8_t length[4];
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};
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union disk_pages /* this is the structure copied from osf */
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{
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struct format_device_page {
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u_int8_t pg_code; /* page code (should be 3) */
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#define SMS_FORMAT_DEVICE_PAGE 0x03 /* only 6 bits valid */
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u_int8_t pg_length; /* page length (should be 0x16) */
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#define SMS_FORMAT_DEVICE_PLEN 0x16
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u_int8_t trk_z_1; /* tracks per zone (MSB) */
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u_int8_t trk_z_0; /* tracks per zone (LSB) */
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u_int8_t alt_sec_1; /* alternate sectors per zone (MSB) */
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u_int8_t alt_sec_0; /* alternate sectors per zone (LSB) */
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u_int8_t alt_trk_z_1; /* alternate tracks per zone (MSB) */
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u_int8_t alt_trk_z_0; /* alternate tracks per zone (LSB) */
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u_int8_t alt_trk_v_1; /* alternate tracks per volume (MSB) */
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u_int8_t alt_trk_v_0; /* alternate tracks per volume (LSB) */
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u_int8_t ph_sec_t_1; /* physical sectors per track (MSB) */
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u_int8_t ph_sec_t_0; /* physical sectors per track (LSB) */
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u_int8_t bytes_s_1; /* bytes per sector (MSB) */
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u_int8_t bytes_s_0; /* bytes per sector (LSB) */
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u_int8_t interleave_1; /* interleave (MSB) */
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u_int8_t interleave_0; /* interleave (LSB) */
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u_int8_t trk_skew_1; /* track skew factor (MSB) */
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u_int8_t trk_skew_0; /* track skew factor (LSB) */
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u_int8_t cyl_skew_1; /* cylinder skew (MSB) */
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u_int8_t cyl_skew_0; /* cylinder skew (LSB) */
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u_int8_t flags; /* various */
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#define DISK_FMT_SURF 0x10
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#define DISK_FMT_RMB 0x20
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#define DISK_FMT_HSEC 0x40
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#define DISK_FMT_SSEC 0x80
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u_int8_t reserved21;
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u_int8_t reserved22;
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u_int8_t reserved23;
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} format_device;
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struct rigid_geometry_page {
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u_int8_t pg_code; /* page code (should be 4) */
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#define SMS_RIGID_GEOMETRY_PAGE 0x04
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u_int8_t pg_length; /* page length (should be 0x16) */
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#define SMS_RIGID_GEOMETRY_PLEN 0x16
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u_int8_t ncyl_2; /* number of cylinders (MSB) */
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u_int8_t ncyl_1; /* number of cylinders */
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u_int8_t ncyl_0; /* number of cylinders (LSB) */
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u_int8_t nheads; /* number of heads */
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u_int8_t st_cyl_wp_2; /* starting cyl., write precomp (MSB) */
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u_int8_t st_cyl_wp_1; /* starting cyl., write precomp */
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u_int8_t st_cyl_wp_0; /* starting cyl., write precomp (LSB) */
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u_int8_t st_cyl_rwc_2; /* starting cyl., red. write cur (MSB)*/
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u_int8_t st_cyl_rwc_1; /* starting cyl., red. write cur */
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u_int8_t st_cyl_rwc_0; /* starting cyl., red. write cur (LSB)*/
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u_int8_t driv_step_1; /* drive step rate (MSB) */
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u_int8_t driv_step_0; /* drive step rate (LSB) */
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u_int8_t land_zone_2; /* landing zone cylinder (MSB) */
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u_int8_t land_zone_1; /* landing zone cylinder */
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u_int8_t land_zone_0; /* landing zone cylinder (LSB) */
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u_int8_t rpl; /* rotational position locking (2 bits) */
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u_int8_t rot_offset; /* rotational offset */
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u_int8_t reserved19;
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u_int8_t medium_rot_rate_1; /* medium rotation rate (RPM) (MSB) */
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u_int8_t medium_rot_rate_0; /* medium rotation rate (RPM) (LSB) */
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u_int8_t reserved22;
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u_int8_t reserved23;
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} rigid_geometry;
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struct flexible_disk_page {
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u_int8_t pg_code; /* page code (should be 5) */
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#define SMS_FLEXIBLE_GEOMETRY_PAGE 0x05
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u_int8_t pg_length; /* page length (should be 0x1E) */
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#define SMS_FLEXIBLE_GEOMETRY_PLEN 0x0x1E
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u_int8_t xfr_rate_1; /* transfer rate (MSB) */
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u_int8_t xfr_rate_0; /* transfer rate (LSB) */
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u_int8_t nheads; /* number of heads */
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u_int8_t sec_per_track; /* Sectors per track */
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u_int8_t bytes_s_1; /* bytes per sector (MSB) */
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u_int8_t bytes_s_0; /* bytes per sector (LSB) */
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u_int8_t ncyl_1; /* number of cylinders (MSB) */
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u_int8_t ncyl_0; /* number of cylinders (LSB) */
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u_int8_t st_cyl_wp_1; /* starting cyl., write precomp (MSB) */
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u_int8_t st_cyl_wp_0; /* starting cyl., write precomp (LSB) */
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u_int8_t st_cyl_rwc_1; /* starting cyl., red. write cur (MSB)*/
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u_int8_t st_cyl_rwc_0; /* starting cyl., red. write cur (LSB)*/
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u_int8_t driv_step_1; /* drive step rate (MSB) */
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u_int8_t driv_step_0; /* drive step rate (LSB) */
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u_int8_t driv_step_pw; /* drive step pulse width */
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u_int8_t head_stl_del_1;/* Head settle delay (MSB) */
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u_int8_t head_stl_del_0;/* Head settle delay (LSB) */
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u_int8_t motor_on_del; /* Motor on delay */
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u_int8_t motor_off_del; /* Motor off delay */
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u_int8_t trdy_ssn_mo; /* XXX ??? */
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u_int8_t spc; /* XXX ??? */
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u_int8_t write_comp; /* Write compensation */
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u_int8_t head_load_del; /* Head load delay */
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u_int8_t head_uload_del;/* Head un-load delay */
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u_int8_t pin32_pin2;
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u_int8_t pin4_pint1;
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u_int8_t medium_rot_rate_1; /* medium rotation rate (RPM) (MSB) */
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u_int8_t medium_rot_rate_0; /* medium rotation rate (RPM) (LSB) */
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u_int8_t reserved30;
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u_int8_t reserved31;
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} flexible_disk;
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};
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struct scsi_da_rw_recovery_page {
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u_int8_t page_code;
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#define SMS_RW_ERROR_RECOVERY_PAGE 0x01
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u_int8_t page_length;
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u_int8_t byte3;
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#define SMS_RWER_AWRE 0x80
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#define SMS_RWER_ARRE 0x40
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#define SMS_RWER_TB 0x20
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#define SMS_RWER_RC 0x10
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#define SMS_RWER_EER 0x08
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#define SMS_RWER_PER 0x04
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#define SMS_RWER_DTE 0x02
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#define SMS_RWER_DCR 0x01
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u_int8_t read_retry_count;
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u_int8_t correction_span;
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u_int8_t head_offset_count;
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u_int8_t data_strobe_offset_cnt;
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u_int8_t reserved;
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u_int8_t write_retry_count;
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u_int8_t reserved2;
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u_int8_t recovery_time_limit[2];
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};
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__BEGIN_DECLS
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void scsi_read_write(struct ccb_scsiio *csio, u_int32_t retries,
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void (*cbfcnp)(struct cam_periph *, union ccb *),
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u_int8_t tag_action, int readop, u_int8_t byte2,
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int minimum_cmd_size, u_int32_t lba,
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u_int32_t block_count, u_int8_t *data_ptr,
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u_int32_t dxfer_len, u_int8_t sense_len,
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u_int32_t timeout);
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void scsi_start_stop(struct ccb_scsiio *csio, u_int32_t retries,
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void (*cbfcnp)(struct cam_periph *, union ccb *),
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u_int8_t tag_action, int start, int load_eject,
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int immediate, u_int8_t sense_len, u_int32_t timeout);
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__END_DECLS
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#endif /* _SCSI_SCSI_DA_H */
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