95c9929a3b
Use the special LUNLEN_SINGLE_LEVEL constant for post Rev A4 hardware for single byte luns. Without this change, Rev B hardware would place the single byte of lun data in byte 0 of the lun structure when it should be in byte 1. Since there are few if any devices on the market that support multiple luns in target mode, the corrupted lun field (which was only corrupted for non-zero luns) wasn't hurting us. Approved by: re (rwatson) |
||
---|---|---|
.. | ||
aicasm | ||
ahc_eisa.c | ||
ahc_pci.c | ||
ahd_pci.c | ||
aic7xxx_93cx6.c | ||
aic7xxx_93cx6.h | ||
aic7xxx_inline.h | ||
aic7xxx_osm.c | ||
aic7xxx_osm.h | ||
aic7xxx_pci.c | ||
aic7xxx.c | ||
aic7xxx.h | ||
aic7xxx.reg | ||
aic7xxx.seq | ||
aic79xx_inline.h | ||
aic79xx_osm.c | ||
aic79xx_osm.h | ||
aic79xx_pci.c | ||
aic79xx.c | ||
aic79xx.h | ||
aic79xx.reg | ||
aic79xx.seq | ||
aic7770.c |