281 lines
6.8 KiB
C
281 lines
6.8 KiB
C
/*-
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* Copyright 2003 by Peter Grehan. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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/*
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* A driver for the PIC found in the Heathrow/Paddington MacIO chips.
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* This was superseded by an OpenPIC in the Keylargo and beyond
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* MacIO versions.
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*/
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/module.h>
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#include <sys/bus.h>
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#include <sys/conf.h>
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#include <sys/kernel.h>
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#include <sys/rman.h>
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#include <dev/ofw/ofw_bus.h>
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#include <dev/ofw/openfirm.h>
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#include <machine/bus.h>
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#include <machine/intr_machdep.h>
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#include <machine/md_var.h>
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#include <machine/pio.h>
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#include <machine/resource.h>
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#include <vm/vm.h>
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#include <vm/pmap.h>
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#include <powerpc/powermac/hrowpicvar.h>
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#include "pic_if.h"
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/*
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* MacIO interface
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*/
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static int hrowpic_probe(device_t);
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static int hrowpic_attach(device_t);
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static void hrowpic_dispatch(device_t, struct trapframe *);
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static void hrowpic_enable(device_t, u_int, u_int);
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static void hrowpic_eoi(device_t, u_int);
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static void hrowpic_ipi(device_t, u_int);
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static void hrowpic_mask(device_t, u_int);
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static void hrowpic_unmask(device_t, u_int);
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static device_method_t hrowpic_methods[] = {
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/* Device interface */
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DEVMETHOD(device_probe, hrowpic_probe),
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DEVMETHOD(device_attach, hrowpic_attach),
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/* PIC interface */
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DEVMETHOD(pic_dispatch, hrowpic_dispatch),
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DEVMETHOD(pic_enable, hrowpic_enable),
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DEVMETHOD(pic_eoi, hrowpic_eoi),
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DEVMETHOD(pic_ipi, hrowpic_ipi),
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DEVMETHOD(pic_mask, hrowpic_mask),
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DEVMETHOD(pic_unmask, hrowpic_unmask),
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{ 0, 0 },
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};
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static driver_t hrowpic_driver = {
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"hrowpic",
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hrowpic_methods,
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sizeof(struct hrowpic_softc)
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};
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static devclass_t hrowpic_devclass;
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DRIVER_MODULE(hrowpic, macio, hrowpic_driver, hrowpic_devclass, 0, 0);
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static uint32_t
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hrowpic_read_reg(struct hrowpic_softc *sc, u_int reg, u_int bank)
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{
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if (bank == HPIC_PRIMARY)
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reg += HPIC_1ST_OFFSET;
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return (bus_space_read_4(sc->sc_bt, sc->sc_bh, reg));
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}
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static void
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hrowpic_write_reg(struct hrowpic_softc *sc, u_int reg, u_int bank,
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uint32_t val)
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{
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if (bank == HPIC_PRIMARY)
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reg += HPIC_1ST_OFFSET;
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bus_space_write_4(sc->sc_bt, sc->sc_bh, reg, val);
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/* XXX Issue a read to force the write to complete. */
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bus_space_read_4(sc->sc_bt, sc->sc_bh, reg);
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}
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static int
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hrowpic_probe(device_t dev)
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{
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const char *type = ofw_bus_get_type(dev);
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/*
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* OpenPIC cells have a type of "open-pic", so this
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* is sufficient to identify a Heathrow cell
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*/
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if (strcmp(type, "interrupt-controller") != 0)
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return (ENXIO);
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/*
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* The description was already printed out in the nexus
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* probe, so don't do it again here
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*/
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device_set_desc(dev, "Heathrow MacIO interrupt controller");
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return (0);
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}
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static int
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hrowpic_attach(device_t dev)
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{
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struct hrowpic_softc *sc;
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sc = device_get_softc(dev);
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sc->sc_dev = dev;
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sc->sc_rrid = 0;
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sc->sc_rres = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &sc->sc_rrid,
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RF_ACTIVE);
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if (sc->sc_rres == NULL) {
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device_printf(dev, "Could not alloc mem resource!\n");
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return (ENXIO);
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}
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sc->sc_bt = rman_get_bustag(sc->sc_rres);
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sc->sc_bh = rman_get_bushandle(sc->sc_rres);
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/*
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* Disable all interrupt sources and clear outstanding interrupts
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*/
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hrowpic_write_reg(sc, HPIC_ENABLE, HPIC_PRIMARY, 0);
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hrowpic_write_reg(sc, HPIC_CLEAR, HPIC_PRIMARY, 0xffffffff);
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hrowpic_write_reg(sc, HPIC_ENABLE, HPIC_SECONDARY, 0);
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hrowpic_write_reg(sc, HPIC_CLEAR, HPIC_SECONDARY, 0xffffffff);
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powerpc_register_pic(dev, ofw_bus_get_node(dev), 64, 0, FALSE);
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return (0);
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}
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/*
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* Local routines
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*/
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static void
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hrowpic_toggle_irq(struct hrowpic_softc *sc, int irq, int enable)
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{
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u_int roffset;
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u_int rbit;
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KASSERT((irq > 0) && (irq <= HROWPIC_IRQMAX), ("en irq out of range"));
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/*
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* Humor the SMP layer if it wants to set up an IPI handler.
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*/
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if (irq == HROWPIC_IRQMAX)
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return;
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/*
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* Calculate prim/sec register bank for the IRQ, update soft copy,
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* and enable the IRQ as an interrupt source
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*/
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roffset = HPIC_INT_TO_BANK(irq);
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rbit = HPIC_INT_TO_REGBIT(irq);
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if (enable)
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sc->sc_softreg[roffset] |= (1 << rbit);
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else
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sc->sc_softreg[roffset] &= ~(1 << rbit);
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hrowpic_write_reg(sc, HPIC_ENABLE, roffset, sc->sc_softreg[roffset]);
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}
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/*
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* PIC I/F methods.
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*/
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static void
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hrowpic_dispatch(device_t dev, struct trapframe *tf)
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{
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struct hrowpic_softc *sc;
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uint64_t mask;
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uint32_t reg;
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u_int irq;
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sc = device_get_softc(dev);
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while (1) {
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mask = hrowpic_read_reg(sc, HPIC_STATUS, HPIC_SECONDARY);
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reg = hrowpic_read_reg(sc, HPIC_STATUS, HPIC_PRIMARY);
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mask = (mask << 32) | reg;
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if (mask == 0)
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break;
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irq = 0;
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while (irq < HROWPIC_IRQMAX) {
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if (mask & 1)
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powerpc_dispatch_intr(sc->sc_vector[irq], tf);
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mask >>= 1;
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irq++;
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}
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}
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}
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static void
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hrowpic_enable(device_t dev, u_int irq, u_int vector)
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{
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struct hrowpic_softc *sc;
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sc = device_get_softc(dev);
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sc->sc_vector[irq] = vector;
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hrowpic_toggle_irq(sc, irq, 1);
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}
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static void
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hrowpic_eoi(device_t dev, u_int irq)
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{
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struct hrowpic_softc *sc;
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int bank;
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sc = device_get_softc(dev);
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bank = (irq >= 32) ? HPIC_SECONDARY : HPIC_PRIMARY ;
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hrowpic_write_reg(sc, HPIC_CLEAR, bank, 1U << (irq & 0x1f));
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}
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static void
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hrowpic_ipi(device_t dev, u_int irq)
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{
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/* No SMP support. */
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}
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static void
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hrowpic_mask(device_t dev, u_int irq)
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{
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struct hrowpic_softc *sc;
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sc = device_get_softc(dev);
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hrowpic_toggle_irq(sc, irq, 0);
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}
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static void
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hrowpic_unmask(device_t dev, u_int irq)
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{
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struct hrowpic_softc *sc;
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sc = device_get_softc(dev);
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hrowpic_toggle_irq(sc, irq, 1);
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}
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