616 lines
16 KiB
C
616 lines
16 KiB
C
/*-
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* Copyright (c) 1994-1998 Mark Brinicombe.
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* Copyright (c) 1994 Brini.
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* All rights reserved.
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*
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* This code is derived from software written for Brini by Mark Brinicombe
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by Brini.
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* 4. The name of the company nor the name of the author may be used to
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* endorse or promote products derived from this software without specific
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* prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL BRINI OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
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* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* from: FreeBSD: //depot/projects/arm/src/sys/arm/at91/kb920x_machdep.c, rev 45
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*/
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#include "opt_ddb.h"
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#include "opt_platform.h"
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#define _ARM32_BUS_DMA_PRIVATE
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/sysproto.h>
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#include <sys/signalvar.h>
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#include <sys/imgact.h>
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#include <sys/kernel.h>
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#include <sys/ktr.h>
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#include <sys/linker.h>
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#include <sys/lock.h>
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#include <sys/malloc.h>
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#include <sys/mutex.h>
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#include <sys/pcpu.h>
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#include <sys/proc.h>
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#include <sys/ptrace.h>
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#include <sys/cons.h>
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#include <sys/bio.h>
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#include <sys/bus.h>
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#include <sys/buf.h>
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#include <sys/exec.h>
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#include <sys/kdb.h>
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#include <sys/msgbuf.h>
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#include <machine/reg.h>
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#include <machine/cpu.h>
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#include <machine/fdt.h>
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#include <dev/fdt/fdt_common.h>
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#include <dev/ofw/openfirm.h>
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#include <arm/lpc/lpcreg.h>
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#include <arm/lpc/lpcvar.h>
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#include <dev/ic/ns16550.h>
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#include <vm/vm.h>
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#include <vm/pmap.h>
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#include <vm/vm_object.h>
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#include <vm/vm_page.h>
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#include <vm/vm_pager.h>
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#include <vm/vm_map.h>
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#include <machine/bus.h>
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#include <machine/pte.h>
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#include <machine/pmap.h>
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#include <machine/vmparam.h>
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#include <machine/pcb.h>
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#include <machine/undefined.h>
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#include <machine/machdep.h>
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#include <machine/metadata.h>
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#include <machine/armreg.h>
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#include <machine/bus.h>
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#include <sys/reboot.h>
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#define DEBUG
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#undef DEBUG
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#ifdef DEBUG
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#define debugf(fmt, args...) printf(fmt, ##args)
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#else
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#define debugf(fmt, args...)
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#endif
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/*
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* This is the number of L2 page tables required for covering max
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* (hypothetical) memsize of 4GB and all kernel mappings (vectors, msgbuf,
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* stacks etc.), uprounded to be divisible by 4.
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*/
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#define KERNEL_PT_MAX 78
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/* Define various stack sizes in pages */
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#define IRQ_STACK_SIZE 1
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#define ABT_STACK_SIZE 1
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#define UND_STACK_SIZE 1
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extern unsigned char kernbase[];
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extern unsigned char _etext[];
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extern unsigned char _edata[];
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extern unsigned char __bss_start[];
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extern unsigned char _end[];
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#ifdef DDB
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extern vm_offset_t ksym_start, ksym_end;
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#endif
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extern u_int data_abort_handler_address;
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extern u_int prefetch_abort_handler_address;
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extern u_int undefined_handler_address;
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extern vm_offset_t pmap_bootstrap_lastaddr;
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extern int *end;
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struct pv_addr kernel_pt_table[KERNEL_PT_MAX];
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/* Physical and virtual addresses for some global pages */
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vm_paddr_t phys_avail[10];
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vm_paddr_t dump_avail[4];
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vm_offset_t physical_pages;
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vm_offset_t pmap_bootstrap_lastaddr;
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const struct pmap_devmap *pmap_devmap_bootstrap_table;
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struct pv_addr systempage;
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struct pv_addr msgbufpv;
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struct pv_addr irqstack;
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struct pv_addr undstack;
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struct pv_addr abtstack;
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struct pv_addr kernelstack;
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static struct mem_region availmem_regions[FDT_MEM_REGIONS];
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static int availmem_regions_sz;
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static void print_kenv(void);
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static void print_kernel_section_addr(void);
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static void physmap_init(void);
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static int platform_devmap_init(void);
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static char *
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kenv_next(char *cp)
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{
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if (cp != NULL) {
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while (*cp != 0)
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cp++;
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cp++;
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if (*cp == 0)
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cp = NULL;
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}
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return (cp);
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}
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static void
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print_kenv(void)
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{
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int len;
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char *cp;
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debugf("loader passed (static) kenv:\n");
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if (kern_envp == NULL) {
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debugf(" no env, null ptr\n");
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return;
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}
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debugf(" kern_envp = 0x%08x\n", (uint32_t)kern_envp);
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len = 0;
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for (cp = kern_envp; cp != NULL; cp = kenv_next(cp))
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debugf(" %x %s\n", (uint32_t)cp, cp);
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}
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static void
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print_kernel_section_addr(void)
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{
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debugf("kernel image addresses:\n");
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debugf(" kernbase = 0x%08x\n", (uint32_t)kernbase);
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debugf(" _etext (sdata) = 0x%08x\n", (uint32_t)_etext);
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debugf(" _edata = 0x%08x\n", (uint32_t)_edata);
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debugf(" __bss_start = 0x%08x\n", (uint32_t)__bss_start);
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debugf(" _end = 0x%08x\n", (uint32_t)_end);
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}
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static void
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physmap_init(void)
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{
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int i, j, cnt;
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vm_offset_t phys_kernelend, kernload;
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uint32_t s, e, sz;
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struct mem_region *mp, *mp1;
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phys_kernelend = KERNPHYSADDR + (virtual_avail - KERNVIRTADDR);
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kernload = KERNPHYSADDR;
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/*
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* Remove kernel physical address range from avail
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* regions list. Page align all regions.
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* Non-page aligned memory isn't very interesting to us.
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* Also, sort the entries for ascending addresses.
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*/
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sz = 0;
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cnt = availmem_regions_sz;
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debugf("processing avail regions:\n");
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for (mp = availmem_regions; mp->mr_size; mp++) {
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s = mp->mr_start;
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e = mp->mr_start + mp->mr_size;
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debugf(" %08x-%08x -> ", s, e);
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/* Check whether this region holds all of the kernel. */
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if (s < kernload && e > phys_kernelend) {
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availmem_regions[cnt].mr_start = phys_kernelend;
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availmem_regions[cnt++].mr_size = e - phys_kernelend;
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e = kernload;
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}
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/* Look whether this regions starts within the kernel. */
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if (s >= kernload && s < phys_kernelend) {
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if (e <= phys_kernelend)
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goto empty;
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s = phys_kernelend;
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}
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/* Now look whether this region ends within the kernel. */
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if (e > kernload && e <= phys_kernelend) {
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if (s >= kernload) {
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goto empty;
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}
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e = kernload;
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}
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/* Now page align the start and size of the region. */
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s = round_page(s);
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e = trunc_page(e);
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if (e < s)
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e = s;
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sz = e - s;
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debugf("%08x-%08x = %x\n", s, e, sz);
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/* Check whether some memory is left here. */
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if (sz == 0) {
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empty:
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printf("skipping\n");
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bcopy(mp + 1, mp,
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(cnt - (mp - availmem_regions)) * sizeof(*mp));
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cnt--;
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mp--;
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continue;
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}
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/* Do an insertion sort. */
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for (mp1 = availmem_regions; mp1 < mp; mp1++)
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if (s < mp1->mr_start)
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break;
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if (mp1 < mp) {
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bcopy(mp1, mp1 + 1, (char *)mp - (char *)mp1);
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mp1->mr_start = s;
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mp1->mr_size = sz;
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} else {
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mp->mr_start = s;
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mp->mr_size = sz;
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}
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}
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availmem_regions_sz = cnt;
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/* Fill in phys_avail table, based on availmem_regions */
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debugf("fill in phys_avail:\n");
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for (i = 0, j = 0; i < availmem_regions_sz; i++, j += 2) {
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debugf(" region: 0x%08x - 0x%08x (0x%08x)\n",
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availmem_regions[i].mr_start,
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availmem_regions[i].mr_start + availmem_regions[i].mr_size,
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availmem_regions[i].mr_size);
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phys_avail[j] = availmem_regions[i].mr_start;
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phys_avail[j + 1] = availmem_regions[i].mr_start +
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availmem_regions[i].mr_size;
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}
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phys_avail[j] = 0;
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phys_avail[j + 1] = 0;
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}
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void *
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initarm(struct arm_boot_params *abp)
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{
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struct pv_addr kernel_l1pt;
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struct pv_addr dpcpu;
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vm_offset_t dtbp, freemempos, l2_start, lastaddr;
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uint32_t memsize, l2size;
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void *kmdp;
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u_int l1pagetable;
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int i = 0, j = 0;
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lastaddr = parse_boot_param(abp);
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memsize = 0;
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set_cpufuncs();
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kmdp = preload_search_by_type("elf kernel");
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if (kmdp != NULL)
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dtbp = MD_FETCH(kmdp, MODINFOMD_DTBP, vm_offset_t);
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else
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dtbp = (vm_offset_t)NULL;
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#if defined(FDT_DTB_STATIC)
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/*
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* In case the device tree blob was not retrieved (from metadata) try
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* to use the statically embedded one.
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*/
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if (dtbp == (vm_offset_t)NULL)
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dtbp = (vm_offset_t)&fdt_static_dtb;
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#endif
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if (OF_install(OFW_FDT, 0) == FALSE)
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while (1);
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if (OF_init((void *)dtbp) != 0)
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while (1);
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/* Grab physical memory regions information from device tree. */
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if (fdt_get_mem_regions(availmem_regions, &availmem_regions_sz,
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&memsize) != 0)
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while(1);
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if (fdt_immr_addr(LPC_DEV_BASE) != 0)
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while (1);
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/* Platform-specific initialisation */
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pmap_bootstrap_lastaddr = fdt_immr_va - ARM_NOCACHE_KVA_SIZE;
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pcpu_init(pcpup, 0, sizeof(struct pcpu));
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PCPU_SET(curthread, &thread0);
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/* Calculate number of L2 tables needed for mapping vm_page_array */
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l2size = (memsize / PAGE_SIZE) * sizeof(struct vm_page);
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l2size = (l2size >> L1_S_SHIFT) + 1;
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/*
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* Add one table for end of kernel map, one for stacks, msgbuf and
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* L1 and L2 tables map and one for vectors map.
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*/
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l2size += 3;
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/* Make it divisible by 4 */
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l2size = (l2size + 3) & ~3;
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#define KERNEL_TEXT_BASE (KERNBASE)
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freemempos = (lastaddr + PAGE_MASK) & ~PAGE_MASK;
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/* Define a macro to simplify memory allocation */
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#define valloc_pages(var, np) \
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alloc_pages((var).pv_va, (np)); \
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(var).pv_pa = (var).pv_va + (KERNPHYSADDR - KERNVIRTADDR);
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#define alloc_pages(var, np) \
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(var) = freemempos; \
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freemempos += (np * PAGE_SIZE); \
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memset((char *)(var), 0, ((np) * PAGE_SIZE));
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while (((freemempos - L1_TABLE_SIZE) & (L1_TABLE_SIZE - 1)) != 0)
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freemempos += PAGE_SIZE;
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valloc_pages(kernel_l1pt, L1_TABLE_SIZE / PAGE_SIZE);
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for (i = 0; i < l2size; ++i) {
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if (!(i % (PAGE_SIZE / L2_TABLE_SIZE_REAL))) {
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valloc_pages(kernel_pt_table[i],
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L2_TABLE_SIZE / PAGE_SIZE);
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j = i;
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} else {
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kernel_pt_table[i].pv_va = kernel_pt_table[j].pv_va +
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L2_TABLE_SIZE_REAL * (i - j);
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kernel_pt_table[i].pv_pa =
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kernel_pt_table[i].pv_va - KERNVIRTADDR +
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KERNPHYSADDR;
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}
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}
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/*
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* Allocate a page for the system page mapped to 0x00000000
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* or 0xffff0000. This page will just contain the system vectors
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* and can be shared by all processes.
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*/
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valloc_pages(systempage, 1);
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/* Allocate dynamic per-cpu area. */
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valloc_pages(dpcpu, DPCPU_SIZE / PAGE_SIZE);
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dpcpu_init((void *)dpcpu.pv_va, 0);
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/* Allocate stacks for all modes */
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valloc_pages(irqstack, IRQ_STACK_SIZE);
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valloc_pages(abtstack, ABT_STACK_SIZE);
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valloc_pages(undstack, UND_STACK_SIZE);
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valloc_pages(kernelstack, KSTACK_PAGES);
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init_param1();
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valloc_pages(msgbufpv, round_page(msgbufsize) / PAGE_SIZE);
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/*
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* Now we start construction of the L1 page table
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* We start by mapping the L2 page tables into the L1.
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* This means that we can replace L1 mappings later on if necessary
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*/
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l1pagetable = kernel_l1pt.pv_va;
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/*
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* Try to map as much as possible of kernel text and data using
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* 1MB section mapping and for the rest of initial kernel address
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* space use L2 coarse tables.
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*
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* Link L2 tables for mapping remainder of kernel (modulo 1MB)
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* and kernel structures
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*/
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l2_start = lastaddr & ~(L1_S_OFFSET);
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for (i = 0 ; i < l2size - 1; i++)
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pmap_link_l2pt(l1pagetable, l2_start + i * L1_S_SIZE,
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&kernel_pt_table[i]);
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pmap_curmaxkvaddr = l2_start + (l2size - 1) * L1_S_SIZE;
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/* Map kernel code and data */
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pmap_map_chunk(l1pagetable, KERNVIRTADDR, KERNPHYSADDR,
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(((uint32_t)(lastaddr) - KERNVIRTADDR) + PAGE_MASK) & ~PAGE_MASK,
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VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
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/* Map L1 directory and allocated L2 page tables */
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pmap_map_chunk(l1pagetable, kernel_l1pt.pv_va, kernel_l1pt.pv_pa,
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L1_TABLE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
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pmap_map_chunk(l1pagetable, kernel_pt_table[0].pv_va,
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kernel_pt_table[0].pv_pa,
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L2_TABLE_SIZE_REAL * l2size,
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VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
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/* Map allocated DPCPU, stacks and msgbuf */
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pmap_map_chunk(l1pagetable, dpcpu.pv_va, dpcpu.pv_pa,
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freemempos - dpcpu.pv_va,
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VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
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/* Link and map the vector page */
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pmap_link_l2pt(l1pagetable, ARM_VECTORS_HIGH,
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&kernel_pt_table[l2size - 1]);
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pmap_map_entry(l1pagetable, ARM_VECTORS_HIGH, systempage.pv_pa,
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VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
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/* Map pmap_devmap[] entries */
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if (platform_devmap_init() != 0)
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while (1);
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pmap_devmap_bootstrap(l1pagetable, pmap_devmap_bootstrap_table);
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cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL * 2)) |
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DOMAIN_CLIENT);
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setttb(kernel_l1pt.pv_pa);
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cpu_tlb_flushID();
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cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL * 2));
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/*
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* Only after the SOC registers block is mapped we can perform device
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* tree fixups, as they may attempt to read parameters from hardware.
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*/
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OF_interpret("perform-fixup", 0);
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#if 0
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/*
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* Initialize GPIO as early as possible.
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*/
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if (platform_gpio_init() != 0)
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while (1);
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#endif
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cninit();
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physmem = memsize / PAGE_SIZE;
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debugf("initarm: console initialized\n");
|
|
debugf(" arg1 mdp = 0x%08x\n", (uint32_t)mdp);
|
|
debugf(" boothowto = 0x%08x\n", boothowto);
|
|
printf(" dtbp = 0x%08x\n", (uint32_t)dtbp);
|
|
print_kernel_section_addr();
|
|
print_kenv();
|
|
|
|
/*
|
|
* Pages were allocated during the secondary bootstrap for the
|
|
* stacks for different CPU modes.
|
|
* We must now set the r13 registers in the different CPU modes to
|
|
* point to these stacks.
|
|
* Since the ARM stacks use STMFD etc. we must set r13 to the top end
|
|
* of the stack memory.
|
|
*/
|
|
cpu_control(CPU_CONTROL_MMU_ENABLE, CPU_CONTROL_MMU_ENABLE);
|
|
set_stackptr(PSR_IRQ32_MODE,
|
|
irqstack.pv_va + IRQ_STACK_SIZE * PAGE_SIZE);
|
|
set_stackptr(PSR_ABT32_MODE,
|
|
abtstack.pv_va + ABT_STACK_SIZE * PAGE_SIZE);
|
|
set_stackptr(PSR_UND32_MODE,
|
|
undstack.pv_va + UND_STACK_SIZE * PAGE_SIZE);
|
|
|
|
/*
|
|
* We must now clean the cache again....
|
|
* Cleaning may be done by reading new data to displace any
|
|
* dirty data in the cache. This will have happened in setttb()
|
|
* but since we are boot strapping the addresses used for the read
|
|
* may have just been remapped and thus the cache could be out
|
|
* of sync. A re-clean after the switch will cure this.
|
|
* After booting there are no gross relocations of the kernel thus
|
|
* this problem will not occur after initarm().
|
|
*/
|
|
cpu_idcache_wbinv_all();
|
|
|
|
/* Set stack for exception handlers */
|
|
data_abort_handler_address = (u_int)data_abort_handler;
|
|
prefetch_abort_handler_address = (u_int)prefetch_abort_handler;
|
|
undefined_handler_address = (u_int)undefinedinstruction_bounce;
|
|
undefined_init();
|
|
|
|
init_proc0(kernelstack.pv_va);
|
|
|
|
arm_vector_init(ARM_VECTORS_HIGH, ARM_VEC_ALL);
|
|
|
|
dump_avail[0] = 0;
|
|
dump_avail[1] = memsize;
|
|
dump_avail[2] = 0;
|
|
dump_avail[3] = 0;
|
|
|
|
pmap_bootstrap(freemempos, pmap_bootstrap_lastaddr, &kernel_l1pt);
|
|
msgbufp = (void *)msgbufpv.pv_va;
|
|
msgbufinit(msgbufp, msgbufsize);
|
|
mutex_init();
|
|
|
|
/*
|
|
* Prepare map of physical memory regions available to vm subsystem.
|
|
*/
|
|
physmap_init();
|
|
|
|
/*
|
|
* Set initial values of GPIO output ports
|
|
*/
|
|
platform_gpio_init();
|
|
|
|
/* Do basic tuning, hz etc */
|
|
init_param2(physmem);
|
|
kdb_init();
|
|
return ((void *)(kernelstack.pv_va + USPACE_SVC_STACK_TOP -
|
|
sizeof(struct pcb)));
|
|
}
|
|
|
|
#define FDT_DEVMAP_MAX (1 + 2 + 1 + 1)
|
|
static struct pmap_devmap fdt_devmap[FDT_DEVMAP_MAX] = {
|
|
{ 0, 0, 0, 0, 0, }
|
|
};
|
|
|
|
/*
|
|
* Construct pmap_devmap[] with DT-derived config data.
|
|
*/
|
|
static int
|
|
platform_devmap_init(void)
|
|
{
|
|
|
|
/*
|
|
* IMMR range.
|
|
*/
|
|
fdt_devmap[0].pd_va = fdt_immr_va;
|
|
fdt_devmap[0].pd_pa = fdt_immr_pa;
|
|
fdt_devmap[0].pd_size = fdt_immr_size;
|
|
fdt_devmap[0].pd_prot = VM_PROT_READ | VM_PROT_WRITE;
|
|
fdt_devmap[0].pd_cache = PTE_NOCACHE;
|
|
|
|
pmap_devmap_bootstrap_table = &fdt_devmap[0];
|
|
return (0);
|
|
}
|
|
|
|
struct arm32_dma_range *
|
|
bus_dma_get_range(void)
|
|
{
|
|
|
|
return (NULL);
|
|
}
|
|
|
|
int
|
|
bus_dma_get_range_nb(void)
|
|
{
|
|
|
|
return (0);
|
|
}
|
|
|
|
void
|
|
cpu_reset(void)
|
|
{
|
|
/* Enable WDT */
|
|
bus_space_write_4(fdtbus_bs_tag,
|
|
LPC_CLKPWR_BASE, LPC_CLKPWR_TIMCLK_CTRL,
|
|
LPC_CLKPWR_TIMCLK_CTRL_WATCHDOG);
|
|
|
|
/* Instant assert of RESETOUT_N with pulse length 1ms */
|
|
bus_space_write_4(fdtbus_bs_tag, LPC_WDTIM_BASE, LPC_WDTIM_PULSE, 13000);
|
|
bus_space_write_4(fdtbus_bs_tag, LPC_WDTIM_BASE, LPC_WDTIM_MCTRL, 0x70);
|
|
|
|
for (;;);
|
|
}
|