c1141fba00
Current mitigation for L1TF in bhyve flushes L1D either by an explicit WRMSR command, or by software reading enough uninteresting data to fully populate all lines of L1D. If NMI occurs after either of methods is completed, but before VM entry, L1D becomes polluted with the cache lines touched by NMI handlers. There is no interesting data which NMI accesses, but something sensitive might be co-located on the same cache line, and then L1TF exposes that to a rogue guest. Use VM entry MSR load list to ensure atomicity of L1D cache and VM entry if updated microcode was loaded. If only software flush method is available, try to help the bhyve sw flusher by also flushing L1D on NMI exit to kernel mode. Suggested by and discussed with: Andrew Cooper <andrew.cooper3@citrix.com> Reviewed by: jhb Sponsored by: The FreeBSD Foundation MFC after: 2 weeks Differential revision: https://reviews.freebsd.org/D16790
80 lines
3.2 KiB
C
80 lines
3.2 KiB
C
/*-
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* SPDX-License-Identifier: BSD-3-Clause
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*
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* Copyright (c) 1995 Bruce D. Evans.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. Neither the name of the author nor the names of contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#ifndef _MACHINE_MD_VAR_H_
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#define _MACHINE_MD_VAR_H_
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#include <x86/x86_var.h>
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extern uint64_t *vm_page_dump;
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extern int hw_lower_amd64_sharedpage;
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extern int hw_ibrs_disable;
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extern int hw_ssb_disable;
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extern int nmi_flush_l1d_sw;
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/*
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* The file "conf/ldscript.amd64" defines the symbol "kernphys". Its
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* value is the physical address at which the kernel is loaded.
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*/
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extern char kernphys[];
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struct savefpu;
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struct sysentvec;
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void amd64_conf_fast_syscall(void);
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void amd64_db_resume_dbreg(void);
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void amd64_lower_shared_page(struct sysentvec *);
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void amd64_syscall(struct thread *td, int traced);
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void doreti_iret(void) __asm(__STRING(doreti_iret));
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void doreti_iret_fault(void) __asm(__STRING(doreti_iret_fault));
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void ld_ds(void) __asm(__STRING(ld_ds));
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void ld_es(void) __asm(__STRING(ld_es));
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void ld_fs(void) __asm(__STRING(ld_fs));
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void ld_gs(void) __asm(__STRING(ld_gs));
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void ld_fsbase(void) __asm(__STRING(ld_fsbase));
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void ld_gsbase(void) __asm(__STRING(ld_gsbase));
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void ds_load_fault(void) __asm(__STRING(ds_load_fault));
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void es_load_fault(void) __asm(__STRING(es_load_fault));
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void fs_load_fault(void) __asm(__STRING(fs_load_fault));
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void gs_load_fault(void) __asm(__STRING(gs_load_fault));
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void fsbase_load_fault(void) __asm(__STRING(fsbase_load_fault));
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void gsbase_load_fault(void) __asm(__STRING(gsbase_load_fault));
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void fpstate_drop(struct thread *td);
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void pagezero(void *addr);
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void setidt(int idx, alias_for_inthand_t *func, int typ, int dpl, int ist);
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void sse2_pagezero(void *addr);
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struct savefpu *get_pcb_user_save_td(struct thread *td);
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struct savefpu *get_pcb_user_save_pcb(struct pcb *pcb);
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#endif /* !_MACHINE_MD_VAR_H_ */
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