292 lines
8.0 KiB
ArmAsm
292 lines
8.0 KiB
ArmAsm
/*-
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* Copyright (c) 2001 Takanori Watanabe <takawata@jp.freebsd.org>
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* Copyright (c) 2001 Mitsuru IWASAKI <iwasaki@jp.freebsd.org>
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* Copyright (c) 2003 Peter Wemm
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* Copyright (c) 2008-2009 Jung-uk Kim <jkim@FreeBSD.org>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#define LOCORE
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#include <machine/asmacros.h>
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#include <machine/specialreg.h>
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#include "assym.s"
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/*
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* Resume entry point for real mode.
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*
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* If XFirmwareWakingVector is zero and FirmwareWakingVector is non-zero
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* in FACS, the BIOS enters here in real mode after POST with CS set to
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* (FirmwareWakingVector >> 4) and IP set to (FirmwareWakingVector & 0xf).
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* Depending on the previous sleep state, we may need to initialize more
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* of the system (i.e., S3 suspend-to-RAM vs. S4 suspend-to-disk).
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*
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* Note: If XFirmwareWakingVector is non-zero, it should disable address
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* translation/paging and interrupts, load all segment registers with
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* a flat 4 GB address space, and set EFLAGS.IF to zero. Currently
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* this mode is not supported by this code.
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*/
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.data /* So we can modify it */
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ALIGN_TEXT
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.code16
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wakeup_start:
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/*
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* Set up segment registers for real mode, a small stack for
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* any calls we make, and clear any flags.
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*/
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cli /* make sure no interrupts */
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mov %cs, %ax /* copy %cs to %ds. Remember these */
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mov %ax, %ds /* are offsets rather than selectors */
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mov %ax, %ss
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movw $PAGE_SIZE, %sp
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xorw %ax, %ax
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pushw %ax
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popfw
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/* To debug resume hangs, beep the speaker if the user requested. */
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testb $~0, resume_beep - wakeup_start
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jz 1f
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movb $0, resume_beep - wakeup_start
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movb $0xc0, %al
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outb %al, $0x42
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movb $0x04, %al
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outb %al, $0x42
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inb $0x61, %al
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orb $0x3, %al
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outb %al, $0x61
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1:
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/* Re-initialize video BIOS if the reset_video tunable is set. */
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testb $~0, reset_video - wakeup_start
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jz 1f
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movb $0, reset_video - wakeup_start
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lcall $0xc000, $3
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/* When we reach here, int 0x10 should be ready. Hide cursor. */
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movb $0x01, %ah
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movb $0x20, %ch
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int $0x10
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/* Re-start in case the previous BIOS call clobbers them. */
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jmp wakeup_start
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1:
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/*
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* Find relocation base and patch the gdt descript and ljmp targets
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*/
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xorl %ebx, %ebx
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mov %cs, %bx
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sall $4, %ebx /* %ebx is now our relocation base */
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/*
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* Load the descriptor table pointer. We'll need it when running
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* in 16-bit protected mode.
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*/
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lgdtl bootgdtdesc - wakeup_start
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/* Enable protected mode */
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movl $CR0_PE, %eax
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mov %eax, %cr0
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/*
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* Now execute a far jump to turn on protected mode. This
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* causes the segment registers to turn into selectors and causes
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* %cs to be loaded from the gdt.
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*
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* The following instruction is:
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* ljmpl $bootcode32 - bootgdt, $wakeup_32 - wakeup_start
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* but gas cannot assemble that. And besides, we patch the targets
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* in early startup and its a little clearer what we are patching.
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*/
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wakeup_sw32:
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.byte 0x66 /* size override to 32 bits */
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.byte 0xea /* opcode for far jump */
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.long wakeup_32 - wakeup_start /* offset in segment */
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.word bootcode32 - bootgdt /* index in gdt for 32 bit code */
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/*
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* At this point, we are running in 32 bit legacy protected mode.
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*/
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ALIGN_TEXT
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.code32
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wakeup_32:
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mov $bootdata32 - bootgdt, %eax
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mov %ax, %ds
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/* Turn on the PAE and PSE bits for when paging is enabled */
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mov %cr4, %eax
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orl $(CR4_PAE | CR4_PSE), %eax
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mov %eax, %cr4
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/*
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* Enable EFER.LME so that we get long mode when all the prereqs are
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* in place. In this case, it turns on when CR0_PG is finally enabled.
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* Pick up a few other EFER bits that we'll use need we're here.
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*/
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movl $MSR_EFER, %ecx
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rdmsr
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orl $EFER_LME | EFER_SCE, %eax
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wrmsr
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/*
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* Point to the embedded page tables for startup. Note that this
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* only gets accessed after we're actually in 64 bit mode, however
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* we can only set the bottom 32 bits of %cr3 in this state. This
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* means we are required to use a temporary page table that is below
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* the 4GB limit. %ebx is still our relocation base. We could just
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* subtract 3 * PAGE_SIZE, but that would be too easy.
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*/
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leal wakeup_pagetables - wakeup_start(%ebx), %eax
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movl (%eax), %eax
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mov %eax, %cr3
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/*
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* Finally, switch to long bit mode by enabling paging. We have
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* to be very careful here because all the segmentation disappears
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* out from underneath us. The spec says we can depend on the
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* subsequent pipelined branch to execute, but *only if* everthing
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* is still identity mapped. If any mappings change, the pipeline
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* will flush.
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*/
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mov %cr0, %eax
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orl $CR0_PG, %eax
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mov %eax, %cr0
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/*
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* At this point paging is enabled, and we are in "compatability" mode.
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* We do another far jump to reload %cs with the 64 bit selector.
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* %cr3 points to a 4-level page table page.
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* We cannot yet jump all the way to the kernel because we can only
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* specify a 32 bit linear address. So, yet another trampoline.
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*
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* The following instruction is:
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* ljmp $bootcode64 - bootgdt, $wakeup_64 - wakeup_start
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* but gas cannot assemble that. And besides, we patch the targets
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* in early startup and its a little clearer what we are patching.
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*/
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wakeup_sw64:
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.byte 0xea /* opcode for far jump */
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.long wakeup_64 - wakeup_start /* offset in segment */
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.word bootcode64 - bootgdt /* index in gdt for 64 bit code */
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/*
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* Yeehar! We're running in 64-bit mode! We can mostly ignore our
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* segment registers, and get on with it.
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* Note that we are running at the correct virtual address, but with
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* a 1:1 1GB mirrored mapping over entire address space. We had better
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* switch to a real %cr3 promptly so that we can get to the direct map
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* space. Remember that jmp is relative and that we've been relocated,
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* so use an indirect jump.
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*/
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ALIGN_TEXT
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.code64
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wakeup_64:
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mov $bootdata64 - bootgdt, %eax
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mov %ax, %ds
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/* Restore arguments and return. */
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movq wakeup_ctx - wakeup_start(%rbx), %rdi
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movq wakeup_kpml4 - wakeup_start(%rbx), %rsi
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movq wakeup_retaddr - wakeup_start(%rbx), %rax
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jmp *%rax
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.data
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resume_beep:
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.byte 0
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reset_video:
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.byte 0
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ALIGN_DATA
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bootgdt:
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.long 0x00000000
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.long 0x00000000
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.long 0x00000000
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.long 0x00000000
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.long 0x00000000
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.long 0x00000000
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.long 0x00000000
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.long 0x00000000
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bootcode64:
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.long 0x0000ffff
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.long 0x00af9b00
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bootdata64:
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.long 0x0000ffff
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.long 0x00af9300
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bootcode32:
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.long 0x0000ffff
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.long 0x00cf9b00
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bootdata32:
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.long 0x0000ffff
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.long 0x00cf9300
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bootgdtend:
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wakeup_pagetables:
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.long 0
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bootgdtdesc:
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.word bootgdtend - bootgdt /* Length */
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.long bootgdt - wakeup_start /* Offset plus %ds << 4 */
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ALIGN_DATA
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wakeup_retaddr:
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.quad 0
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wakeup_kpml4:
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.quad 0
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wakeup_ctx:
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.quad 0
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wakeup_xpcb:
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.quad 0
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wakeup_gdt:
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.word 0
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.quad 0
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ALIGN_DATA
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wakeup_efer:
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.quad 0
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wakeup_pat:
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.quad 0
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wakeup_star:
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.quad 0
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wakeup_lstar:
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.quad 0
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wakeup_cstar:
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.quad 0
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wakeup_sfmask:
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.quad 0
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wakeup_cpu:
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.long 0
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dummy:
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