Adrian Chadd 87a2f105ee Make the apb.c code optional behind ar71xx_apb rather than standard.
The QCA955x has more mux interrupts going on - and the AR934x actually does,
but I cheated and assigned wlan and pcie to the same interrupt line.
They are, there's just a status register mux that I should've been using.

Luckily this isn't too bad a change in itself - almost all of the
Atheros MIPS configurations use a _BASE file to inherit from.
Except PB92, which I should really fix up at some point.

The AR934x will use the legacy apb for now until I write its replacement.

The QCA955x SoC I'm doing bring-up on will have a separate qca955x_apb.c
implementation that includes hooking into IP2/IP3 and doing further
interrupt demuxing as appropriate.
2015-01-06 07:43:07 +00:00
..
2015-01-05 02:00:41 +00:00
2015-01-05 01:59:44 +00:00
2013-03-29 06:32:02 +00:00