d478c9fe53
Approved by: adrian (mentor) Sponsored by: Smartcom - Bulgaria AD Differential Revision: https://reviews.freebsd.org/D5995
327 lines
9.1 KiB
C
327 lines
9.1 KiB
C
/*-
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* Copyright (c) 2016 Stanislav Galabov.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/stddef.h>
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#include <sys/param.h>
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#include <sys/types.h>
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#include <sys/kernel.h>
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#include <sys/bus.h>
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#include <sys/module.h>
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#include <machine/bus.h>
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#include <dev/fdt/fdt_common.h>
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#include <dev/fdt/fdt_clock.h>
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#include <mips/mediatek/fdt_reset.h>
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#include <dev/ofw/ofw_bus.h>
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#include <dev/ofw/ofw_bus_subr.h>
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#include <mips/mediatek/mtk_sysctl.h>
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#include <mips/mediatek/mtk_soc.h>
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#include <mips/mediatek/mtk_usb_phy.h>
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#define RESET_ASSERT_DELAY 1000
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#define RESET_DEASSERT_DELAY 10000
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struct mtk_usb_phy_softc {
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device_t dev;
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struct resource * res;
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uint32_t fm_base;
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uint32_t u2_base;
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uint32_t sr_coef;
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uint32_t socid;
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};
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#define USB_PHY_READ(_sc, _off) bus_read_4((_sc)->res, (_off))
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#define USB_PHY_WRITE(_sc, _off, _val) bus_write_4((_sc)->res, (_off), (_val))
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#define USB_PHY_CLR_SET(_sc, _off, _clr, _set) \
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USB_PHY_WRITE(_sc, _off, ((USB_PHY_READ(_sc, _off) & ~(_clr)) | (_set)))
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#define USB_PHY_READ_U2(_sc, _off) \
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USB_PHY_READ((_sc), ((_sc)->u2_base + (_off)))
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#define USB_PHY_WRITE_U2(_sc, _off, _val) \
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USB_PHY_WRITE((_sc), ((_sc)->u2_base + (_off)), (_val))
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#define USB_PHY_CLR_SET_U2(_sc, _off, _clr, _set) \
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USB_PHY_WRITE_U2((_sc), (_off), ((USB_PHY_READ_U2((_sc), (_off)) & \
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~(_clr)) | (_set)))
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#define USB_PHY_BARRIER(_sc) bus_barrier((_sc)->res, 0, 0, \
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BUS_SPACE_BARRIER_WRITE | BUS_SPACE_BARRIER_READ)
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#define USB_PHY_READ_FM(_sc, _off) \
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USB_PHY_READ((_sc), ((_sc)->fm_base + (_off)))
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#define USB_PHY_WRITE_FM(_sc, _off) \
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USB_PHY_WRITE((_sc), ((_sc)->fm_base + (_off)), (_val))
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#define USB_PHY_CLR_SET_FM(_sc, _off, _clr, _set) \
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USB_PHY_WRITE_U2((_sc), (_off), ((USB_PHY_READ_U2((_sc), (_off)) & \
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~(_clr)) | (_set)))
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static void mtk_usb_phy_mt7621_init(device_t);
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static void mtk_usb_phy_mt7628_init(device_t);
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static struct ofw_compat_data compat_data[] = {
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{ "ralink,mt7620-usbphy", MTK_SOC_MT7620A },
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{ "mediatek,mt7620-usbphy", MTK_SOC_MT7620A },
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{ "ralink,mt7628an-usbphy", MTK_SOC_MT7628 },
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{ "ralink,rt3352-usbphy", MTK_SOC_RT3352 },
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{ "ralink,rt3050-usbphy", MTK_SOC_RT3050 },
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{ NULL, MTK_SOC_UNKNOWN }
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};
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static int
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mtk_usb_phy_probe(device_t dev)
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{
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struct mtk_usb_phy_softc *sc = device_get_softc(dev);
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if (!ofw_bus_status_okay(dev))
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return (ENXIO);
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if ((sc->socid =
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ofw_bus_search_compatible(dev, compat_data)->ocd_data) ==
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MTK_SOC_UNKNOWN)
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return (ENXIO);
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device_set_desc(dev, "MTK USB PHY");
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return (0);
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}
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static int
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mtk_usb_phy_attach(device_t dev)
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{
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struct mtk_usb_phy_softc * sc = device_get_softc(dev);
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phandle_t node;
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uint32_t val;
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int rid;
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sc->dev = dev;
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/* Get our FDT node and SoC id */
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node = ofw_bus_get_node(dev);
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/* Now let's see about setting USB to host or device mode */
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/* XXX: is it the same for all SoCs? */
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val = mtk_sysctl_get(SYSCTL_SYSCFG1);
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if (OF_hasprop(node, "mtk,usb-device"))
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val &= ~SYSCFG1_USB_HOST_MODE;
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else
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val |= SYSCFG1_USB_HOST_MODE;
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mtk_sysctl_set(SYSCTL_SYSCFG1, val);
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/* If we have clocks defined - enable them */
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if (OF_hasprop(node, "clocks"))
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fdt_clock_enable_all(dev);
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/* If we have resets defined - perform a reset sequence */
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if (OF_hasprop(node, "resets")) {
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fdt_reset_assert_all(dev);
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DELAY(RESET_ASSERT_DELAY);
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fdt_reset_deassert_all(dev);
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DELAY(RESET_DEASSERT_DELAY);
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}
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/* Careful, some devices actually require resources */
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if (OF_hasprop(node, "reg")) {
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rid = 0;
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sc->res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
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RF_ACTIVE);
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if (sc->res == NULL) {
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device_printf(dev, "could not map memory\n");
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return (ENXIO);
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}
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} else {
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sc->res = NULL;
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}
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/* Some SoCs require specific USB PHY init... handle these */
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switch (sc->socid) {
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case MTK_SOC_MT7628: /* Fallthrough */
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case MTK_SOC_MT7688:
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if (sc->res == NULL)
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return (ENXIO);
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sc->fm_base = MT7628_FM_FEG_BASE;
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sc->u2_base = MT7628_U2_BASE;
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sc->sr_coef = MT7628_SR_COEF;
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mtk_usb_phy_mt7628_init(dev);
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break;
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case MTK_SOC_MT7621:
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if (sc->res == NULL)
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return (ENXIO);
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sc->fm_base = MT7621_FM_FEG_BASE;
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sc->u2_base = MT7621_U2_BASE;
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sc->sr_coef = MT7621_SR_COEF;
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mtk_usb_phy_mt7621_init(dev);
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break;
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}
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/* We no longer need the resources, release them */
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if (sc->res != NULL)
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bus_release_resource(dev, SYS_RES_MEMORY, 0, sc->res);
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return (0);
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}
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static int
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mtk_usb_phy_detach(device_t dev)
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{
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struct mtk_usb_phy_softc *sc = device_get_softc(dev);
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phandle_t node;
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/* Get our FDT node */
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node = ofw_bus_get_node(dev);
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/* If we have resets defined - assert them */
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if (OF_hasprop(node, "resets"))
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fdt_reset_assert_all(dev);
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/* If we have clocks defined - disable them */
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if (OF_hasprop(node, "clocks"))
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fdt_clock_disable_all(dev);
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/* Finally, release resources, if any were allocated */
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if (sc->res != NULL)
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bus_release_resource(dev, SYS_RES_MEMORY, 0, sc->res);
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return (0);
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}
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/*
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* Things currently seem to work a lot better without slew rate calibration
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* both on MT7621 and MT7688, so we leave it out for now.
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*/
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#ifdef notyet
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static void
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mtk_usb_phy_slew_rate_calibration(struct mtk_usb_phy_softc *sc)
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{
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uint32_t val;
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int i;
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USB_PHY_CLR_SET_U2(sc, U2_PHY_ACR0, 0, SRCAL_EN);
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USB_PHY_BARRIER(sc);
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DELAY(1000);
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USB_PHY_CLR_SET_FM(sc, U2_PHY_FMMONR1, 0, FRCK_EN);
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USB_PHY_BARRIER(sc);
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USB_PHY_CLR_SET_FM(sc, U2_PHY_FMCR0, CYCLECNT, 0x400);
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USB_PHY_BARRIER(sc);
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USB_PHY_CLR_SET_FM(sc, U2_PHY_FMCR0, 0, FDET_EN);
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USB_PHY_BARRIER(sc);
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for (i = 0; i < 1000; i++) {
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if ((val = USB_PHY_READ_FM(sc, U2_PHY_FMMONR0)) != 0) {
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device_printf(sc->dev, "DONE with FDET\n");
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break;
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}
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DELAY(10000);
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}
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device_printf(sc->dev, "After FDET\n");
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USB_PHY_CLR_SET_FM(sc, U2_PHY_FMCR0, FDET_EN, 0);
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USB_PHY_BARRIER(sc);
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USB_PHY_CLR_SET_FM(sc, U2_PHY_FMMONR1, FRCK_EN, 0);
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USB_PHY_BARRIER(sc);
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USB_PHY_CLR_SET_U2(sc, U2_PHY_ACR0, SRCAL_EN, 0);
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USB_PHY_BARRIER(sc);
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DELAY(1000);
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if (val == 0) {
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USB_PHY_CLR_SET_U2(sc, U2_PHY_ACR0, SRCTRL, 0x4 << SRCTRL_OFF);
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USB_PHY_BARRIER(sc);
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} else {
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val = ((((1024 * 25 * sc->sr_coef) / val) + 500) / 1000) &
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SRCTRL_MSK;
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USB_PHY_CLR_SET_U2(sc, U2_PHY_ACR0, SRCTRL, val << SRCTRL_OFF);
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USB_PHY_BARRIER(sc);
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}
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}
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#endif
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static void
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mtk_usb_phy_mt7621_init(device_t dev)
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{
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#ifdef notyet
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struct mtk_usb_phy_softc *sc = device_get_softc(dev);
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/* Slew rate calibration only, but for 2 ports */
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mtk_usb_phy_slew_rate_calibration(sc);
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sc->u2_base = MT7621_U2_BASE_P1;
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mtk_usb_phy_slew_rate_calibration(sc);
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#endif
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}
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static void
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mtk_usb_phy_mt7628_init(device_t dev)
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{
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struct mtk_usb_phy_softc *sc = device_get_softc(dev);
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/* XXX: possibly add barriers between the next writes? */
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USB_PHY_WRITE_U2(sc, U2_PHY_DCR0, 0x00ffff02);
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USB_PHY_BARRIER(sc);
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USB_PHY_WRITE_U2(sc, U2_PHY_DCR0, 0x00555502);
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USB_PHY_BARRIER(sc);
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USB_PHY_WRITE_U2(sc, U2_PHY_DCR0, 0x00aaaa02);
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USB_PHY_BARRIER(sc);
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USB_PHY_WRITE_U2(sc, U2_PHY_DCR0, 0x00000402);
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USB_PHY_BARRIER(sc);
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USB_PHY_WRITE_U2(sc, U2_PHY_AC0, 0x0048086a);
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USB_PHY_BARRIER(sc);
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USB_PHY_WRITE_U2(sc, U2_PHY_AC1, 0x4400001c);
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USB_PHY_BARRIER(sc);
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USB_PHY_WRITE_U2(sc, U2_PHY_ACR3, 0xc0200000);
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USB_PHY_BARRIER(sc);
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USB_PHY_WRITE_U2(sc, U2_PHY_DTM0, 0x02000000);
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USB_PHY_BARRIER(sc);
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#ifdef notyet
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/* Slew rate calibration */
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mtk_usb_phy_slew_rate_calibration(sc);
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#endif
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}
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static device_method_t mtk_usb_phy_methods[] = {
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/* Device interface */
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DEVMETHOD(device_probe, mtk_usb_phy_probe),
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DEVMETHOD(device_attach, mtk_usb_phy_attach),
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DEVMETHOD(device_detach, mtk_usb_phy_detach),
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DEVMETHOD(device_suspend, bus_generic_suspend),
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DEVMETHOD(device_resume, bus_generic_resume),
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DEVMETHOD(device_shutdown, bus_generic_shutdown),
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DEVMETHOD_END
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};
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static driver_t mtk_usb_phy_driver = {
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.name = "usbphy",
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.methods = mtk_usb_phy_methods,
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.size = sizeof(struct mtk_usb_phy_softc),
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};
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static devclass_t mtk_usb_phy_devclass;
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DRIVER_MODULE(usbphy, simplebus, mtk_usb_phy_driver, mtk_usb_phy_devclass, 0,
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0);
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