219d14fe5f
Executive is a library that can be used by standalone applications and kernels to abstract access to Octeon SoC and board-specific hardware and facilities. The FreeBSD port to Octeon will be updated to use this where possible.
203 lines
13 KiB
C
203 lines
13 KiB
C
/***********************license start***************
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* Copyright (c) 2003-2008 Cavium Networks (support@cavium.com). All rights
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* reserved.
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*
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met:
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*
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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*
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* * Redistributions in binary form must reproduce the above
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* copyright notice, this list of conditions and the following
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* disclaimer in the documentation and/or other materials provided
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* with the distribution.
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*
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* * Neither the name of Cavium Networks nor the names of
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* its contributors may be used to endorse or promote products
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* derived from this software without specific prior written
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* permission.
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*
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* TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS"
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* AND WITH ALL FAULTS AND CAVIUM NETWORKS MAKES NO PROMISES, REPRESENTATIONS
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* OR WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH
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* RESPECT TO THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY
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* REPRESENTATION OR DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT
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* DEFECTS, AND CAVIUM SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES
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* OF TITLE, MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR
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* PURPOSE, LACK OF VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET
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* POSSESSION OR CORRESPONDENCE TO DESCRIPTION. THE ENTIRE RISK ARISING OUT
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* OF USE OR PERFORMANCE OF THE SOFTWARE LIES WITH YOU.
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*
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*
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* For any questions regarding licensing please contact marketing@caviumnetworks.com
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*
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***********************license end**************************************/
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/**
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* @file
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*
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* Interface to RAID block. This is not available on all chips.
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*
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* <hr>$Revision: 41586 $<hr>
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*/
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#ifndef __CVMX_RAID_H__
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#define __CVMX_RAID_H__
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* This structure defines the type of command words the RAID block
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* will accept.
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*/
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typedef union
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{
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uint64_t u64;
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struct
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{
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uint64_t reserved_37_63 : 27; /**< Must be zero */
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uint64_t q_cmp : 1; /**< Indicates whether the Q pipe is in normal mode (CWORD[Q_CMP]=0) or in non-zero
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byte detect mode (CWORD[Q_CMP]=1).
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In non-zero byte detect mode, the Q OWORD[PTR] result is the non-zero detect
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result, which indicates the position of the first non-zero byte in the pipe result bytes.
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CWORD[Q_CMP] must not be set when CWORD[QOUT]=0, and must not be set
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when CWORD[Q_XOR] is set. */
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uint64_t p_cmp : 1; /**< Indicates whether the P pipe is in normal mode (CWORD[P_CMP]=0) or in non-zero
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byte detect mode (CWORD[P_CMP]=1).
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In non-zero byte detect mode, the P OWORD[PTR] result is the non-zero detect
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result, which indicates the position of the first non-zero byte in the pipe result bytes.
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CWORD[P_CMP] must not be set when CWORD[POUT]=0, and must not be set
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when CWORD[P_XOR] is set. */
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uint64_t q_xor : 1; /**< Indicates whether the Q output buffer bytes are the normal Q pipe result or the
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normal Q pipe result exclusive-OR'ed with the P pipe result.
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When CWORD[Q_XOR]=0 (and CWORD[Q_CMP]=0), the Q output buffer bytes are
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the normal Q pipe result, which does not include the P pipe result in any way.
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When CWORD[Q_XOR]=1, the Q output buffer bytes are the normal Q pipe result
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exclusive-OR'ed with the P pipe result, as if the P pipe result were another Q IWORD
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for the Q pipe with QMULT=1.
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CWORD[Q_XOR] must not be set unless both CWORD[POUT,QOUT] are set, and
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must not be set when CWORD[Q_CMP] is set. */
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uint64_t p_xor : 1; /**< Indicates whether the P output buffer bytes are the normal P pipe result or the
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normal P pipe result exclusive-OR'ed with the Q pipe result.
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When CWORD[P_XOR]=0 (and CWORD[P_CMP]=0), the P output buffer bytes are
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the normal P pipe result, which does not include the Q pipe result in any way.
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When CWORD[P_XOR]=1, the P output buffer bytes are the normal P pipe result
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exclusive-OR'ed with the Q pipe result, as if the Q pipe result were another P
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IWORD for the P pipe.
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CWORD[P_XOR] must not be set unless both CWORD[POUT,QOUT] are set, and
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must not be set when CWORD[P_CMP] is set. */
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uint64_t wqe : 1; /**< Indicates whether RAD submits a work queue entry or writes an L2/DRAM byte to
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zero after completing the instruction.
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When CWORD[WQE] is set and RESP[PTR]!=0, RAD adds the work queue entry
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indicated by RESP[PTR] to the selected POW input queue after completing the
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instruction.
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When CWORD[WQE] is clear and RESP[PTR]!=0, RAD writes the L2/DRAM byte
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indicated by RESP[PTR] to zero after completing the instruction. */
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uint64_t qout : 1; /**< Indicates whether the Q pipe is used by this instruction.
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If CWORD[QOUT] is set, IWORD[QEN] must be set for at least one IWORD.
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At least one of CWORD[QOUT,POUT] must be set. */
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uint64_t pout : 1; /**< Indicates whether the P pipe is used by this instruction.
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If CWORD[POUT] is set, IWORD[PEN] must be set for at least one IWORD.
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At least one of CWORD[QOUT,POUT] must be set. */
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uint64_t iword : 6; /**< Indicates the number of input buffers used.
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1 <= CWORD[IWORD] <= 32. */
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uint64_t size : 24; /**< Indicates the size in bytes of all input buffers. When CWORD[Q_CMP,P_CMP]=0,
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also indicates the size of the Q/P output buffers.
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CWORD[SIZE] must be a multiple of 8B (i.e. <2:0> must be zero). */
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} cword;
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struct
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{
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uint64_t reserved_58_63 : 6; /**< Must be zero */
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uint64_t fw : 1; /**< When set, indicates that RAD can modify any byte in any (128B) cache line touched
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by L2/DRAM addresses OWORD[PTR] through OWORD[PTR]+CWORD[SIZE]<5D>1.
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Setting OWORD[FW] can improve hardware performance, as some DRAM loads can
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be avoided on L2 cache misses. The Q OWORD[FW] must not be set when
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CWORD[Q_CMP] is set, and the P OWORD[FW] must not be set when
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CWORD[P_CMP] is set. */
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uint64_t nc : 1; /**< When set, indicates that RAD should not allocate L2 cache space for the P/Q data on
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L2 cache misses.
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OWORD[NC] should typically be clear, though setting OWORD[NC] can improve
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performance in some circumstances, as the L2 cache will not be polluted by P/Q data.
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The Q OWORD[NC] must not be set when CWORD[Q_CMP] is set, and the P
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OWORD[NC] must not be set when CWORD[P_CMP] is set. */
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uint64_t reserved_40_55 : 16; /**< Must be zero */
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uint64_t addr : 40; /**< When CWORD[P_CMP,Q_CMP]=0, OWORD[PTR] indicates the starting address of
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the L2/DRAM buffer that will receive the P/Q data. In the non-compare mode, the
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output buffer receives all of the output buffer bytes.
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When CWORD[P_CMP,Q_CMP]=1, the corresponding P/Q pipe is in compare mode,
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and the only output of the pipe is the non-zero detect result. In this case,
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OWORD[PTR] indicates the 8-byte location of the non-zero detect result. */
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} oword;
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struct
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{
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uint64_t reserved_57_63 : 7; /**< Must be zero */
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uint64_t nc : 1; /**< When set, indicates that RAD should not allocate L2 cache space for this input buffer
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data on L2 cache misses.
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Setting IWORD[NC] may improve performance in some circumstances, as the L2
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cache may not be polluted with input buffer data. */
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uint64_t reserved_50_55 : 6; /**< Must be zero */
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uint64_t qen : 1; /**< Indicates that this input buffer data should participate in the Q pipe result.
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The Q pipe hardware multiplies each participating input byte by IWORD[QMULT]
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before accumulating them by exclusive-OR'ing.
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IWORD[QEN] must not be set when CWORD[QOUT] is not set.
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If CWORD[QOUT] is set, IWORD[QEN] must be set for at least one IWORD. */
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uint64_t pen : 1; /**< Indicates that this input buffer data should participate in the P pipe result.
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The P pipe hardware accumulates each participating input byte by bit-wise
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exclusive-OR'ing it.
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IWORD[PEN] must not be set when CWORD[POUT] is not set.
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If CWORD[POUT] is set, IWORD[PEN] must be set for at least one IWORD. */
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uint64_t qmult : 8; /**< The Q pipe multiplier for the input buffer. Section 26.1 above describes the GF(28)
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multiplication algorithm.
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IWORD[QMULT] must be zero when IWORD[QEN] is not set.
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IWORD[QMULT] must not be zero when IWORD[QEN] is set.
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When IWORD[QMULT] is 1, the multiplication simplifies to the identity function,
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and the Q pipe performs the same XOR function as the P pipe. */
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uint64_t addr : 40; /**< The starting address of the input buffer in L2/DRAM.
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IWORD[PTR] must be naturally-aligned on an 8 byte boundary (i.e. <2:0> must be
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zero). */
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} iword;
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} cvmx_raid_word_t;
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/**
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* Initialize the RAID block
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*
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* @param polynomial Coefficients for the RAID polynomial
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*
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* @return Zero on success, negative on failure
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*/
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int cvmx_raid_initialize(cvmx_rad_reg_polynomial_t polynomial);
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/**
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* Shutdown the RAID block. RAID must be idle when
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* this function is called.
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*
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* @return Zero on success, negative on failure
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*/
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int cvmx_raid_shutdown(void);
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/**
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* Submit a command to the RAID block
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*
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* @param num_words Number of command words to submit
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* @param words Command words
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*
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* @return Zero on success, negative on failure
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*/
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int cvmx_raid_submit(int num_words, cvmx_raid_word_t words[]);
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#ifdef __cplusplus
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}
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#endif
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#endif // __CVMX_CMD_QUEUE_H__
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