219d14fe5f
Executive is a library that can be used by standalone applications and kernels to abstract access to Octeon SoC and board-specific hardware and facilities. The FreeBSD port to Octeon will be updated to use this where possible.
163 lines
4.9 KiB
C
163 lines
4.9 KiB
C
/***********************license start***************
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* Copyright (c) 2003-2008 Cavium Networks (support@cavium.com). All rights
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* reserved.
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*
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met:
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*
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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*
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* * Redistributions in binary form must reproduce the above
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* copyright notice, this list of conditions and the following
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* disclaimer in the documentation and/or other materials provided
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* with the distribution.
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*
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* * Neither the name of Cavium Networks nor the names of
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* its contributors may be used to endorse or promote products
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* derived from this software without specific prior written
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* permission.
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*
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* TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS"
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* AND WITH ALL FAULTS AND CAVIUM NETWORKS MAKES NO PROMISES, REPRESENTATIONS
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* OR WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH
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* RESPECT TO THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY
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* REPRESENTATION OR DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT
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* DEFECTS, AND CAVIUM SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES
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* OF TITLE, MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR
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* PURPOSE, LACK OF VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET
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* POSSESSION OR CORRESPONDENCE TO DESCRIPTION. THE ENTIRE RISK ARISING OUT
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* OF USE OR PERFORMANCE OF THE SOFTWARE LIES WITH YOU.
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*
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*
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* For any questions regarding licensing please contact marketing@caviumnetworks.com
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*
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***********************license end**************************************/
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/**
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* @file
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*
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* Function and structure definitions for random number generator hardware
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*
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* <hr>$Revision: 41586 $<hr>
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*/
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#ifndef __CMVX_RNG_H__
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#define __CMVX_RNG_H__
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#ifdef __cplusplus
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extern "C" {
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#endif
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#define CVMX_RNG_LOAD_ADDRESS CVMX_ADD_IO_SEG(cvmx_build_io_address(CVMX_OCT_DID_RNG, 0))
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/**
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* Structure describing the data format used for IOBDMA stores to the RNG.
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*/
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typedef union
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{
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uint64_t u64;
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struct {
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uint64_t scraddr : 8; /**< the (64-bit word) location in scratchpad to write to (if len != 0) */
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uint64_t len : 8; /**< the number of words in the response (0 => no response) */
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uint64_t did : 5; /**< the ID of the device on the non-coherent bus */
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uint64_t subdid : 3; /**< the sub ID of the device on the non-coherent bus */
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uint64_t addr :40; /**< the address that will appear in the first tick on the NCB bus */
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} s;
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} cvmx_rng_iobdma_data_t;
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/**
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* Enables the random number generator. Must be called before RNG is used
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*/
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static inline void cvmx_rng_enable(void)
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{
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cvmx_rnm_ctl_status_t rnm_ctl_status;
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rnm_ctl_status.u64 = 0;
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rnm_ctl_status.s.ent_en = 1;
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rnm_ctl_status.s.rng_en = 1;
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cvmx_write_csr(CVMX_RNM_CTL_STATUS, rnm_ctl_status.u64);
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}
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/**
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* Reads 8 bits of random data from Random number generator
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*
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* @return random data
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*/
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static inline uint8_t cvmx_rng_get_random8(void)
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{
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return cvmx_read64_uint8(CVMX_RNG_LOAD_ADDRESS);
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}
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/**
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* Reads 16 bits of random data from Random number generator
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*
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* @return random data
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*/
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static inline uint16_t cvmx_rng_get_random16(void)
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{
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return cvmx_read64_uint16(CVMX_RNG_LOAD_ADDRESS);
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}
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/**
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* Reads 32 bits of random data from Random number generator
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*
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* @return random data
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*/
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static inline uint32_t cvmx_rng_get_random32(void)
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{
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return cvmx_read64_uint32(CVMX_RNG_LOAD_ADDRESS);
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}
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/**
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* Reads 64 bits of random data from Random number generator
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*
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* @return random data
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*/
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static inline uint64_t cvmx_rng_get_random64(void)
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{
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return cvmx_read64_uint64(CVMX_RNG_LOAD_ADDRESS);
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}
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/**
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* Requests random data from the RNG block asynchronously using and IOBDMA operation.
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* The random data will be written into the cores
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* local memory at the specified address. A SYNCIOBDMA
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* operation should be issued to stall for completion of the write.
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*
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* @param scr_addr Address in scratch memory to put the result
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* MUST be a multiple of 8 bytes
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* @param num_bytes Number of bytes of random data to write at
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* scr_addr
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* MUST be a multiple of 8 bytes
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*
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* @return 0 on success
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* 1 on error
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*/
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static inline int cvmx_rng_request_random_async(uint64_t scr_addr, uint64_t num_bytes)
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{
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cvmx_rng_iobdma_data_t data;
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if (num_bytes & 0x7 || scr_addr & 0x7)
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return(1);
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/* scr_addr must be 8 byte aligned */
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data.s.scraddr = scr_addr >> 3;
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data.s.len = num_bytes >> 3;
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data.s.did = CVMX_OCT_DID_RNG;
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cvmx_send_single(data.u64);
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return(0);
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}
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#ifdef __cplusplus
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}
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#endif
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#endif /* __CMVX_RNG_H__ */
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