ef2ee5d07a
The following pheripherals are supported: UART, MMC, AHCI, EHCI, PCIe, I2C, PMIC, GPIO, CPU temperature and clock. Note: The PCIe driver is pure mash at this moment. It will be reworked immediately when both D5237 and D2579 enter the current tree.
578 lines
15 KiB
C
578 lines
15 KiB
C
/*-
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* Copyright (c) 2016 Michal Meloun <mmel@FreeBSD.org>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/gpio.h>
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#include <sys/kernel.h>
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#include <sys/malloc.h>
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#include <sys/sx.h>
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#include <machine/bus.h>
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#include <dev/fdt/fdt_common.h>
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#include <dev/gpio/gpiobusvar.h>
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#include "as3722.h"
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MALLOC_DEFINE(M_AS3722_GPIO, "AS3722 gpio", "AS3722 GPIO");
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/* AS3722_GPIOx_CONTROL MODE and IOSF definition. */
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#define AS3722_IOSF_GPIO 0x00
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#define AS3722_IOSF_INTERRUPT_OUT 0x01
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#define AS3722_IOSF_VSUP_VBAT_LOW_UNDEBOUNCE_OUT 0x02
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#define AS3722_IOSF_GPIO_IN_INTERRUPT 0x03
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#define AS3722_IOSF_PWM_IN 0x04
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#define AS3722_IOSF_VOLTAGE_IN_STANDBY 0x05
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#define AS3722_IOSF_OC_PG_SD0 0x06
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#define AS3722_IOSF_POWERGOOD_OUT 0x07
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#define AS3722_IOSF_CLK32K_OUT 0x08
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#define AS3722_IOSF_WATCHDOG_IN 0x09
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#define AS3722_IOSF_SOFT_RESET_IN 0x0b
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#define AS3722_IOSF_PWM_OUT 0x0c
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#define AS3722_IOSF_VSUP_VBAT_LOW_DEBOUNCE_OUT 0x0d
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#define AS3722_IOSF_OC_PG_SD6 0x0e
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#define AS3722_MODE_INPUT 0
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#define AS3722_MODE_PUSH_PULL 1
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#define AS3722_MODE_OPEN_DRAIN 2
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#define AS3722_MODE_TRISTATE 3
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#define AS3722_MODE_INPUT_PULL_UP_LV 4
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#define AS3722_MODE_INPUT_PULL_DOWN 5
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#define AS3722_MODE_OPEN_DRAIN_LV 6
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#define AS3722_MODE_PUSH_PULL_LV 7
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#define NGPIO 8
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#define GPIO_LOCK(_sc) sx_slock(&(_sc)->gpio_lock)
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#define GPIO_UNLOCK(_sc) sx_unlock(&(_sc)->gpio_lock)
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#define GPIO_ASSERT(_sc) sx_assert(&(_sc)->gpio_lock, SA_LOCKED)
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#define AS3722_CFG_BIAS_DISABLE 0x0001
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#define AS3722_CFG_BIAS_PULL_UP 0x0002
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#define AS3722_CFG_BIAS_PULL_DOWN 0x0004
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#define AS3722_CFG_BIAS_HIGH_IMPEDANCE 0x0008
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#define AS3722_CFG_OPEN_DRAIN 0x0010
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static const struct {
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const char *name;
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int config; /* AS3722_CFG_ */
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} as3722_cfg_names[] = {
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{"bias-disable", AS3722_CFG_BIAS_DISABLE},
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{"bias-pull-up", AS3722_CFG_BIAS_PULL_UP},
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{"bias-pull-down", AS3722_CFG_BIAS_PULL_DOWN},
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{"bias-high-impedance", AS3722_CFG_BIAS_HIGH_IMPEDANCE},
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{"drive-open-drain", AS3722_CFG_OPEN_DRAIN},
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};
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static struct {
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const char *name;
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int fnc_val;
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} as3722_fnc_table[] = {
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{"gpio", AS3722_IOSF_GPIO},
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{"interrupt-out", AS3722_IOSF_INTERRUPT_OUT},
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{"vsup-vbat-low-undebounce-out", AS3722_IOSF_VSUP_VBAT_LOW_UNDEBOUNCE_OUT},
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{"gpio-in-interrupt", AS3722_IOSF_GPIO_IN_INTERRUPT},
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{"pwm-in", AS3722_IOSF_PWM_IN},
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{"voltage-in-standby", AS3722_IOSF_VOLTAGE_IN_STANDBY},
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{"oc-pg-sd0", AS3722_IOSF_OC_PG_SD0},
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{"powergood-out", AS3722_IOSF_POWERGOOD_OUT},
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{"clk32k-out", AS3722_IOSF_CLK32K_OUT},
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{"watchdog-in", AS3722_IOSF_WATCHDOG_IN},
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{"soft-reset-in", AS3722_IOSF_SOFT_RESET_IN},
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{"pwm-out", AS3722_IOSF_PWM_OUT},
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{"vsup-vbat-low-debounce-out", AS3722_IOSF_VSUP_VBAT_LOW_DEBOUNCE_OUT},
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{"oc-pg-sd6", AS3722_IOSF_OC_PG_SD6},
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};
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struct as3722_pincfg {
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char *function;
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int flags;
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};
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struct as3722_gpio_pin {
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int pin_caps;
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uint8_t pin_ctrl_reg;
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char pin_name[GPIOMAXNAME];
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int pin_cfg_flags;
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};
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/* --------------------------------------------------------------------------
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*
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* Pinmux functions.
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*/
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static int
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as3722_pinmux_get_function(struct as3722_softc *sc, char *name)
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{
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int i;
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for (i = 0; i < nitems(as3722_fnc_table); i++) {
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if (strcmp(as3722_fnc_table[i].name, name) == 0)
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return (as3722_fnc_table[i].fnc_val);
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}
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return (-1);
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}
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static int
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as3722_pinmux_config_node(struct as3722_softc *sc, char *pin_name,
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struct as3722_pincfg *cfg)
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{
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uint8_t ctrl;
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int rv, fnc, pin;
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for (pin = 0; pin < sc->gpio_npins; pin++) {
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if (strcmp(sc->gpio_pins[pin]->pin_name, pin_name) == 0)
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break;
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}
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if (pin >= sc->gpio_npins) {
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device_printf(sc->dev, "Unknown pin: %s\n", pin_name);
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return (ENXIO);
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}
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ctrl = sc->gpio_pins[pin]->pin_ctrl_reg;
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sc->gpio_pins[pin]->pin_cfg_flags = cfg->flags;
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if (cfg->function != NULL) {
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fnc = as3722_pinmux_get_function(sc, cfg->function);
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if (fnc == -1) {
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device_printf(sc->dev,
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"Unknown function %s for pin %s\n", cfg->function,
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sc->gpio_pins[pin]->pin_name);
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return (ENXIO);
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}
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switch (fnc) {
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case AS3722_IOSF_INTERRUPT_OUT:
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case AS3722_IOSF_VSUP_VBAT_LOW_UNDEBOUNCE_OUT:
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case AS3722_IOSF_OC_PG_SD0:
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case AS3722_IOSF_POWERGOOD_OUT:
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case AS3722_IOSF_CLK32K_OUT:
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case AS3722_IOSF_PWM_OUT:
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case AS3722_IOSF_OC_PG_SD6:
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ctrl &= ~(AS3722_GPIO_MODE_MASK <<
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AS3722_GPIO_MODE_SHIFT);
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ctrl |= AS3722_MODE_PUSH_PULL << AS3722_GPIO_MODE_SHIFT;
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/* XXX Handle flags (OC + pullup) */
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break;
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case AS3722_IOSF_GPIO_IN_INTERRUPT:
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case AS3722_IOSF_PWM_IN:
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case AS3722_IOSF_VOLTAGE_IN_STANDBY:
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case AS3722_IOSF_WATCHDOG_IN:
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case AS3722_IOSF_SOFT_RESET_IN:
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ctrl &= ~(AS3722_GPIO_MODE_MASK <<
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AS3722_GPIO_MODE_SHIFT);
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ctrl |= AS3722_MODE_INPUT << AS3722_GPIO_MODE_SHIFT;
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/* XXX Handle flags (pulldown + pullup) */
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default:
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break;
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}
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ctrl &= ~(AS3722_GPIO_IOSF_MASK << AS3722_GPIO_IOSF_SHIFT);
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ctrl |= fnc << AS3722_GPIO_IOSF_SHIFT;
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}
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rv = 0;
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if (ctrl != sc->gpio_pins[pin]->pin_ctrl_reg) {
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rv = WR1(sc, AS3722_GPIO0_CONTROL + pin, ctrl);
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sc->gpio_pins[pin]->pin_ctrl_reg = ctrl;
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}
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return (rv);
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}
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static int
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as3722_pinmux_read_node(struct as3722_softc *sc, phandle_t node,
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struct as3722_pincfg *cfg, char **pins, int *lpins)
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{
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int rv, i;
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*lpins = OF_getprop_alloc(node, "pins", 1, (void **)pins);
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if (*lpins <= 0)
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return (ENOENT);
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/* Read function (mux) settings. */
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rv = OF_getprop_alloc(node, "function", 1, (void **)&cfg->function);
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if (rv <= 0)
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cfg->function = NULL;
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/* Read boolean properties. */
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for (i = 0; i < nitems(as3722_cfg_names); i++) {
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if (OF_hasprop(node, as3722_cfg_names[i].name))
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cfg->flags |= as3722_cfg_names[i].config;
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}
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return (0);
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}
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static int
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as3722_pinmux_process_node(struct as3722_softc *sc, phandle_t node)
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{
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struct as3722_pincfg cfg;
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char *pins, *pname;
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int i, len, lpins, rv;
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rv = as3722_pinmux_read_node(sc, node, &cfg, &pins, &lpins);
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if (rv != 0)
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return (rv);
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len = 0;
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pname = pins;
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do {
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i = strlen(pname) + 1;
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rv = as3722_pinmux_config_node(sc, pname, &cfg);
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if (rv != 0) {
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device_printf(sc->dev,
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"Cannot configure pin: %s: %d\n", pname, rv);
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}
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len += i;
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pname += i;
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} while (len < lpins);
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if (pins != NULL)
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free(pins, M_OFWPROP);
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if (cfg.function != NULL)
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free(cfg.function, M_OFWPROP);
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return (rv);
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}
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int as3722_pinmux_configure(device_t dev, phandle_t cfgxref)
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{
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struct as3722_softc *sc;
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phandle_t node, cfgnode;
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int rv;
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sc = device_get_softc(dev);
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cfgnode = OF_node_from_xref(cfgxref);
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for (node = OF_child(cfgnode); node != 0; node = OF_peer(node)) {
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if (!fdt_is_enabled(node))
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continue;
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rv = as3722_pinmux_process_node(sc, node);
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if (rv != 0)
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device_printf(dev, "Failed to process pinmux");
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}
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return (0);
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}
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/* --------------------------------------------------------------------------
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*
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* GPIO
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*/
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device_t
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as3722_gpio_get_bus(device_t dev)
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{
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struct as3722_softc *sc;
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sc = device_get_softc(dev);
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return (sc->gpio_busdev);
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}
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int
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as3722_gpio_pin_max(device_t dev, int *maxpin)
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{
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*maxpin = NGPIO - 1;
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return (0);
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}
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int
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as3722_gpio_pin_getcaps(device_t dev, uint32_t pin, uint32_t *caps)
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{
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struct as3722_softc *sc;
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sc = device_get_softc(dev);
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if (pin >= sc->gpio_npins)
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return (EINVAL);
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GPIO_LOCK(sc);
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*caps = sc->gpio_pins[pin]->pin_caps;
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GPIO_UNLOCK(sc);
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return (0);
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}
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int
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as3722_gpio_pin_getname(device_t dev, uint32_t pin, char *name)
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{
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struct as3722_softc *sc;
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sc = device_get_softc(dev);
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if (pin >= sc->gpio_npins)
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return (EINVAL);
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GPIO_LOCK(sc);
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memcpy(name, sc->gpio_pins[pin]->pin_name, GPIOMAXNAME);
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GPIO_UNLOCK(sc);
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return (0);
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}
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int
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as3722_gpio_pin_getflags(device_t dev, uint32_t pin, uint32_t *out_flags)
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{
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struct as3722_softc *sc;
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uint8_t tmp, mode, iosf;
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uint32_t flags;
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bool inverted;
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sc = device_get_softc(dev);
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if (pin >= sc->gpio_npins)
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return (EINVAL);
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GPIO_LOCK(sc);
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tmp = sc->gpio_pins[pin]->pin_ctrl_reg;
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GPIO_UNLOCK(sc);
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iosf = (tmp >> AS3722_GPIO_IOSF_SHIFT) & AS3722_GPIO_IOSF_MASK;
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mode = (tmp >> AS3722_GPIO_MODE_SHIFT) & AS3722_GPIO_MODE_MASK;
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inverted = (tmp & AS3722_GPIO_INVERT) != 0;
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/* Is pin in GPIO mode ? */
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if (iosf != AS3722_IOSF_GPIO)
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return (ENXIO);
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flags = 0;
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switch (mode) {
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case AS3722_MODE_INPUT:
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flags = GPIO_PIN_INPUT;
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break;
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case AS3722_MODE_PUSH_PULL:
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case AS3722_MODE_PUSH_PULL_LV:
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flags = GPIO_PIN_OUTPUT;
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break;
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case AS3722_MODE_OPEN_DRAIN:
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case AS3722_MODE_OPEN_DRAIN_LV:
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flags = GPIO_PIN_INPUT | GPIO_PIN_OUTPUT | GPIO_PIN_OPENDRAIN;
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break;
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case AS3722_MODE_TRISTATE:
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flags = GPIO_PIN_TRISTATE;
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break;
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case AS3722_MODE_INPUT_PULL_UP_LV:
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flags = GPIO_PIN_INPUT | GPIO_PIN_PULLUP;
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break;
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case AS3722_MODE_INPUT_PULL_DOWN:
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flags = GPIO_PIN_OUTPUT | GPIO_PIN_PULLDOWN;
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break;
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}
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if (inverted)
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flags |= GPIO_PIN_INVIN | GPIO_PIN_INVOUT;
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*out_flags = flags;
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return (0);
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}
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static int
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as3722_gpio_get_mode(struct as3722_softc *sc, uint32_t pin, uint32_t gpio_flags)
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{
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uint8_t ctrl;
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int flags;
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ctrl = sc->gpio_pins[pin]->pin_ctrl_reg;
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flags = sc->gpio_pins[pin]->pin_cfg_flags;
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/* Tristate mode. */
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if (flags & AS3722_CFG_BIAS_HIGH_IMPEDANCE ||
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gpio_flags & GPIO_PIN_TRISTATE)
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return (AS3722_MODE_TRISTATE);
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/* Open drain modes. */
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if (flags & AS3722_CFG_OPEN_DRAIN || gpio_flags & GPIO_PIN_OPENDRAIN) {
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/* Only pull up have effect */
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if (flags & AS3722_CFG_BIAS_PULL_UP ||
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gpio_flags & GPIO_PIN_PULLUP)
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return (AS3722_MODE_OPEN_DRAIN_LV);
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return (AS3722_MODE_OPEN_DRAIN);
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}
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/* Input modes. */
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if (gpio_flags & GPIO_PIN_INPUT) {
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/* Accept pull up or pull down. */
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if (flags & AS3722_CFG_BIAS_PULL_UP ||
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gpio_flags & GPIO_PIN_PULLUP)
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return (AS3722_MODE_INPUT_PULL_UP_LV);
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if (flags & AS3722_CFG_BIAS_PULL_DOWN ||
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gpio_flags & GPIO_PIN_PULLDOWN)
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return (AS3722_MODE_INPUT_PULL_DOWN);
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return (AS3722_MODE_INPUT);
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}
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/*
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* Output modes.
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* Pull down is used as indicator of low voltage output.
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*/
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if (flags & AS3722_CFG_BIAS_PULL_DOWN ||
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gpio_flags & GPIO_PIN_PULLDOWN)
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return (AS3722_MODE_PUSH_PULL_LV);
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return (AS3722_MODE_PUSH_PULL);
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}
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int
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as3722_gpio_pin_setflags(device_t dev, uint32_t pin, uint32_t flags)
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{
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struct as3722_softc *sc;
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uint8_t ctrl, mode, iosf;
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int rv;
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sc = device_get_softc(dev);
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if (pin >= sc->gpio_npins)
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return (EINVAL);
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GPIO_LOCK(sc);
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ctrl = sc->gpio_pins[pin]->pin_ctrl_reg;
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iosf = (ctrl >> AS3722_GPIO_IOSF_SHIFT) & AS3722_GPIO_IOSF_MASK;
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/* Is pin in GPIO mode ? */
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if (iosf != AS3722_IOSF_GPIO) {
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GPIO_UNLOCK(sc);
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return (ENXIO);
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}
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mode = as3722_gpio_get_mode(sc, pin, flags);
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ctrl &= ~(AS3722_GPIO_MODE_MASK << AS3722_GPIO_MODE_SHIFT);
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ctrl |= AS3722_MODE_PUSH_PULL << AS3722_GPIO_MODE_SHIFT;
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rv = 0;
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if (ctrl != sc->gpio_pins[pin]->pin_ctrl_reg) {
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rv = WR1(sc, AS3722_GPIO0_CONTROL + pin, ctrl);
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sc->gpio_pins[pin]->pin_ctrl_reg = ctrl;
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}
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GPIO_UNLOCK(sc);
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return (rv);
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}
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int
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as3722_gpio_pin_set(device_t dev, uint32_t pin, uint32_t val)
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{
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struct as3722_softc *sc;
|
|
uint8_t tmp;
|
|
int rv;
|
|
|
|
sc = device_get_softc(dev);
|
|
if (pin >= sc->gpio_npins)
|
|
return (EINVAL);
|
|
|
|
tmp = (val != 0) ? 1 : 0;
|
|
if (sc->gpio_pins[pin]->pin_ctrl_reg & AS3722_GPIO_INVERT)
|
|
tmp ^= 1;
|
|
|
|
GPIO_LOCK(sc);
|
|
rv = RM1(sc, AS3722_GPIO_SIGNAL_OUT, (1 << pin), (tmp << pin));
|
|
GPIO_UNLOCK(sc);
|
|
return (rv);
|
|
}
|
|
|
|
int
|
|
as3722_gpio_pin_get(device_t dev, uint32_t pin, uint32_t *val)
|
|
{
|
|
struct as3722_softc *sc;
|
|
uint8_t tmp, mode, ctrl;
|
|
int rv;
|
|
|
|
sc = device_get_softc(dev);
|
|
if (pin >= sc->gpio_npins)
|
|
return (EINVAL);
|
|
|
|
GPIO_LOCK(sc);
|
|
ctrl = sc->gpio_pins[pin]->pin_ctrl_reg;
|
|
mode = (ctrl >> AS3722_GPIO_MODE_SHIFT) & AS3722_GPIO_MODE_MASK;
|
|
if ((mode == AS3722_MODE_PUSH_PULL) ||
|
|
(mode == AS3722_MODE_PUSH_PULL_LV))
|
|
rv = RD1(sc, AS3722_GPIO_SIGNAL_OUT, &tmp);
|
|
else
|
|
rv = RD1(sc, AS3722_GPIO_SIGNAL_IN, &tmp);
|
|
GPIO_UNLOCK(sc);
|
|
if (rv != 0)
|
|
return (rv);
|
|
|
|
*val = tmp & (1 << pin) ? 1 : 0;
|
|
if (ctrl & AS3722_GPIO_INVERT)
|
|
*val ^= 1;
|
|
return (0);
|
|
}
|
|
|
|
int
|
|
as3722_gpio_pin_toggle(device_t dev, uint32_t pin)
|
|
{
|
|
struct as3722_softc *sc;
|
|
uint8_t tmp;
|
|
int rv;
|
|
|
|
sc = device_get_softc(dev);
|
|
if (pin >= sc->gpio_npins)
|
|
return (EINVAL);
|
|
|
|
GPIO_LOCK(sc);
|
|
rv = RD1(sc, AS3722_GPIO_SIGNAL_OUT, &tmp);
|
|
if (rv != 0) {
|
|
GPIO_UNLOCK(sc);
|
|
return (rv);
|
|
}
|
|
tmp ^= (1 <<pin);
|
|
rv = RM1(sc, AS3722_GPIO_SIGNAL_OUT, (1 << pin), tmp);
|
|
GPIO_UNLOCK(sc);
|
|
return (0);
|
|
}
|
|
|
|
int
|
|
as3722_gpio_map_gpios(device_t dev, phandle_t pdev, phandle_t gparent,
|
|
int gcells, pcell_t *gpios, uint32_t *pin, uint32_t *flags)
|
|
{
|
|
|
|
if (gcells != 2)
|
|
return (ERANGE);
|
|
*pin = gpios[0];
|
|
*flags= gpios[1];
|
|
return (0);
|
|
}
|
|
|
|
int
|
|
as3722_gpio_attach(struct as3722_softc *sc, phandle_t node)
|
|
{
|
|
struct as3722_gpio_pin *pin;
|
|
int i, rv;
|
|
|
|
sx_init(&sc->gpio_lock, "AS3722 GPIO lock");
|
|
sc->gpio_npins = NGPIO;
|
|
sc->gpio_pins = malloc(sizeof(struct as3722_gpio_pin *) *
|
|
sc->gpio_npins, M_AS3722_GPIO, M_WAITOK | M_ZERO);
|
|
|
|
|
|
sc->gpio_busdev = gpiobus_attach_bus(sc->dev);
|
|
if (sc->gpio_busdev == NULL)
|
|
return (ENXIO);
|
|
for (i = 0; i < sc->gpio_npins; i++) {
|
|
sc->gpio_pins[i] = malloc(sizeof(struct as3722_gpio_pin),
|
|
M_AS3722_GPIO, M_WAITOK | M_ZERO);
|
|
pin = sc->gpio_pins[i];
|
|
sprintf(pin->pin_name, "gpio%d", i);
|
|
pin->pin_caps = GPIO_PIN_INPUT | GPIO_PIN_OUTPUT |
|
|
GPIO_PIN_OPENDRAIN | GPIO_PIN_PUSHPULL | GPIO_PIN_TRISTATE |
|
|
GPIO_PIN_PULLUP | GPIO_PIN_PULLDOWN | GPIO_PIN_INVIN |
|
|
GPIO_PIN_INVOUT;
|
|
rv = RD1(sc, AS3722_GPIO0_CONTROL + i, &pin->pin_ctrl_reg);
|
|
if (rv != 0) {
|
|
device_printf(sc->dev,
|
|
"Cannot read configuration for pin %s\n",
|
|
sc->gpio_pins[i]->pin_name);
|
|
}
|
|
}
|
|
return (0);
|
|
}
|