e9dcd83155
Submitted by: kib@ Approved by: hselasky (mentor) MFC after: 1 week Sponsored by: Mellanox Technologies
157 lines
5.3 KiB
C
157 lines
5.3 KiB
C
/*-
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* Copyright (c) 2017, Mellanox Technologies. All rights reserved.
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*
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* This software is available to you under a choice of one of two
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* licenses. You may choose to be licensed under the terms of the GNU
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* General Public License (GPL) Version 2, available from the file
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* COPYING in the main directory of this source tree, or the
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* OpenIB.org BSD license below:
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*
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* Redistribution and use in source and binary forms, with or
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* without modification, are permitted provided that the following
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* conditions are met:
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*
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* - Redistributions of source code must retain the above
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* copyright notice, this list of conditions and the following
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* disclaimer.
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*
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* - Redistributions in binary form must reproduce the above
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* copyright notice, this list of conditions and the following
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* disclaimer in the documentation and/or other materials
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* provided with the distribution.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*
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* $FreeBSD$
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*/
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#include <linux/etherdevice.h>
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#include <dev/mlx5/driver.h>
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#include <dev/mlx5/mlx5_core/mlx5_core.h>
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#include <dev/mlx5/mlx5_lib/mlx5.h>
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void mlx5_init_reserved_gids(struct mlx5_core_dev *dev)
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{
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unsigned int tblsz = MLX5_CAP_ROCE(dev, roce_address_table_size);
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ida_init(&dev->roce.reserved_gids.ida);
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dev->roce.reserved_gids.start = tblsz;
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dev->roce.reserved_gids.count = 0;
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}
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void mlx5_cleanup_reserved_gids(struct mlx5_core_dev *dev)
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{
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WARN_ON(!ida_is_empty(&dev->roce.reserved_gids.ida));
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dev->roce.reserved_gids.start = 0;
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dev->roce.reserved_gids.count = 0;
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ida_destroy(&dev->roce.reserved_gids.ida);
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}
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int mlx5_core_reserve_gids(struct mlx5_core_dev *dev, unsigned int count)
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{
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if (test_bit(MLX5_INTERFACE_STATE_UP, &dev->intf_state)) {
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mlx5_core_err(dev, "Cannot reserve GIDs when interfaces are up\n");
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return -EPERM;
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}
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if (dev->roce.reserved_gids.start < count) {
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mlx5_core_warn(dev, "GID table exhausted attempting to reserve %d more GIDs\n",
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count);
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return -ENOMEM;
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}
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if (dev->roce.reserved_gids.count + count > MLX5_MAX_RESERVED_GIDS) {
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mlx5_core_warn(dev, "Unable to reserve %d more GIDs\n", count);
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return -ENOMEM;
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}
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dev->roce.reserved_gids.start -= count;
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dev->roce.reserved_gids.count += count;
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mlx5_core_dbg(dev, "Reserved %u GIDs starting at %u\n",
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dev->roce.reserved_gids.count,
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dev->roce.reserved_gids.start);
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return 0;
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}
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void mlx5_core_unreserve_gids(struct mlx5_core_dev *dev, unsigned int count)
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{
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WARN(test_bit(MLX5_INTERFACE_STATE_UP, &dev->intf_state), "Unreserving GIDs when interfaces are up");
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WARN(count > dev->roce.reserved_gids.count, "Unreserving %u GIDs when only %u reserved",
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count, dev->roce.reserved_gids.count);
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dev->roce.reserved_gids.start += count;
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dev->roce.reserved_gids.count -= count;
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mlx5_core_dbg(dev, "%u GIDs starting at %u left reserved\n",
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dev->roce.reserved_gids.count,
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dev->roce.reserved_gids.start);
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}
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int mlx5_core_reserved_gid_alloc(struct mlx5_core_dev *dev, int *gid_index)
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{
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int end = dev->roce.reserved_gids.start +
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dev->roce.reserved_gids.count;
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int index = 0;
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index = ida_simple_get(&dev->roce.reserved_gids.ida,
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dev->roce.reserved_gids.start, end,
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GFP_KERNEL);
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if (index < 0)
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return index;
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mlx5_core_dbg(dev, "Allocating reserved GID %u\n", index);
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*gid_index = index;
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return 0;
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}
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void mlx5_core_reserved_gid_free(struct mlx5_core_dev *dev, int gid_index)
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{
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mlx5_core_dbg(dev, "Freeing reserved GID %u\n", gid_index);
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ida_simple_remove(&dev->roce.reserved_gids.ida, gid_index);
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}
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unsigned int mlx5_core_reserved_gids_count(struct mlx5_core_dev *dev)
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{
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return dev->roce.reserved_gids.count;
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}
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EXPORT_SYMBOL_GPL(mlx5_core_reserved_gids_count);
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int mlx5_core_roce_gid_set(struct mlx5_core_dev *dev, unsigned int index,
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u8 roce_version, u8 roce_l3_type, const u8 *gid,
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const u8 *mac, bool vlan, u16 vlan_id)
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{
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#define MLX5_SET_RA(p, f, v) MLX5_SET(roce_addr_layout, p, f, v)
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u32 in[MLX5_ST_SZ_DW(set_roce_address_in)] = {0};
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u32 out[MLX5_ST_SZ_DW(set_roce_address_out)] = {0};
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void *in_addr = MLX5_ADDR_OF(set_roce_address_in, in, roce_address);
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char *addr_l3_addr = MLX5_ADDR_OF(roce_addr_layout, in_addr,
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source_l3_address);
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void *addr_mac = MLX5_ADDR_OF(roce_addr_layout, in_addr,
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source_mac_47_32);
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int gidsz = MLX5_FLD_SZ_BYTES(roce_addr_layout, source_l3_address);
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if (MLX5_CAP_GEN(dev, port_type) != MLX5_CAP_PORT_TYPE_ETH)
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return -EINVAL;
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if (gid) {
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if (vlan) {
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MLX5_SET_RA(in_addr, vlan_valid, 1);
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MLX5_SET_RA(in_addr, vlan_id, vlan_id);
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}
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ether_addr_copy(addr_mac, mac);
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MLX5_SET_RA(in_addr, roce_version, roce_version);
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MLX5_SET_RA(in_addr, roce_l3_type, roce_l3_type);
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memcpy(addr_l3_addr, gid, gidsz);
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}
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MLX5_SET(set_roce_address_in, in, roce_address_index, index);
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MLX5_SET(set_roce_address_in, in, opcode, MLX5_CMD_OP_SET_ROCE_ADDRESS);
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return mlx5_cmd_exec(dev, in, sizeof(in), out, sizeof(out));
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}
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EXPORT_SYMBOL(mlx5_core_roce_gid_set);
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