122 lines
3.5 KiB
LLVM
122 lines
3.5 KiB
LLVM
; RUN: llc -mtriple=arm-eabi -mattr=+vfp2 %s -o - \
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; RUN: | FileCheck %s -check-prefix=VFP2
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; RUN: llc -mtriple=arm-eabi -mattr=+neon,-neonfp %s -o - \
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; RUN: | FileCheck %s -check-prefix=NFP0
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; RUN: llc -mtriple=arm-eabi -mattr=+neon,+neonfp %s -o - \
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; RUN: | FileCheck %s -check-prefix=NFP1
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; RUN: llc -mtriple=arm-eabi -mcpu=cortex-a8 %s -o - \
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; RUN: | FileCheck %s -check-prefix=CORTEXA8
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; RUN: llc -mtriple=arm-eabi -mcpu=cortex-a8 --enable-unsafe-fp-math %s -o - \
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; RUN: | FileCheck %s -check-prefix=CORTEXA8U
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; RUN: llc -mtriple=arm-darwin -mcpu=cortex-a8 %s -o - \
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; RUN: | FileCheck %s -check-prefix=CORTEXA8U
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; RUN: llc -mtriple=arm-eabi -mcpu=cortex-a9 %s -o - \
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; RUN: | FileCheck %s -check-prefix=CORTEXA9
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define float @test1(float* %a) {
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entry:
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%0 = load float, float* %a, align 4 ; <float> [#uses=2]
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%1 = fsub float -0.000000e+00, %0 ; <float> [#uses=2]
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%2 = fpext float %1 to double ; <double> [#uses=1]
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%3 = fcmp olt double %2, 1.234000e+00 ; <i1> [#uses=1]
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%retval = select i1 %3, float %1, float %0 ; <float> [#uses=1]
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ret float %retval
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}
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; VFP2-LABEL: test1:
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; VFP2: vneg.f32 s{{.*}}, s{{.*}}
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; NFP1-LABEL: test1:
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; NFP1: vneg.f32 d{{.*}}, d{{.*}}
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; NFP0-LABEL: test1:
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; NFP0: vneg.f32 s{{.*}}, s{{.*}}
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; CORTEXA8-LABEL: test1:
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; CORTEXA8: vneg.f32 s{{.*}}, s{{.*}}
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; CORTEXA8U-LABEL: test1:
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; CORTEXA8U: vneg.f32 d{{.*}}, d{{.*}}
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; CORTEXA9-LABEL: test1:
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; CORTEXA9: vneg.f32 s{{.*}}, s{{.*}}
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define float @test2(float* %a) {
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entry:
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%0 = load float, float* %a, align 4 ; <float> [#uses=2]
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%1 = fmul float -1.000000e+00, %0 ; <float> [#uses=2]
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%2 = fpext float %1 to double ; <double> [#uses=1]
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%3 = fcmp olt double %2, 1.234000e+00 ; <i1> [#uses=1]
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%retval = select i1 %3, float %1, float %0 ; <float> [#uses=1]
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ret float %retval
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}
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; VFP2-LABEL: test2:
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; VFP2: vneg.f32 s{{.*}}, s{{.*}}
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; NFP1-LABEL: test2:
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; NFP1: vneg.f32 d{{.*}}, d{{.*}}
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; NFP0-LABEL: test2:
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; NFP0: vneg.f32 s{{.*}}, s{{.*}}
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; CORTEXA8-LABEL: test2:
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; CORTEXA8: vneg.f32 s{{.*}}, s{{.*}}
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; CORTEXA8U-LABEL: test2:
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; CORTEXA8U: vneg.f32 d{{.*}}, d{{.*}}
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; CORTEXA9-LABEL: test2:
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; CORTEXA9: vneg.f32 s{{.*}}, s{{.*}}
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; If we're bitcasting an integer to an FP vector, we should avoid the FP/vector unit entirely.
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; Make sure that we're flipping the sign bit and only the sign bit of each float (PR20354).
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; So instead of something like this:
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; vmov d16, r0, r1
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; vneg.f32 d16, d16
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; vmov r0, r1, d16
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;
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; We should generate:
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; eor r0, r0, #-214783648
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; eor r1, r1, #-214783648
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define <2 x float> @fneg_bitcast(i64 %i) {
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%bitcast = bitcast i64 %i to <2 x float>
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%fneg = fsub <2 x float> <float -0.0, float -0.0>, %bitcast
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ret <2 x float> %fneg
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}
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; VFP2-LABEL: fneg_bitcast:
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; VFP2-DAG: eor r0, r0, #-2147483648
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; VFP2-DAG: eor r1, r1, #-2147483648
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; VFP2-NOT: vneg.f32
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; NFP1-LABEL: fneg_bitcast:
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; NFP1-DAG: eor r0, r0, #-2147483648
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; NFP1-DAG: eor r1, r1, #-2147483648
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; NFP1-NOT: vneg.f32
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; NFP0-LABEL: fneg_bitcast:
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; NFP0-DAG: eor r0, r0, #-2147483648
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; NFP0-DAG: eor r1, r1, #-2147483648
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; NFP0-NOT: vneg.f32
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; CORTEXA8-LABEL: fneg_bitcast:
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; CORTEXA8-DAG: eor r0, r0, #-2147483648
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; CORTEXA8-DAG: eor r1, r1, #-2147483648
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; CORTEXA8-NOT: vneg.f32
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; CORTEXA8U-LABEL: fneg_bitcast:
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; CORTEXA8U-DAG: eor r0, r0, #-2147483648
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; CORTEXA8U-DAG: eor r1, r1, #-2147483648
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; CORTEXA8U-NOT: vneg.f32
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; CORTEXA9-LABEL: fneg_bitcast:
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; CORTEXA9-DAG: eor r0, r0, #-2147483648
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; CORTEXA9-DAG: eor r1, r1, #-2147483648
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; CORTEXA9-NOT: vneg.f32
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