9ce875d9b5
Since LA57 was moved to the main SDM document with revision 072, it seems that we should have a support for it, and silicons are coming. This patch makes pmap support both LA48 and LA57 hardware. The selection of page table level is done at startup, kernel always receives control from loader with 4-level paging. It is not clear how UEFI spec would adapt LA57, for instance it could hand out control in LA57 mode sometimes. To switch from LA48 to LA57 requires turning off long mode, requesting LA57 in CR4, then re-entering long mode. This is somewhat delicate and done in pmap_bootstrap_la57(). AP startup in LA57 mode is much easier, we only need to toggle a bit in CR4 and load right value in CR3. I decided to not change kernel map for now. Single PML5 entry is created that points to the existing kernel_pml4 (KML4Phys) page, and a pml5 entry to create our recursive mapping for vtopte()/vtopde(). This decision is motivated by the fact that we cannot overcommit for KVA, so large space there is unusable until machines start providing wider physical memory addressing. Another reason is that I do not want to break our fragile autotuning, so the KVA expansion is not included into this first step. Nice side effect is that minidumps are compatible. On the other hand, (very) large address space is definitely immediately useful for some userspace applications. For userspace, numbering of pte entries (or page table pages) is always done for 5-level structures even if we operate in 4-level mode. The pmap_is_la57() function is added to report the mode of the specified pmap, this is done not to allow simultaneous 4-/5-levels (which is not allowed by hw), but to accomodate for EPT which has separate level control and in principle might not allow 5-leve EPT despite x86 paging supports it. Anyway, it does not seems critical to have 5-level EPT support now. Tested by: pho (LA48 hardware) Reviewed by: alc Sponsored by: The FreeBSD Foundation Differential revision: https://reviews.freebsd.org/D25273
94 lines
3.7 KiB
C
94 lines
3.7 KiB
C
/*-
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* SPDX-License-Identifier: BSD-3-Clause
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*
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* Copyright (c) 1995 Bruce D. Evans.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. Neither the name of the author nor the names of contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#ifndef _MACHINE_MD_VAR_H_
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#define _MACHINE_MD_VAR_H_
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#include <x86/x86_var.h>
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extern uint64_t *vm_page_dump;
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extern int hw_lower_amd64_sharedpage;
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extern int hw_ibrs_disable;
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extern int hw_ssb_disable;
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extern int nmi_flush_l1d_sw;
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extern int syscall_ret_l1d_flush_mode;
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extern vm_paddr_t intel_graphics_stolen_base;
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extern vm_paddr_t intel_graphics_stolen_size;
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extern int la57;
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/*
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* The file "conf/ldscript.amd64" defines the symbol "kernphys". Its
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* value is the physical address at which the kernel is loaded.
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*/
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extern char kernphys[];
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struct savefpu;
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struct sysentvec;
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void amd64_conf_fast_syscall(void);
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void amd64_db_resume_dbreg(void);
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void amd64_lower_shared_page(struct sysentvec *);
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void amd64_bsp_pcpu_init1(struct pcpu *pc);
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void amd64_bsp_pcpu_init2(uint64_t rsp0);
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void amd64_bsp_ist_init(struct pcpu *pc);
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void amd64_syscall(struct thread *td, int traced);
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void amd64_syscall_ret_flush_l1d(int error);
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void amd64_syscall_ret_flush_l1d_recalc(void);
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void doreti_iret(void) __asm(__STRING(doreti_iret));
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void doreti_iret_fault(void) __asm(__STRING(doreti_iret_fault));
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void flush_l1d_sw_abi(void);
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void ld_ds(void) __asm(__STRING(ld_ds));
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void ld_es(void) __asm(__STRING(ld_es));
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void ld_fs(void) __asm(__STRING(ld_fs));
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void ld_gs(void) __asm(__STRING(ld_gs));
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void ld_fsbase(void) __asm(__STRING(ld_fsbase));
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void ld_gsbase(void) __asm(__STRING(ld_gsbase));
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void ds_load_fault(void) __asm(__STRING(ds_load_fault));
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void es_load_fault(void) __asm(__STRING(es_load_fault));
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void fs_load_fault(void) __asm(__STRING(fs_load_fault));
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void gs_load_fault(void) __asm(__STRING(gs_load_fault));
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void fsbase_load_fault(void) __asm(__STRING(fsbase_load_fault));
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void gsbase_load_fault(void) __asm(__STRING(gsbase_load_fault));
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void fpstate_drop(struct thread *td);
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void pagezero(void *addr);
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void setidt(int idx, alias_for_inthand_t *func, int typ, int dpl, int ist);
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void sse2_pagezero(void *addr);
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void set_top_of_stack_td(struct thread *td);
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struct savefpu *get_pcb_user_save_td(struct thread *td);
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struct savefpu *get_pcb_user_save_pcb(struct pcb *pcb);
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void pci_early_quirks(void);
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#endif /* !_MACHINE_MD_VAR_H_ */
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