Warner Losh d2aaaeac19 Rewrite to try to be more sane:
o Introduce a uart bus space so that we don't have to hack dev/uart to do 8
  byte reads.  This also handles the shift properly, so reset the shift we
  want dev/uart doing to 0.  In effect, this bus space makes the octeon
  registers have an interface to dev/uart that looks just like the old ISA
  bus, but does the necessary 64-bit read/write to the bus.  We only support
  read/write operations.  We do all the widths, but likely could get away
  with only 64-bit and 8-bit given the restricted nature of use of this bus.
o use bus_space_map to set the .bsh rather than a direct assignment.
o Minor cleanup of uart_cpu_getdev to make it conform more to the other
  implementations.
o Add some coments for future work.

# with these changes, we now make it through cninit, but there's still some
# problem that's preventing output, as well as another problem that causes
# us to call panic just after we return from cninit() in platform_start.
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