04b6fa8330
facilities as well as support for the Octeon 2 family of SoCs.
XXX Note that with our antediluvian assembler, we can't support some Octeon 2
instructions and fall back to using the old ones instead.
96 lines
3.3 KiB
C
96 lines
3.3 KiB
C
/***********************license start***************
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* Copyright (c) 2003-2010 Cavium Networks (support@cavium.com). All rights
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* reserved.
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*
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met:
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*
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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*
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* * Redistributions in binary form must reproduce the above
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* copyright notice, this list of conditions and the following
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* disclaimer in the documentation and/or other materials provided
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* with the distribution.
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* * Neither the name of Cavium Networks nor the names of
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* its contributors may be used to endorse or promote products
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* derived from this software without specific prior written
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* permission.
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* This Software, including technical data, may be subject to U.S. export control
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* laws, including the U.S. Export Administration Act and its associated
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* regulations, and may be subject to export or import regulations in other
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* countries.
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* TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS"
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* AND WITH ALL FAULTS AND CAVIUM NETWORKS MAKES NO PROMISES, REPRESENTATIONS OR
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* WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH RESPECT TO
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* THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY REPRESENTATION OR
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* DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT DEFECTS, AND CAVIUM
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* SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES OF TITLE,
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* MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR PURPOSE, LACK OF
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* VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET POSSESSION OR
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* CORRESPONDENCE TO DESCRIPTION. THE ENTIRE RISK ARISING OUT OF USE OR
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* PERFORMANCE OF THE SOFTWARE LIES WITH YOU.
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***********************license end**************************************/
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#ifdef CVMX_BUILD_FOR_LINUX_KERNEL
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#include <linux/module.h>
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#include <asm/octeon/cvmx.h>
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#include <asm/octeon/cvmx-debug.h>
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#define cvmx_interrupt_in_isr 0
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#else
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#include "executive-config.h"
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#include "cvmx.h"
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#include "cvmx-debug.h"
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#ifndef __OCTEON_NEWLIB__
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extern int cvmx_interrupt_in_isr;
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#else
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#define cvmx_interrupt_in_isr 0
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#endif
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#endif
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static void cvmx_debug_remote_mem_wait_for_resume(volatile cvmx_debug_core_context_t *context, cvmx_debug_state_t state)
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{
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//
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// If we are stepping and not stepping into an interrupt and the debug
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// exception happened in an interrupt, continue the execution.
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//
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if(!state.step_isr &&
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(context->cop0.debug & 0x1) && /* Single stepping */
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!(context->cop0.debug & 0x1e) && /* Did not hit a breakpoint */
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((context->cop0.status & 0x2) || cvmx_interrupt_in_isr))
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return;
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context->remote_controlled = 1;
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CVMX_SYNCW;
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while (context->remote_controlled)
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;
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CVMX_SYNCW;
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}
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static void cvmx_debug_memory_change_core(int oldcore, int newcore)
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{
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/* FIXME, this should change the core on the host side too. */
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}
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cvmx_debug_comm_t cvmx_debug_remote_comm =
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{
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.init = NULL,
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.install_break_handler = NULL,
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.needs_proxy = 0,
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.getpacket = NULL,
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.putpacket = NULL,
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.wait_for_resume = cvmx_debug_remote_mem_wait_for_resume,
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.change_core = cvmx_debug_memory_change_core,
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};
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