f7a5c9d346
This is a MIPS4KC CPU with various embedded peripherals, including wireless and ethernet support. This commit includes the platform, UART, ethernet MAC and GPIO support. The interrupt-driven GPIO code is disabled for now pending GPIO changes from the submitter. Submitted by: Aleksandr Rybalko <ray@dlink.ua>
241 lines
6.7 KiB
C
241 lines
6.7 KiB
C
/*-
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* Copyright (c) 2010 Aleksandr Rybalko.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/interrupt.h>
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#include <sys/kernel.h>
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#include <sys/module.h>
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#include <sys/rman.h>
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#include <sys/malloc.h>
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#include <machine/bus.h>
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#include <mips/rt305x/rt305xreg.h>
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#include <mips/rt305x/rt305x_sysctlvar.h>
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static int rt305x_sysctl_probe(device_t);
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static int rt305x_sysctl_attach(device_t);
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static int rt305x_sysctl_detach(device_t);
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static struct rt305x_sysctl_softc *rt305x_sysctl_softc = NULL;
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static void
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rt305x_sysctl_dump_config(device_t dev)
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{
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uint32_t val;
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#define DUMPREG(r) \
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val = rt305x_sysctl_get(r); printf(" " #r "=%#08x\n", val)
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val = rt305x_sysctl_get(SYSCTL_CHIPID0_3);
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printf("\tChip ID: \"%c%c%c%c",
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(val >> 0 ) & 0xff,
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(val >> 8 ) & 0xff,
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(val >> 16) & 0xff,
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(val >> 24) & 0xff);
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val = rt305x_sysctl_get(SYSCTL_CHIPID4_7);
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printf("%c%c%c%c\"\n",
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(val >> 0 ) & 0xff,
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(val >> 8 ) & 0xff,
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(val >> 16) & 0xff,
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(val >> 24) & 0xff);
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DUMPREG(SYSCTL_SYSCFG);
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if ( val & SYSCTL_SYSCFG_INIC_EE_SDRAM)
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printf("\tGet SDRAM config from EEPROM\n");
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if ( val & SYSCTL_SYSCFG_INIC_8MB_SDRAM)
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printf("\tBootstrap flag is set\n");
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printf("\tGE0 mode %u\n",
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((val & SYSCTL_SYSCFG_GE0_MODE_MASK) >>
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SYSCTL_SYSCFG_GE0_MODE_SHIFT));
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if ( val & SYSCTL_SYSCFG_BOOT_ADDR_1F00)
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printf("\tBoot from 0x1f000000\n");
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if ( val & SYSCTL_SYSCFG_BYPASS_PLL)
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printf("\tBypass PLL\n");
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if ( val & SYSCTL_SYSCFG_BIG_ENDIAN)
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printf("\tBig Endian\n");
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if ( val & SYSCTL_SYSCFG_CPU_CLK_SEL_384MHZ)
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printf("\tClock is 384Mhz\n");
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printf("\tBoot from %u\n",
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((val & SYSCTL_SYSCFG_BOOT_FROM_MASK) >>
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SYSCTL_SYSCFG_BOOT_FROM_SHIFT));
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printf("\tBootstrap test code %u\n",
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((val & SYSCTL_SYSCFG_TEST_CODE_MASK) >>
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SYSCTL_SYSCFG_TEST_CODE_SHIFT));
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printf("\tSRAM_CS mode %u\n",
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((val & SYSCTL_SYSCFG_SRAM_CS_MODE_MASK) >>
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SYSCTL_SYSCFG_SRAM_CS_MODE_SHIFT));
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printf("\t%umA SDRAM_CLK driving\n",
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(val & SYSCTL_SYSCFG_SDRAM_CLK_DRV)?12:8);
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DUMPREG(SYSCTL_CLKCFG0);
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printf("\tSDRAM_CLK_SKEW %uns\n", (val >> 30) & 0x03);
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DUMPREG(SYSCTL_CLKCFG1);
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if ( val & SYSCTL_CLKCFG1_PBUS_DIV_CLK_BY2)
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printf("\tPbus clock is 1/2 of System clock\n");
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if ( val & SYSCTL_CLKCFG1_OTG_CLK_EN)
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printf("\tUSB OTG clock is enabled\n");
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if ( val & SYSCTL_CLKCFG1_I2S_CLK_EN)
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printf("\tI2S clock is enabled\n");
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printf("\tI2S clock is %s\n",
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(val & SYSCTL_CLKCFG1_I2S_CLK_SEL_EXT)?
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"external":"internal 15.625Mhz");
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printf("\tI2S clock divider %u\n",
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((val & SYSCTL_CLKCFG1_I2S_CLK_DIV_MASK) >>
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SYSCTL_CLKCFG1_I2S_CLK_DIV_SHIFT));
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if ( val & SYSCTL_CLKCFG1_PCM_CLK_EN)
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printf("\tPCM clock is enabled\n");
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printf("\tPCM clock is %s\n",
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(val & SYSCTL_CLKCFG1_PCM_CLK_SEL_EXT)?
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"external":"internal 15.625Mhz");
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printf("\tPCM clock divider %u\n",
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((val & SYSCTL_CLKCFG1_PCM_CLK_DIV_MASK) >>
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SYSCTL_CLKCFG1_PCM_CLK_DIV_SHIFT));
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DUMPREG(SYSCTL_GPIOMODE);
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#undef DUMPREG
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return;
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}
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static int
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rt305x_sysctl_probe(device_t dev)
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{
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device_set_desc(dev, "RT305X System Control driver");
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return (0);
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}
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static int
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rt305x_sysctl_attach(device_t dev)
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{
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struct rt305x_sysctl_softc *sc = device_get_softc(dev);
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int error = 0;
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KASSERT((device_get_unit(dev) == 0),
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("rt305x_sysctl: Only one sysctl module supported"));
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if (rt305x_sysctl_softc != NULL)
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return (ENXIO);
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rt305x_sysctl_softc = sc;
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/* Map control/status registers. */
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sc->mem_rid = 0;
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sc->mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
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&sc->mem_rid, RF_ACTIVE);
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if (sc->mem_res == NULL) {
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device_printf(dev, "couldn't map memory\n");
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error = ENXIO;
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rt305x_sysctl_detach(dev);
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return(error);
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}
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#ifdef notyet
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sc->irq_rid = 0;
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if ((sc->irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ,
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&sc->irq_rid, RF_SHAREABLE | RF_ACTIVE)) == NULL) {
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device_printf(dev, "unable to allocate IRQ resource\n");
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return (ENXIO);
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}
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if ((bus_setup_intr(dev, sc->irq_res, INTR_TYPE_MISC,
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rt305x_sysctl_intr, NULL, sc, &sc->sysctl_ih))) {
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device_printf(dev,
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"WARNING: unable to register interrupt handler\n");
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return (ENXIO);
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}
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#endif
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rt305x_sysctl_dump_config(dev);
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return (bus_generic_attach(dev));
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}
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static int
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rt305x_sysctl_detach(device_t dev)
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{
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struct rt305x_sysctl_softc *sc = device_get_softc(dev);
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bus_generic_detach(dev);
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if (sc->mem_res)
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bus_release_resource(dev, SYS_RES_MEMORY, sc->mem_rid,
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sc->mem_res);
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#ifdef notyet
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if (sc->irq_res)
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bus_release_resource(dev, SYS_RES_IRQ, sc->irq_rid,
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sc->irq_res);
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#endif
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return(0);
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}
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#ifdef notyet
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static int
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rt305x_sysctl_intr(void *arg)
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{
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return (FILTER_HANDLED);
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}
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#endif
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uint32_t
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rt305x_sysctl_get(uint32_t reg)
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{
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struct rt305x_sysctl_softc *sc = rt305x_sysctl_softc;
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return (bus_read_4(sc->mem_res, reg));
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}
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void
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rt305x_sysctl_set(uint32_t reg, uint32_t val)
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{
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struct rt305x_sysctl_softc *sc = rt305x_sysctl_softc;
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bus_write_4(sc->mem_res, reg, val);
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return;
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}
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static device_method_t rt305x_sysctl_methods[] = {
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DEVMETHOD(device_probe, rt305x_sysctl_probe),
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DEVMETHOD(device_attach, rt305x_sysctl_attach),
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DEVMETHOD(device_detach, rt305x_sysctl_detach),
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{0, 0},
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};
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static driver_t rt305x_sysctl_driver = {
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"rt305x_sysctl",
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rt305x_sysctl_methods,
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sizeof(struct rt305x_sysctl_softc),
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};
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static devclass_t rt305x_sysctl_devclass;
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DRIVER_MODULE(rt305x_sysctl, obio, rt305x_sysctl_driver, rt305x_sysctl_devclass, 0, 0);
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