d91b1b4976
- Fix bug preventing adoption of running firmware - Set PCIe max read request size to 4KB - Read PCIe link width from config space - Assume aligned completions from the southbridge ports of intel E5000 chips - Use aligned firmware when link width is x4 or less - Add hw.mxge.force_firmware tunable to allow user to force selection of aligned (or unaligned) firmware
217 lines
5.8 KiB
C
217 lines
5.8 KiB
C
/*******************************************************************************
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Copyright (c) 2006, Myricom Inc.
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All rights reserved.
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions are met:
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1. Redistributions of source code must retain the above copyright notice,
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this list of conditions and the following disclaimer.
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2. Redistributions in binary form must reproduce the above copyright
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notice, this list of conditions and the following disclaimer in the
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documentation and/or other materials provided with the distribution.
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3. Neither the name of the Myricom Inc, nor the names of its
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contributors may be used to endorse or promote products derived from
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this software without specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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POSSIBILITY OF SUCH DAMAGE.
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$FreeBSD$
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***************************************************************************/
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#define MXGE_MAX_ETHER_MTU 9014
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#define MXGE_ETH_STOPPED 0
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#define MXGE_ETH_STOPPING 1
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#define MXGE_ETH_STARTING 2
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#define MXGE_ETH_RUNNING 3
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#define MXGE_ETH_OPEN_FAILED 4
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#define MXGE_FW_OFFSET 1024*1024
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#define MXGE_EEPROM_STRINGS_SIZE 256
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#define MXGE_MAX_SEND_DESC 64 /* should be large enough for
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any TSO packet */
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typedef struct {
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void *addr;
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bus_addr_t bus_addr;
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bus_dma_tag_t dmat;
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bus_dmamap_t map;
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} mxge_dma_t;
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typedef struct {
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mcp_slot_t *entry;
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mxge_dma_t dma;
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int cnt;
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int idx;
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} mxge_rx_done_t;
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typedef struct
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{
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uint32_t data0;
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uint32_t data1;
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uint32_t data2;
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} mxge_cmd_t;
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struct mxge_rx_buffer_state {
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struct mbuf *m;
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bus_dmamap_t map;
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};
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struct mxge_tx_buffer_state {
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struct mbuf *m;
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bus_dmamap_t map;
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int flag;
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};
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typedef struct
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{
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volatile mcp_kreq_ether_recv_t *lanai; /* lanai ptr for recv ring */
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volatile uint8_t *wc_fifo; /* w/c rx dma addr fifo address */
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mcp_kreq_ether_recv_t *shadow; /* host shadow of recv ring */
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struct mxge_rx_buffer_state *info;
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bus_dma_tag_t dmat;
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bus_dmamap_t extra_map;
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int cnt;
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int alloc_fail;
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int mask; /* number of rx slots -1 */
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} mxge_rx_buf_t;
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typedef struct
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{
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volatile mcp_kreq_ether_send_t *lanai; /* lanai ptr for sendq */
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volatile uint8_t *wc_fifo; /* w/c send fifo address */
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mcp_kreq_ether_send_t *req_list; /* host shadow of sendq */
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char *req_bytes;
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bus_dma_segment_t *seg_list;
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struct mxge_tx_buffer_state *info;
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bus_dma_tag_t dmat;
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int req; /* transmits submitted */
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int mask; /* number of transmit slots -1 */
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int done; /* transmits completed */
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int pkt_done; /* packets completed */
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int boundary; /* boundary transmits cannot cross*/
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} mxge_tx_buf_t;
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typedef struct {
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struct ifnet* ifp;
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int big_bytes;
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struct mtx tx_lock;
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int csum_flag; /* rx_csums? */
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uint8_t mac_addr[6]; /* eeprom mac address */
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mxge_tx_buf_t tx; /* transmit ring */
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mxge_rx_buf_t rx_small;
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mxge_rx_buf_t rx_big;
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mxge_rx_done_t rx_done;
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mcp_irq_data_t *fw_stats;
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bus_dma_tag_t parent_dmat;
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volatile uint8_t *sram;
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int sram_size;
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volatile uint32_t *irq_deassert;
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volatile uint32_t *irq_claim;
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mcp_cmd_response_t *cmd;
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mxge_dma_t cmd_dma;
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mxge_dma_t zeropad_dma;
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mxge_dma_t fw_stats_dma;
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struct pci_dev *pdev;
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int msi_enabled;
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int link_state;
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unsigned int rdma_tags_available;
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int intr_coal_delay;
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volatile uint32_t *intr_coal_delay_ptr;
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int wc;
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struct mtx cmd_lock;
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struct sx driver_lock;
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int wake_queue;
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int stop_queue;
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int down_cnt;
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int watchdog_resets;
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int tx_defragged;
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int pause;
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struct resource *mem_res;
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struct resource *irq_res;
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void *ih;
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char *fw_name;
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char eeprom_strings[MXGE_EEPROM_STRINGS_SIZE];
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char fw_version[128];
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device_t dev;
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struct ifmedia media;
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int read_dma;
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int write_dma;
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int read_write_dma;
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int fw_multicast_support;
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int link_width;
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char *mac_addr_string;
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char product_code_string[64];
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char serial_number_string[64];
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char scratch[256];
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} mxge_softc_t;
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#define MXGE_PCI_VENDOR_MYRICOM 0x14c1
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#define MXGE_PCI_DEVICE_Z8E 0x0008
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#define MXGE_HIGHPART_TO_U32(X) \
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(sizeof (X) == 8) ? ((uint32_t)((uint64_t)(X) >> 32)) : (0)
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#define MXGE_LOWPART_TO_U32(X) ((uint32_t)(X))
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/* implement our own memory barriers, since bus_space_barrier
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cannot handle write-combining regions */
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#if defined (__GNUC__)
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#if #cpu(i386) || defined __i386 || defined i386 || defined __i386__ || #cpu(x86_64) || defined __x86_64__
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#define mb() __asm__ __volatile__ ("sfence;": : :"memory")
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#elif #cpu(sparc64) || defined sparc64 || defined __sparcv9
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#define mb() __asm__ __volatile__ ("membar #MemIssue": : :"memory")
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#elif #cpu(sparc) || defined sparc || defined __sparc__
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#define mb() __asm__ __volatile__ ("stbar;": : :"memory")
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#else
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#define mb() /* XXX just to make this compile */
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#endif
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#else
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#error "unknown compiler"
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#endif
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static inline void
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mxge_pio_copy(volatile void *to_v, void *from_v, size_t size)
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{
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register volatile uintptr_t *to;
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volatile uintptr_t *from;
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size_t i;
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to = (volatile uintptr_t *) to_v;
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from = from_v;
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for (i = (size / sizeof (uintptr_t)); i; i--) {
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*to = *from;
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to++;
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from++;
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}
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}
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/*
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This file uses Myri10GE driver indentation.
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Local Variables:
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c-file-style:"linux"
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tab-width:8
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End:
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*/
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