09606165a0
Setup more ieee80211_rx_stats fields for received frames: - pktflags: * IEEE80211_RX_F_FAIL_FCSCRC; * IEEE80211_RX_F_AMPDU; * IEEE80211_RX_F_AMPDU_MORE; * IEEE80211_RX_F_SHORTGI; - rate flags (CCK, OFDM, HT); - width; - phytype; - rate; - rx_tsf; - rssi; - nf; - ieee, freq (RTL8188EU only, when ht40 support is disabled). Tested with: - RTL8188CE, RTL8188EU, RTL8821AU (STA / AP modes, i386) - (by kevlo) RTL8188EU and RTL8812AU (amd64) Reviewed by: adrian (previous version), kevlo Differential Revision: https://reviews.freebsd.org/D9021
101 lines
3.0 KiB
C
101 lines
3.0 KiB
C
/*-
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* Copyright (c) 2010 Damien Bergamini <damien.bergamini@free.fr>
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* Copyright (c) 2016 Andriy Voskoboinyk <avos@FreeBSD.org>
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*
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* Permission to use, copy, modify, and distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*
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* $OpenBSD: if_urtwnreg.h,v 1.3 2010/11/16 18:02:59 damien Exp $
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* $FreeBSD$
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*/
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#ifndef R92C_RX_DESC_H
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#define R92C_RX_DESC_H
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/* Rx MAC descriptor (common parts / USB). */
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struct r92c_rx_stat {
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uint32_t rxdw0;
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#define R92C_RXDW0_PKTLEN_M 0x00003fff
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#define R92C_RXDW0_PKTLEN_S 0
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#define R92C_RXDW0_CRCERR 0x00004000
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#define R92C_RXDW0_ICVERR 0x00008000
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#define R92C_RXDW0_INFOSZ_M 0x000f0000
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#define R92C_RXDW0_INFOSZ_S 16
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#define R92C_RXDW0_CIPHER_M 0x00700000
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#define R92C_RXDW0_CIPHER_S 20
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#define R92C_RXDW0_QOS 0x00800000
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#define R92C_RXDW0_SHIFT_M 0x03000000
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#define R92C_RXDW0_SHIFT_S 24
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#define R92C_RXDW0_PHYST 0x04000000
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#define R92C_RXDW0_SWDEC 0x08000000
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#define R92C_RXDW0_LS 0x10000000
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#define R92C_RXDW0_FS 0x20000000
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#define R92C_RXDW0_EOR 0x40000000
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#define R92C_RXDW0_OWN 0x80000000
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uint32_t rxdw1;
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#define R92C_RXDW1_MACID_M 0x0000001f
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#define R92C_RXDW1_MACID_S 0
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#define R92C_RXDW1_AMSDU 0x00002000
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#define R92C_RXDW1_AMPDU_MORE 0x00004000
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#define R92C_RXDW1_AMPDU 0x00008000
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#define R92C_RXDW1_MC 0x40000000
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#define R92C_RXDW1_BC 0x80000000
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uint32_t rxdw2;
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uint32_t rxdw3;
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#define R92C_RXDW3_RATE_M 0x0000003f
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#define R92C_RXDW3_RATE_S 0
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#define R92C_RXDW3_HT 0x00000040
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#define R92C_RXDW3_SPLCP 0x00000100
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#define R92C_RXDW3_HT40 0x00000200
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#define R92C_RXDW3_HTC 0x00000400
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#define R92C_RXDW3_BSSID_FIT_M 0x00003000
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#define R92C_RXDW3_BSSID_FIT_S 12
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uint32_t rxdw4;
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uint32_t tsf_low;
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} __packed __attribute__((aligned(4)));
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/* Rx PHY CCK descriptor. */
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struct r92c_rx_cck {
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uint8_t adc_pwdb[4];
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uint8_t sq_rpt;
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uint8_t agc_rpt;
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} __packed;
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/* Rx PHY descriptor. */
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struct r92c_rx_phystat {
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uint8_t trsw_gain[4];
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uint8_t pwdb_all;
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uint8_t cfosho[4];
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uint8_t cfotail[4];
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uint8_t rxevm[2];
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uint8_t rxsnr[4];
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uint8_t pdsnr[2];
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uint8_t csi_current[2];
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uint8_t csi_target[2];
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uint8_t sigevm;
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uint8_t max_ex_pwr;
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uint8_t phy_byte28;
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#define R92C_PHY_BYTE28_ANTSEL 0x01
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#define R92C_PHY_BYTE28_ANTSEL_B 0x02
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#define R92C_PHY_BYTE28_ANT_TRAIN_EN 0x04
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#define R92C_PHY_BYTE28_IDLE_LONG 0x08
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#define R92C_PHY_BYTE28_RXSC_M 0x30
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#define R92C_PHY_BYTE28_RXSC_S 4
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#define R92C_PHY_BYTE28_SGI_EN 0x40
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#define R92C_PHY_BYTE28_EX_INTF_FLG 0x80
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} __packed;
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#endif /* R92C_RX_DESC_H */
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