8f82136aec
Also, expose IFLIB_MAX_RX_SEGS to iflib drivers and add iflib_dma_alloc_align() to the iflib API. Performance is generally better with the tunable/sysctl dev.vmx.<index>.iflib.tx_abdicate=1. Reviewed by: shurd MFC after: 1 week Relnotes: yes Sponsored by: RG Nets Differential Revision: https://reviews.freebsd.org/D18761
194 lines
5.4 KiB
C
194 lines
5.4 KiB
C
/*-
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* Copyright (c) 2013 Tsubai Masanari
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* Copyright (c) 2013 Bryan Venteicher <bryanv@FreeBSD.org>
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* Copyright (c) 2018 Patrick Kelsey
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*
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* Permission to use, copy, modify, and distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*
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* $FreeBSD$
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*/
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#ifndef _IF_VMXVAR_H
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#define _IF_VMXVAR_H
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struct vmxnet3_softc;
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/*
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* The number of Rx/Tx queues this driver prefers.
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*/
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#define VMXNET3_DEF_RX_QUEUES 8
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#define VMXNET3_DEF_TX_QUEUES 8
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/*
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* The number of Rx rings in each Rx queue.
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*/
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#define VMXNET3_RXRINGS_PERQ 2
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/*
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* The number of descriptors in each Rx/Tx ring.
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*/
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#define VMXNET3_DEF_TX_NDESC 512
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#define VMXNET3_MAX_TX_NDESC 4096
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#define VMXNET3_MIN_TX_NDESC 32
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#define VMXNET3_MASK_TX_NDESC 0x1F
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#define VMXNET3_DEF_RX_NDESC 256
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#define VMXNET3_MAX_RX_NDESC 2048
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#define VMXNET3_MIN_RX_NDESC 32
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#define VMXNET3_MASK_RX_NDESC 0x1F
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#define VMXNET3_MAX_TX_NCOMPDESC VMXNET3_MAX_TX_NDESC
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#define VMXNET3_MAX_RX_NCOMPDESC \
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(VMXNET3_MAX_RX_NDESC * VMXNET3_RXRINGS_PERQ)
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struct vmxnet3_txring {
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u_int vxtxr_next;
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u_int vxtxr_ndesc;
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int vxtxr_gen;
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struct vmxnet3_txdesc *vxtxr_txd;
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bus_addr_t vxtxr_paddr;
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};
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struct vmxnet3_rxring {
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struct vmxnet3_rxdesc *vxrxr_rxd;
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u_int vxrxr_ndesc;
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int vxrxr_gen;
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bus_addr_t vxrxr_paddr;
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};
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struct vmxnet3_comp_ring {
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union {
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struct vmxnet3_txcompdesc *txcd;
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struct vmxnet3_rxcompdesc *rxcd;
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} vxcr_u;
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/*
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* vxcr_next is used on the transmit side to track the next index to
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* begin cleaning at. It is not used on the receive side.
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*/
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u_int vxcr_next;
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u_int vxcr_ndesc;
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int vxcr_gen;
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bus_addr_t vxcr_paddr;
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};
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struct vmxnet3_txqueue {
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struct vmxnet3_softc *vxtxq_sc;
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int vxtxq_id;
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int vxtxq_last_flush;
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int vxtxq_intr_idx;
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struct vmxnet3_txring vxtxq_cmd_ring;
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struct vmxnet3_comp_ring vxtxq_comp_ring;
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struct vmxnet3_txq_shared *vxtxq_ts;
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struct sysctl_oid_list *vxtxq_sysctl;
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char vxtxq_name[16];
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} __aligned(CACHE_LINE_SIZE);
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struct vmxnet3_rxqueue {
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struct vmxnet3_softc *vxrxq_sc;
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int vxrxq_id;
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int vxrxq_intr_idx;
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struct if_irq vxrxq_irq;
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struct vmxnet3_rxring vxrxq_cmd_ring[VMXNET3_RXRINGS_PERQ];
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struct vmxnet3_comp_ring vxrxq_comp_ring;
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struct vmxnet3_rxq_shared *vxrxq_rs;
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struct sysctl_oid_list *vxrxq_sysctl;
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char vxrxq_name[16];
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} __aligned(CACHE_LINE_SIZE);
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struct vmxnet3_softc {
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device_t vmx_dev;
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if_ctx_t vmx_ctx;
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if_shared_ctx_t vmx_sctx;
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if_softc_ctx_t vmx_scctx;
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struct ifnet *vmx_ifp;
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struct vmxnet3_driver_shared *vmx_ds;
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uint32_t vmx_flags;
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#define VMXNET3_FLAG_RSS 0x0002
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struct vmxnet3_rxqueue *vmx_rxq;
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struct vmxnet3_txqueue *vmx_txq;
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struct resource *vmx_res0;
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bus_space_tag_t vmx_iot0;
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bus_space_handle_t vmx_ioh0;
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struct resource *vmx_res1;
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bus_space_tag_t vmx_iot1;
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bus_space_handle_t vmx_ioh1;
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int vmx_link_active;
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int vmx_intr_mask_mode;
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int vmx_event_intr_idx;
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struct if_irq vmx_event_intr_irq;
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uint8_t *vmx_mcast;
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struct vmxnet3_rss_shared *vmx_rss;
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struct iflib_dma_info vmx_ds_dma;
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struct iflib_dma_info vmx_qs_dma;
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struct iflib_dma_info vmx_mcast_dma;
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struct iflib_dma_info vmx_rss_dma;
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struct ifmedia *vmx_media;
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uint32_t vmx_vlan_filter[4096/32];
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uint8_t vmx_lladdr[ETHER_ADDR_LEN];
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};
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/*
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* Our driver version we report to the hypervisor; we just keep
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* this value constant.
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*/
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#define VMXNET3_DRIVER_VERSION 0x00010000
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/*
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* Max descriptors per Tx packet. We must limit the size of the
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* any TSO packets based on the number of segments.
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*/
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#define VMXNET3_TX_MAXSEGS 32 /* 64K @ 2K segment size */
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#define VMXNET3_TX_MAXSIZE (VMXNET3_TX_MAXSEGS * MCLBYTES)
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#define VMXNET3_TSO_MAXSIZE (VMXNET3_TX_MAXSIZE - ETHER_VLAN_ENCAP_LEN)
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/*
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* Maximum supported Tx segment size. The length field in the
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* Tx descriptor is 14 bits.
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*
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* XXX It's possible a descriptor length field of 0 means 2^14, but this
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* isn't confirmed, so limit to 2^14 - 1 for now.
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*/
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#define VMXNET3_TX_MAXSEGSIZE ((1 << 14) - 1)
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/*
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* Maximum supported Rx segment size. The length field in the
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* Rx descriptor is 14 bits.
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*
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* The reference drivers skip zero-length descriptors, which seems to be a
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* strong indication that on the receive side, a descriptor length field of
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* zero does not mean 2^14.
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*/
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#define VMXNET3_RX_MAXSEGSIZE ((1 << 14) - 1)
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/*
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* Predetermined size of the multicast MACs filter table. If the
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* number of multicast addresses exceeds this size, then the
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* ALL_MULTI mode is use instead.
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*/
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#define VMXNET3_MULTICAST_MAX 32
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/*
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* IP protocols that we can perform Tx checksum offloading of.
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*/
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#define VMXNET3_CSUM_OFFLOAD (CSUM_TCP | CSUM_UDP)
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#define VMXNET3_CSUM_OFFLOAD_IPV6 (CSUM_TCP_IPV6 | CSUM_UDP_IPV6)
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#define VMXNET3_CSUM_ALL_OFFLOAD \
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(VMXNET3_CSUM_OFFLOAD | VMXNET3_CSUM_OFFLOAD_IPV6 | CSUM_TSO)
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#endif /* _IF_VMXVAR_H */
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