4f9ed3156c
Fix multiple problems in the powerpcspe floating point code. * Endianness handling of the SPEFSCR in fenv.h was completely broken. * Ensure SPEFSCR synchronization requirements are being met. The __r.__d -> __r transformations were written by jhibbits. Reviewed by: jhibbits Differential Revision: https://reviews.freebsd.org/D22526
54 lines
2.0 KiB
C
54 lines
2.0 KiB
C
/* $NetBSD: fpsetmask.c,v 1.3 2002/01/13 21:45:48 thorpej Exp $ */
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/*
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* Copyright (c) 2016 Justin Hibbits
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Dan Winship.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/types.h>
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#include <machine/spr.h>
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#include <ieeefp.h>
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#ifndef _SOFT_FLOAT
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fp_except_t
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fpsetmask(fp_except_t mask)
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{
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uint32_t fpscr;
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fp_rnd_t old;
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__asm__ __volatile("mfspr %0, %1" : "=r"(fpscr) : "K"(SPR_SPEFSCR));
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old = (fp_rnd_t)((fpscr >> 2) & 0x1f);
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fpscr = (fpscr & 0xffffff83) | (mask << 2);
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__asm__ __volatile("mtspr %1,%0;isync" :: "r"(fpscr), "K"(SPR_SPEFSCR));
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return (old);
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}
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#endif
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