113 lines
3.0 KiB
C
113 lines
3.0 KiB
C
/*
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* Copyright (c) 2002-2008 Sam Leffler, Errno Consulting
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* Copyright (c) 2002-2008 Atheros Communications, Inc.
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*
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* $Id: ar5416_gpio.c,v 1.3 2008/11/10 04:08:04 sam Exp $
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*/
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#include "opt_ah.h"
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#include "ah.h"
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#include "ah_internal.h"
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#include "ah_devid.h"
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#ifdef AH_DEBUG
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#include "ah_desc.h" /* NB: for HAL_PHYERR* */
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#endif
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#include "ar5416/ar5416.h"
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#include "ar5416/ar5416reg.h"
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#include "ar5416/ar5416phy.h"
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#define AR_NUM_GPIO 6 /* 6 GPIO pins */
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#define AR_GPIO_BIT(_gpio) (1 << _gpio)
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/*
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* Configure GPIO Output lines
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*/
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HAL_BOOL
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ar5416GpioCfgOutput(struct ath_hal *ah, uint32_t gpio)
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{
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HALASSERT(gpio < AR_NUM_GPIO);
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OS_REG_CLR_BIT(ah, AR_GPIO_INTR_OUT, AR_GPIO_BIT(gpio));
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return AH_TRUE;
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}
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/*
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* Configure GPIO Input lines
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*/
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HAL_BOOL
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ar5416GpioCfgInput(struct ath_hal *ah, uint32_t gpio)
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{
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HALASSERT(gpio < AR_NUM_GPIO);
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OS_REG_SET_BIT(ah, AR_GPIO_INTR_OUT, AR_GPIO_BIT(gpio));
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return AH_TRUE;
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}
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/*
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* Once configured for I/O - set output lines
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*/
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HAL_BOOL
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ar5416GpioSet(struct ath_hal *ah, uint32_t gpio, uint32_t val)
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{
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uint32_t reg;
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HALASSERT(gpio < AR_NUM_GPIO);
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reg = MS(OS_REG_READ(ah, AR_GPIO_INTR_OUT), AR_GPIO_OUT_VAL);
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if (val & 1)
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reg |= AR_GPIO_BIT(gpio);
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else
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reg &= ~AR_GPIO_BIT(gpio);
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OS_REG_RMW_FIELD(ah, AR_GPIO_INTR_OUT, AR_GPIO_OUT_VAL, reg);
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return AH_TRUE;
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}
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/*
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* Once configured for I/O - get input lines
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*/
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uint32_t
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ar5416GpioGet(struct ath_hal *ah, uint32_t gpio)
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{
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if (gpio >= AR_NUM_GPIO)
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return 0xffffffff;
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return ((OS_REG_READ(ah, AR_GPIO_IN) & AR_GPIO_BIT(gpio)) >> gpio);
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}
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/*
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* Set the GPIO Interrupt
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*/
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void
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ar5416GpioSetIntr(struct ath_hal *ah, u_int gpio, uint32_t ilevel)
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{
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uint32_t val;
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HALASSERT(gpio < AR_NUM_GPIO);
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/* XXX bounds check gpio */
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val = MS(OS_REG_READ(ah, AR_GPIO_INTR_OUT), AR_GPIO_INTR_CTRL);
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if (ilevel) /* 0 == interrupt on pin high */
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val &= ~AR_GPIO_BIT(gpio);
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else /* 1 == interrupt on pin low */
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val |= AR_GPIO_BIT(gpio);
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OS_REG_RMW_FIELD(ah, AR_GPIO_INTR_OUT, AR_GPIO_INTR_CTRL, val);
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/* Change the interrupt mask. */
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val = MS(OS_REG_READ(ah, AR_INTR_ASYNC_ENABLE), AR_INTR_GPIO);
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val |= AR_GPIO_BIT(gpio);
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OS_REG_RMW_FIELD(ah, AR_INTR_ASYNC_ENABLE, AR_INTR_GPIO, val);
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val = MS(OS_REG_READ(ah, AR_INTR_ASYNC_MASK), AR_INTR_GPIO);
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val |= AR_GPIO_BIT(gpio);
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OS_REG_RMW_FIELD(ah, AR_INTR_ASYNC_MASK, AR_INTR_GPIO, val);
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}
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