3cbf3585cb
the virtio backends. - Add a new ioctl to export the count of pins on the I/O APIC from vmm to the hypervisor. - Use pins on the I/O APIC >= 16 for PCI interrupts leaving 0-15 for ISA interrupts. - Populate the MP Table with I/O interrupt entries for any PCI INTx interrupts. - Create a _PRT table under the PCI root bridge in ACPI to route any PCI INTx interrupts appropriately. - Track which INTx interrupts are in use per-slot so that functions that share a slot attempt to distribute their INTx interrupts across the four available pins. - Implicitly mask INTx interrupts if either MSI or MSI-X is enabled and when the INTx DIS bit is set in a function's PCI command register. Either assert or deassert the associated I/O APIC pin when the state of one of those conditions changes. - Add INTx support to the virtio backends. - Always advertise the MSI capability in the virtio backends. Submitted by: neel (7) Reviewed by: neel MFC after: 2 weeks
684 lines
17 KiB
C
684 lines
17 KiB
C
/*-
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* Copyright (c) 2011 NetApp, Inc.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY NETAPP, INC ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL NETAPP, INC OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/linker_set.h>
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#include <sys/select.h>
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#include <sys/uio.h>
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#include <sys/ioctl.h>
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#include <net/ethernet.h>
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#include <errno.h>
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#include <fcntl.h>
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#include <stdio.h>
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#include <stdlib.h>
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#include <stdint.h>
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#include <string.h>
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#include <strings.h>
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#include <unistd.h>
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#include <assert.h>
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#include <md5.h>
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#include <pthread.h>
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#include <pthread_np.h>
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#include "bhyverun.h"
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#include "pci_emul.h"
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#include "mevent.h"
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#include "virtio.h"
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#define VTNET_RINGSZ 1024
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#define VTNET_MAXSEGS 32
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/*
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* Host capabilities. Note that we only offer a few of these.
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*/
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#define VIRTIO_NET_F_CSUM (1 << 0) /* host handles partial cksum */
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#define VIRTIO_NET_F_GUEST_CSUM (1 << 1) /* guest handles partial cksum */
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#define VIRTIO_NET_F_MAC (1 << 5) /* host supplies MAC */
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#define VIRTIO_NET_F_GSO_DEPREC (1 << 6) /* deprecated: host handles GSO */
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#define VIRTIO_NET_F_GUEST_TSO4 (1 << 7) /* guest can rcv TSOv4 */
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#define VIRTIO_NET_F_GUEST_TSO6 (1 << 8) /* guest can rcv TSOv6 */
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#define VIRTIO_NET_F_GUEST_ECN (1 << 9) /* guest can rcv TSO with ECN */
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#define VIRTIO_NET_F_GUEST_UFO (1 << 10) /* guest can rcv UFO */
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#define VIRTIO_NET_F_HOST_TSO4 (1 << 11) /* host can rcv TSOv4 */
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#define VIRTIO_NET_F_HOST_TSO6 (1 << 12) /* host can rcv TSOv6 */
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#define VIRTIO_NET_F_HOST_ECN (1 << 13) /* host can rcv TSO with ECN */
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#define VIRTIO_NET_F_HOST_UFO (1 << 14) /* host can rcv UFO */
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#define VIRTIO_NET_F_MRG_RXBUF (1 << 15) /* host can merge RX buffers */
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#define VIRTIO_NET_F_STATUS (1 << 16) /* config status field available */
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#define VIRTIO_NET_F_CTRL_VQ (1 << 17) /* control channel available */
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#define VIRTIO_NET_F_CTRL_RX (1 << 18) /* control channel RX mode support */
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#define VIRTIO_NET_F_CTRL_VLAN (1 << 19) /* control channel VLAN filtering */
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#define VIRTIO_NET_F_GUEST_ANNOUNCE \
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(1 << 21) /* guest can send gratuitous pkts */
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#define VTNET_S_HOSTCAPS \
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( VIRTIO_NET_F_MAC | VIRTIO_NET_F_MRG_RXBUF | VIRTIO_NET_F_STATUS | \
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VIRTIO_F_NOTIFY_ON_EMPTY)
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/*
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* PCI config-space "registers"
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*/
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struct virtio_net_config {
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uint8_t mac[6];
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uint16_t status;
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} __packed;
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/*
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* Queue definitions.
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*/
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#define VTNET_RXQ 0
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#define VTNET_TXQ 1
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#define VTNET_CTLQ 2 /* NB: not yet supported */
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#define VTNET_MAXQ 3
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/*
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* Fixed network header size
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*/
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struct virtio_net_rxhdr {
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uint8_t vrh_flags;
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uint8_t vrh_gso_type;
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uint16_t vrh_hdr_len;
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uint16_t vrh_gso_size;
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uint16_t vrh_csum_start;
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uint16_t vrh_csum_offset;
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uint16_t vrh_bufs;
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} __packed;
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/*
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* Debug printf
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*/
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static int pci_vtnet_debug;
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#define DPRINTF(params) if (pci_vtnet_debug) printf params
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#define WPRINTF(params) printf params
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/*
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* Per-device softc
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*/
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struct pci_vtnet_softc {
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struct virtio_softc vsc_vs;
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struct vqueue_info vsc_queues[VTNET_MAXQ - 1];
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pthread_mutex_t vsc_mtx;
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struct mevent *vsc_mevp;
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int vsc_tapfd;
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int vsc_rx_ready;
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volatile int resetting; /* set and checked outside lock */
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uint32_t vsc_features;
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struct virtio_net_config vsc_config;
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pthread_mutex_t rx_mtx;
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int rx_in_progress;
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pthread_t tx_tid;
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pthread_mutex_t tx_mtx;
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pthread_cond_t tx_cond;
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int tx_in_progress;
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};
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static void pci_vtnet_reset(void *);
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/* static void pci_vtnet_notify(void *, struct vqueue_info *); */
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static int pci_vtnet_cfgread(void *, int, int, uint32_t *);
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static int pci_vtnet_cfgwrite(void *, int, int, uint32_t);
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static struct virtio_consts vtnet_vi_consts = {
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"vtnet", /* our name */
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VTNET_MAXQ - 1, /* we currently support 2 virtqueues */
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sizeof(struct virtio_net_config), /* config reg size */
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pci_vtnet_reset, /* reset */
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NULL, /* device-wide qnotify -- not used */
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pci_vtnet_cfgread, /* read PCI config */
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pci_vtnet_cfgwrite, /* write PCI config */
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VTNET_S_HOSTCAPS, /* our capabilities */
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};
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/*
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* If the transmit thread is active then stall until it is done.
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*/
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static void
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pci_vtnet_txwait(struct pci_vtnet_softc *sc)
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{
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pthread_mutex_lock(&sc->tx_mtx);
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while (sc->tx_in_progress) {
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pthread_mutex_unlock(&sc->tx_mtx);
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usleep(10000);
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pthread_mutex_lock(&sc->tx_mtx);
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}
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pthread_mutex_unlock(&sc->tx_mtx);
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}
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/*
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* If the receive thread is active then stall until it is done.
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*/
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static void
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pci_vtnet_rxwait(struct pci_vtnet_softc *sc)
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{
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pthread_mutex_lock(&sc->rx_mtx);
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while (sc->rx_in_progress) {
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pthread_mutex_unlock(&sc->rx_mtx);
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usleep(10000);
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pthread_mutex_lock(&sc->rx_mtx);
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}
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pthread_mutex_unlock(&sc->rx_mtx);
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}
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static void
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pci_vtnet_reset(void *vsc)
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{
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struct pci_vtnet_softc *sc = vsc;
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DPRINTF(("vtnet: device reset requested !\n"));
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sc->resetting = 1;
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/*
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* Wait for the transmit and receive threads to finish their
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* processing.
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*/
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pci_vtnet_txwait(sc);
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pci_vtnet_rxwait(sc);
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sc->vsc_rx_ready = 0;
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/* now reset rings, MSI-X vectors, and negotiated capabilities */
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vi_reset_dev(&sc->vsc_vs);
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sc->resetting = 0;
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}
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/*
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* Called to send a buffer chain out to the tap device
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*/
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static void
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pci_vtnet_tap_tx(struct pci_vtnet_softc *sc, struct iovec *iov, int iovcnt,
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int len)
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{
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static char pad[60]; /* all zero bytes */
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if (sc->vsc_tapfd == -1)
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return;
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/*
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* If the length is < 60, pad out to that and add the
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* extra zero'd segment to the iov. It is guaranteed that
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* there is always an extra iov available by the caller.
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*/
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if (len < 60) {
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iov[iovcnt].iov_base = pad;
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iov[iovcnt].iov_len = 60 - len;
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iovcnt++;
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}
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(void) writev(sc->vsc_tapfd, iov, iovcnt);
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}
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/*
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* Called when there is read activity on the tap file descriptor.
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* Each buffer posted by the guest is assumed to be able to contain
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* an entire ethernet frame + rx header.
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* MP note: the dummybuf is only used for discarding frames, so there
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* is no need for it to be per-vtnet or locked.
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*/
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static uint8_t dummybuf[2048];
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static void
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pci_vtnet_tap_rx(struct pci_vtnet_softc *sc)
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{
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struct vqueue_info *vq;
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struct virtio_net_rxhdr *vrx;
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uint8_t *buf;
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int len;
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struct iovec iov;
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/*
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* Should never be called without a valid tap fd
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*/
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assert(sc->vsc_tapfd != -1);
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/*
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* But, will be called when the rx ring hasn't yet
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* been set up or the guest is resetting the device.
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*/
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if (!sc->vsc_rx_ready || sc->resetting) {
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/*
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* Drop the packet and try later.
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*/
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(void) read(sc->vsc_tapfd, dummybuf, sizeof(dummybuf));
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return;
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}
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/*
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* Check for available rx buffers
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*/
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vq = &sc->vsc_queues[VTNET_RXQ];
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vq_startchains(vq);
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if (!vq_has_descs(vq)) {
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/*
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* Drop the packet and try later. Interrupt on
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* empty, if that's negotiated.
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*/
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(void) read(sc->vsc_tapfd, dummybuf, sizeof(dummybuf));
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vq_endchains(vq, 1);
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return;
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}
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do {
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/*
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* Get descriptor chain, which should have just
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* one descriptor in it.
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* ??? allow guests to use multiple descs?
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*/
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assert(vq_getchain(vq, &iov, 1, NULL) == 1);
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/*
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* Get a pointer to the rx header, and use the
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* data immediately following it for the packet buffer.
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*/
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vrx = iov.iov_base;
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buf = (uint8_t *)(vrx + 1);
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len = read(sc->vsc_tapfd, buf,
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iov.iov_len - sizeof(struct virtio_net_rxhdr));
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if (len < 0 && errno == EWOULDBLOCK) {
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/*
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* No more packets, but still some avail ring
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* entries. Interrupt if needed/appropriate.
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*/
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vq_endchains(vq, 0);
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return;
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}
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/*
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* The only valid field in the rx packet header is the
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* number of buffers, which is always 1 without TSO
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* support.
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*/
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memset(vrx, 0, sizeof(struct virtio_net_rxhdr));
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vrx->vrh_bufs = 1;
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/*
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* Release this chain and handle more chains.
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*/
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vq_relchain(vq, len + sizeof(struct virtio_net_rxhdr));
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} while (vq_has_descs(vq));
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/* Interrupt if needed, including for NOTIFY_ON_EMPTY. */
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vq_endchains(vq, 1);
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}
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static void
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pci_vtnet_tap_callback(int fd, enum ev_type type, void *param)
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{
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struct pci_vtnet_softc *sc = param;
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pthread_mutex_lock(&sc->rx_mtx);
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sc->rx_in_progress = 1;
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pci_vtnet_tap_rx(sc);
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sc->rx_in_progress = 0;
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pthread_mutex_unlock(&sc->rx_mtx);
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}
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static void
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pci_vtnet_ping_rxq(void *vsc, struct vqueue_info *vq)
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{
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struct pci_vtnet_softc *sc = vsc;
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/*
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* A qnotify means that the rx process can now begin
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*/
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if (sc->vsc_rx_ready == 0) {
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sc->vsc_rx_ready = 1;
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}
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}
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static void
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pci_vtnet_proctx(struct pci_vtnet_softc *sc, struct vqueue_info *vq)
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{
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struct iovec iov[VTNET_MAXSEGS + 1];
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int i, n;
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int plen, tlen;
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/*
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* Obtain chain of descriptors. The first one is
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* really the header descriptor, so we need to sum
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* up two lengths: packet length and transfer length.
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*/
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n = vq_getchain(vq, iov, VTNET_MAXSEGS, NULL);
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assert(n >= 1 && n <= VTNET_MAXSEGS);
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plen = 0;
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tlen = iov[0].iov_len;
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for (i = 1; i < n; i++) {
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plen += iov[i].iov_len;
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tlen += iov[i].iov_len;
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}
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DPRINTF(("virtio: packet send, %d bytes, %d segs\n\r", plen, n));
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pci_vtnet_tap_tx(sc, &iov[1], n - 1, plen);
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/* chain is processed, release it and set tlen */
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vq_relchain(vq, tlen);
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}
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static void
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pci_vtnet_ping_txq(void *vsc, struct vqueue_info *vq)
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{
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struct pci_vtnet_softc *sc = vsc;
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/*
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* Any ring entries to process?
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*/
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if (!vq_has_descs(vq))
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return;
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/* Signal the tx thread for processing */
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pthread_mutex_lock(&sc->tx_mtx);
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if (sc->tx_in_progress == 0)
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pthread_cond_signal(&sc->tx_cond);
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pthread_mutex_unlock(&sc->tx_mtx);
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}
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/*
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* Thread which will handle processing of TX desc
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*/
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static void *
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pci_vtnet_tx_thread(void *param)
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{
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struct pci_vtnet_softc *sc = param;
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struct vqueue_info *vq;
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int have_work, error;
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vq = &sc->vsc_queues[VTNET_TXQ];
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/*
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* Let us wait till the tx queue pointers get initialised &
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* first tx signaled
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*/
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pthread_mutex_lock(&sc->tx_mtx);
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error = pthread_cond_wait(&sc->tx_cond, &sc->tx_mtx);
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assert(error == 0);
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for (;;) {
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/* note - tx mutex is locked here */
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do {
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if (sc->resetting)
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have_work = 0;
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else
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have_work = vq_has_descs(vq);
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if (!have_work) {
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sc->tx_in_progress = 0;
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error = pthread_cond_wait(&sc->tx_cond,
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&sc->tx_mtx);
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assert(error == 0);
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}
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} while (!have_work);
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sc->tx_in_progress = 1;
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pthread_mutex_unlock(&sc->tx_mtx);
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vq_startchains(vq);
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do {
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/*
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* Run through entries, placing them into
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* iovecs and sending when an end-of-packet
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* is found
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*/
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pci_vtnet_proctx(sc, vq);
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} while (vq_has_descs(vq));
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/*
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* Generate an interrupt if needed.
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*/
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vq_endchains(vq, 1);
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pthread_mutex_lock(&sc->tx_mtx);
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}
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}
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#ifdef notyet
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static void
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pci_vtnet_ping_ctlq(void *vsc, struct vqueue_info *vq)
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{
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DPRINTF(("vtnet: control qnotify!\n\r"));
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}
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#endif
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static int
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pci_vtnet_parsemac(char *mac_str, uint8_t *mac_addr)
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{
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struct ether_addr *ea;
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char *tmpstr;
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char zero_addr[ETHER_ADDR_LEN] = { 0, 0, 0, 0, 0, 0 };
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tmpstr = strsep(&mac_str,"=");
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if ((mac_str != NULL) && (!strcmp(tmpstr,"mac"))) {
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ea = ether_aton(mac_str);
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if (ea == NULL || ETHER_IS_MULTICAST(ea->octet) ||
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memcmp(ea->octet, zero_addr, ETHER_ADDR_LEN) == 0) {
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fprintf(stderr, "Invalid MAC %s\n", mac_str);
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return (EINVAL);
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} else
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|
memcpy(mac_addr, ea->octet, ETHER_ADDR_LEN);
|
|
}
|
|
|
|
return (0);
|
|
}
|
|
|
|
|
|
static int
|
|
pci_vtnet_init(struct vmctx *ctx, struct pci_devinst *pi, char *opts)
|
|
{
|
|
MD5_CTX mdctx;
|
|
unsigned char digest[16];
|
|
char nstr[80];
|
|
char tname[MAXCOMLEN + 1];
|
|
struct pci_vtnet_softc *sc;
|
|
char *devname;
|
|
char *vtopts;
|
|
int mac_provided;
|
|
|
|
sc = malloc(sizeof(struct pci_vtnet_softc));
|
|
memset(sc, 0, sizeof(struct pci_vtnet_softc));
|
|
|
|
pthread_mutex_init(&sc->vsc_mtx, NULL);
|
|
|
|
vi_softc_linkup(&sc->vsc_vs, &vtnet_vi_consts, sc, pi, sc->vsc_queues);
|
|
sc->vsc_vs.vs_mtx = &sc->vsc_mtx;
|
|
|
|
sc->vsc_queues[VTNET_RXQ].vq_qsize = VTNET_RINGSZ;
|
|
sc->vsc_queues[VTNET_RXQ].vq_notify = pci_vtnet_ping_rxq;
|
|
sc->vsc_queues[VTNET_TXQ].vq_qsize = VTNET_RINGSZ;
|
|
sc->vsc_queues[VTNET_TXQ].vq_notify = pci_vtnet_ping_txq;
|
|
#ifdef notyet
|
|
sc->vsc_queues[VTNET_CTLQ].vq_qsize = VTNET_RINGSZ;
|
|
sc->vsc_queues[VTNET_CTLQ].vq_notify = pci_vtnet_ping_ctlq;
|
|
#endif
|
|
|
|
/*
|
|
* Attempt to open the tap device and read the MAC address
|
|
* if specified
|
|
*/
|
|
mac_provided = 0;
|
|
sc->vsc_tapfd = -1;
|
|
if (opts != NULL) {
|
|
char tbuf[80];
|
|
int err;
|
|
|
|
devname = vtopts = strdup(opts);
|
|
(void) strsep(&vtopts, ",");
|
|
|
|
if (vtopts != NULL) {
|
|
err = pci_vtnet_parsemac(vtopts, sc->vsc_config.mac);
|
|
if (err != 0) {
|
|
free(devname);
|
|
return (err);
|
|
}
|
|
mac_provided = 1;
|
|
}
|
|
|
|
strcpy(tbuf, "/dev/");
|
|
strlcat(tbuf, devname, sizeof(tbuf));
|
|
|
|
free(devname);
|
|
|
|
sc->vsc_tapfd = open(tbuf, O_RDWR);
|
|
if (sc->vsc_tapfd == -1) {
|
|
WPRINTF(("open of tap device %s failed\n", tbuf));
|
|
} else {
|
|
/*
|
|
* Set non-blocking and register for read
|
|
* notifications with the event loop
|
|
*/
|
|
int opt = 1;
|
|
if (ioctl(sc->vsc_tapfd, FIONBIO, &opt) < 0) {
|
|
WPRINTF(("tap device O_NONBLOCK failed\n"));
|
|
close(sc->vsc_tapfd);
|
|
sc->vsc_tapfd = -1;
|
|
}
|
|
|
|
sc->vsc_mevp = mevent_add(sc->vsc_tapfd,
|
|
EVF_READ,
|
|
pci_vtnet_tap_callback,
|
|
sc);
|
|
if (sc->vsc_mevp == NULL) {
|
|
WPRINTF(("Could not register event\n"));
|
|
close(sc->vsc_tapfd);
|
|
sc->vsc_tapfd = -1;
|
|
}
|
|
}
|
|
}
|
|
|
|
/*
|
|
* The default MAC address is the standard NetApp OUI of 00-a0-98,
|
|
* followed by an MD5 of the PCI slot/func number and dev name
|
|
*/
|
|
if (!mac_provided) {
|
|
snprintf(nstr, sizeof(nstr), "%d-%d-%s", pi->pi_slot,
|
|
pi->pi_func, vmname);
|
|
|
|
MD5Init(&mdctx);
|
|
MD5Update(&mdctx, nstr, strlen(nstr));
|
|
MD5Final(digest, &mdctx);
|
|
|
|
sc->vsc_config.mac[0] = 0x00;
|
|
sc->vsc_config.mac[1] = 0xa0;
|
|
sc->vsc_config.mac[2] = 0x98;
|
|
sc->vsc_config.mac[3] = digest[0];
|
|
sc->vsc_config.mac[4] = digest[1];
|
|
sc->vsc_config.mac[5] = digest[2];
|
|
}
|
|
|
|
/* initialize config space */
|
|
pci_set_cfgdata16(pi, PCIR_DEVICE, VIRTIO_DEV_NET);
|
|
pci_set_cfgdata16(pi, PCIR_VENDOR, VIRTIO_VENDOR);
|
|
pci_set_cfgdata8(pi, PCIR_CLASS, PCIC_NETWORK);
|
|
pci_set_cfgdata16(pi, PCIR_SUBDEV_0, VIRTIO_TYPE_NET);
|
|
|
|
pci_lintr_request(pi);
|
|
|
|
/* link always up */
|
|
sc->vsc_config.status = 1;
|
|
|
|
/* use BAR 1 to map MSI-X table and PBA, if we're using MSI-X */
|
|
if (vi_intr_init(&sc->vsc_vs, 1, fbsdrun_virtio_msix()))
|
|
return (1);
|
|
|
|
/* use BAR 0 to map config regs in IO space */
|
|
vi_set_io_bar(&sc->vsc_vs, 0);
|
|
|
|
sc->resetting = 0;
|
|
|
|
sc->rx_in_progress = 0;
|
|
pthread_mutex_init(&sc->rx_mtx, NULL);
|
|
|
|
/*
|
|
* Initialize tx semaphore & spawn TX processing thread.
|
|
* As of now, only one thread for TX desc processing is
|
|
* spawned.
|
|
*/
|
|
sc->tx_in_progress = 0;
|
|
pthread_mutex_init(&sc->tx_mtx, NULL);
|
|
pthread_cond_init(&sc->tx_cond, NULL);
|
|
pthread_create(&sc->tx_tid, NULL, pci_vtnet_tx_thread, (void *)sc);
|
|
snprintf(tname, sizeof(tname), "vtnet-%d:%d tx", pi->pi_slot,
|
|
pi->pi_func);
|
|
pthread_set_name_np(sc->tx_tid, tname);
|
|
|
|
return (0);
|
|
}
|
|
|
|
static int
|
|
pci_vtnet_cfgwrite(void *vsc, int offset, int size, uint32_t value)
|
|
{
|
|
struct pci_vtnet_softc *sc = vsc;
|
|
void *ptr;
|
|
|
|
if (offset < 6) {
|
|
assert(offset + size <= 6);
|
|
/*
|
|
* The driver is allowed to change the MAC address
|
|
*/
|
|
ptr = &sc->vsc_config.mac[offset];
|
|
memcpy(ptr, &value, size);
|
|
} else {
|
|
DPRINTF(("vtnet: write to readonly reg %d\n\r", offset));
|
|
return (1);
|
|
}
|
|
return (0);
|
|
}
|
|
|
|
static int
|
|
pci_vtnet_cfgread(void *vsc, int offset, int size, uint32_t *retval)
|
|
{
|
|
struct pci_vtnet_softc *sc = vsc;
|
|
void *ptr;
|
|
|
|
ptr = (uint8_t *)&sc->vsc_config + offset;
|
|
memcpy(retval, ptr, size);
|
|
return (0);
|
|
}
|
|
|
|
struct pci_devemu pci_de_vnet = {
|
|
.pe_emu = "virtio-net",
|
|
.pe_init = pci_vtnet_init,
|
|
.pe_barwrite = vi_pci_write,
|
|
.pe_barread = vi_pci_read
|
|
};
|
|
PCI_EMUL_SET(pci_de_vnet);
|