17763042e4
64-bit PowerPC CPUs. Add infrastructure to support variable numbers of SLB slots and move the user slot from 63 to 0, so that it is always available.
791 lines
19 KiB
C
791 lines
19 KiB
C
/*-
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* Copyright (C) 1995, 1996 Wolfgang Solfrank.
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* Copyright (C) 1995, 1996 TooLs GmbH.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by TooLs GmbH.
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* 4. The name of TooLs GmbH may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
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* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
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* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
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* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/*-
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* Copyright (C) 2001 Benno Rice
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY Benno Rice ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
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* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
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* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
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* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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* $NetBSD: machdep.c,v 1.74.2.1 2000/11/01 16:13:48 tv Exp $
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include "opt_compat.h"
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#include "opt_ddb.h"
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#include "opt_kstack_pages.h"
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#include <sys/param.h>
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#include <sys/proc.h>
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#include <sys/systm.h>
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#include <sys/bio.h>
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#include <sys/buf.h>
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#include <sys/bus.h>
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#include <sys/cons.h>
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#include <sys/cpu.h>
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#include <sys/eventhandler.h>
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#include <sys/exec.h>
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#include <sys/imgact.h>
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#include <sys/kdb.h>
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#include <sys/kernel.h>
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#include <sys/ktr.h>
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#include <sys/linker.h>
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#include <sys/lock.h>
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#include <sys/malloc.h>
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#include <sys/mbuf.h>
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#include <sys/msgbuf.h>
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#include <sys/mutex.h>
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#include <sys/ptrace.h>
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#include <sys/reboot.h>
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#include <sys/signalvar.h>
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#include <sys/syscallsubr.h>
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#include <sys/sysctl.h>
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#include <sys/sysent.h>
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#include <sys/sysproto.h>
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#include <sys/ucontext.h>
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#include <sys/uio.h>
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#include <sys/vmmeter.h>
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#include <sys/vnode.h>
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#include <net/netisr.h>
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#include <vm/vm.h>
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#include <vm/vm_extern.h>
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#include <vm/vm_kern.h>
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#include <vm/vm_page.h>
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#include <vm/vm_map.h>
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#include <vm/vm_object.h>
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#include <vm/vm_pager.h>
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#include <machine/altivec.h>
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#ifndef __powerpc64__
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#include <machine/bat.h>
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#endif
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#include <machine/cpu.h>
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#include <machine/elf.h>
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#include <machine/fpu.h>
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#include <machine/hid.h>
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#include <machine/kdb.h>
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#include <machine/md_var.h>
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#include <machine/metadata.h>
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#include <machine/mmuvar.h>
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#include <machine/pcb.h>
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#include <machine/reg.h>
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#include <machine/sigframe.h>
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#include <machine/spr.h>
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#include <machine/trap.h>
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#include <machine/vmparam.h>
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#include <ddb/ddb.h>
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#include <dev/ofw/openfirm.h>
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#ifdef DDB
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extern vm_offset_t ksym_start, ksym_end;
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#endif
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int cold = 1;
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#ifdef __powerpc64__
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extern int n_slbs;
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int cacheline_size = 128;
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#else
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int cacheline_size = 32;
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#endif
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int hw_direct_map = 1;
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struct pcpu __pcpu[MAXCPU];
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static struct trapframe frame0;
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char machine[] = "powerpc";
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SYSCTL_STRING(_hw, HW_MACHINE, machine, CTLFLAG_RD, machine, 0, "");
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static void cpu_startup(void *);
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SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL);
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SYSCTL_INT(_machdep, CPU_CACHELINE, cacheline_size,
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CTLFLAG_RD, &cacheline_size, 0, "");
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uintptr_t powerpc_init(vm_offset_t, vm_offset_t, vm_offset_t, void *);
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int setfault(faultbuf); /* defined in locore.S */
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long Maxmem = 0;
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long realmem = 0;
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#ifndef __powerpc64__
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struct bat battable[16];
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#endif
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struct kva_md_info kmi;
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static void
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cpu_startup(void *dummy)
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{
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/*
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* Initialise the decrementer-based clock.
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*/
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decr_init();
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/*
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* Good {morning,afternoon,evening,night}.
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*/
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cpu_setup(PCPU_GET(cpuid));
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#ifdef PERFMON
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perfmon_init();
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#endif
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printf("real memory = %ld (%ld MB)\n", ptoa(physmem),
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ptoa(physmem) / 1048576);
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realmem = physmem;
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if (bootverbose)
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printf("available KVA = %zd (%zd MB)\n",
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virtual_end - virtual_avail,
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(virtual_end - virtual_avail) / 1048576);
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/*
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* Display any holes after the first chunk of extended memory.
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*/
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if (bootverbose) {
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int indx;
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printf("Physical memory chunk(s):\n");
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for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) {
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vm_offset_t size1 =
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phys_avail[indx + 1] - phys_avail[indx];
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#ifdef __powerpc64__
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printf("0x%016lx - 0x%016lx, %ld bytes (%ld pages)\n",
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#else
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printf("0x%08x - 0x%08x, %d bytes (%ld pages)\n",
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#endif
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phys_avail[indx], phys_avail[indx + 1] - 1, size1,
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size1 / PAGE_SIZE);
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}
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}
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vm_ksubmap_init(&kmi);
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printf("avail memory = %ld (%ld MB)\n", ptoa(cnt.v_free_count),
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ptoa(cnt.v_free_count) / 1048576);
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/*
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* Set up buffers, so they can be used to read disk labels.
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*/
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bufinit();
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vm_pager_bufferinit();
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}
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extern char kernel_text[], _end[];
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#ifndef __powerpc64__
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/* Bits for running on 64-bit systems in 32-bit mode. */
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extern void *testppc64, *testppc64size;
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extern void *restorebridge, *restorebridgesize;
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extern void *rfid_patch, *rfi_patch1, *rfi_patch2;
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extern void *trapcode64;
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#endif
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#ifdef SMP
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extern void *rstcode, *rstsize;
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#endif
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extern void *trapcode, *trapsize;
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extern void *alitrap, *alisize;
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extern void *dsitrap, *dsisize;
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extern void *decrint, *decrsize;
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extern void *extint, *extsize;
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extern void *dblow, *dbsize;
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extern void *imisstrap, *imisssize;
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extern void *dlmisstrap, *dlmisssize;
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extern void *dsmisstrap, *dsmisssize;
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uintptr_t
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powerpc_init(vm_offset_t startkernel, vm_offset_t endkernel,
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vm_offset_t basekernel, void *mdp)
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{
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struct pcpu *pc;
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void *generictrap;
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size_t trap_offset;
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void *kmdp;
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char *env;
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register_t msr, scratch;
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uint8_t *cache_check;
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int cacheline_warn;
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#ifndef __powerpc64__
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int ppc64;
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#endif
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kmdp = NULL;
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trap_offset = 0;
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cacheline_warn = 0;
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/*
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* Parse metadata if present and fetch parameters. Must be done
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* before console is inited so cninit gets the right value of
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* boothowto.
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*/
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if (mdp != NULL) {
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preload_metadata = mdp;
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kmdp = preload_search_by_type("elf kernel");
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if (kmdp != NULL) {
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boothowto = MD_FETCH(kmdp, MODINFOMD_HOWTO, int);
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kern_envp = MD_FETCH(kmdp, MODINFOMD_ENVP, char *);
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endkernel = ulmax(endkernel, MD_FETCH(kmdp,
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MODINFOMD_KERNEND, vm_offset_t));
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#ifdef DDB
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ksym_start = MD_FETCH(kmdp, MODINFOMD_SSYM, uintptr_t);
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ksym_end = MD_FETCH(kmdp, MODINFOMD_ESYM, uintptr_t);
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#endif
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}
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}
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/*
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* Init params/tunables that can be overridden by the loader
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*/
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init_param1();
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/*
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* Start initializing proc0 and thread0.
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*/
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proc_linkup0(&proc0, &thread0);
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thread0.td_frame = &frame0;
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/*
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* Set up per-cpu data.
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*/
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pc = __pcpu;
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pcpu_init(pc, 0, sizeof(struct pcpu));
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pc->pc_curthread = &thread0;
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pc->pc_cpuid = 0;
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__asm __volatile("mtsprg 0, %0" :: "r"(pc));
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/*
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* Init mutexes, which we use heavily in PMAP
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*/
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mutex_init();
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/*
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* Install the OF client interface
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*/
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OF_bootstrap();
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/*
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* Initialize the console before printing anything.
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*/
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cninit();
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/*
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* Complain if there is no metadata.
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*/
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if (mdp == NULL || kmdp == NULL) {
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printf("powerpc_init: no loader metadata.\n");
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}
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/*
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* Init KDB
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*/
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kdb_init();
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/* Various very early CPU fix ups */
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switch (mfpvr() >> 16) {
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/*
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* PowerPC 970 CPUs have a misfeature requested by Apple that
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* makes them pretend they have a 32-byte cacheline. Turn this
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* off before we measure the cacheline size.
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*/
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case IBM970:
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case IBM970FX:
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case IBM970MP:
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case IBM970GX:
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scratch = mfspr(SPR_HID5);
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scratch &= ~HID5_970_DCBZ_SIZE_HI;
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mtspr(SPR_HID5, scratch);
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break;
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#ifdef __powerpc64__
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case IBMPOWER7:
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/* XXX: get from ibm,slb-size in device tree */
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n_slbs = 32;
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break;
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#endif
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}
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/*
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* Initialize the interrupt tables and figure out our cache line
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* size and whether or not we need the 64-bit bridge code.
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*/
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/*
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* Disable translation in case the vector area hasn't been
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* mapped (G5). Note that no OFW calls can be made until
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* translation is re-enabled.
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*/
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msr = mfmsr();
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mtmsr((msr & ~(PSL_IR | PSL_DR)) | PSL_RI);
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/*
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* Measure the cacheline size using dcbz
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*
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* Use EXC_PGM as a playground. We are about to overwrite it
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* anyway, we know it exists, and we know it is cache-aligned.
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*/
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cache_check = (void *)EXC_PGM;
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for (cacheline_size = 0; cacheline_size < 0x100; cacheline_size++)
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cache_check[cacheline_size] = 0xff;
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__asm __volatile("dcbz 0,%0":: "r" (cache_check) : "memory");
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/* Find the first byte dcbz did not zero to get the cache line size */
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for (cacheline_size = 0; cacheline_size < 0x100 &&
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cache_check[cacheline_size] == 0; cacheline_size++);
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/* Work around psim bug */
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if (cacheline_size == 0) {
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cacheline_warn = 1;
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cacheline_size = 32;
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}
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#ifndef __powerpc64__
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/*
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* Figure out whether we need to use the 64 bit PMAP. This works by
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* executing an instruction that is only legal on 64-bit PPC (mtmsrd),
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* and setting ppc64 = 0 if that causes a trap.
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*/
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ppc64 = 1;
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bcopy(&testppc64, (void *)EXC_PGM, (size_t)&testppc64size);
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__syncicache((void *)EXC_PGM, (size_t)&testppc64size);
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__asm __volatile("\
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mfmsr %0; \
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mtsprg2 %1; \
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\
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mtmsrd %0; \
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mfsprg2 %1;"
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: "=r"(scratch), "=r"(ppc64));
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if (ppc64)
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cpu_features |= PPC_FEATURE_64;
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/*
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* Now copy restorebridge into all the handlers, if necessary,
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* and set up the trap tables.
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*/
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if (cpu_features & PPC_FEATURE_64) {
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/* Patch the two instances of rfi -> rfid */
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bcopy(&rfid_patch,&rfi_patch1,4);
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#ifdef KDB
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/* rfi_patch2 is at the end of dbleave */
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bcopy(&rfid_patch,&rfi_patch2,4);
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#endif
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/*
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* Copy a code snippet to restore 32-bit bridge mode
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* to the top of every non-generic trap handler
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*/
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trap_offset += (size_t)&restorebridgesize;
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bcopy(&restorebridge, (void *)EXC_RST, trap_offset);
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bcopy(&restorebridge, (void *)EXC_DSI, trap_offset);
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bcopy(&restorebridge, (void *)EXC_ALI, trap_offset);
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bcopy(&restorebridge, (void *)EXC_PGM, trap_offset);
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bcopy(&restorebridge, (void *)EXC_MCHK, trap_offset);
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bcopy(&restorebridge, (void *)EXC_TRC, trap_offset);
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bcopy(&restorebridge, (void *)EXC_BPT, trap_offset);
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/*
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* Set the common trap entry point to the one that
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* knows to restore 32-bit operation on execution.
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*/
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generictrap = &trapcode64;
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} else {
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generictrap = &trapcode;
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}
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#else /* powerpc64 */
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cpu_features |= PPC_FEATURE_64;
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generictrap = &trapcode;
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#endif
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#ifdef SMP
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bcopy(&rstcode, (void *)(EXC_RST + trap_offset), (size_t)&rstsize);
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#else
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bcopy(generictrap, (void *)EXC_RST, (size_t)&trapsize);
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#endif
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#ifdef KDB
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bcopy(&dblow, (void *)(EXC_MCHK + trap_offset), (size_t)&dbsize);
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bcopy(&dblow, (void *)(EXC_PGM + trap_offset), (size_t)&dbsize);
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bcopy(&dblow, (void *)(EXC_TRC + trap_offset), (size_t)&dbsize);
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bcopy(&dblow, (void *)(EXC_BPT + trap_offset), (size_t)&dbsize);
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#else
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bcopy(generictrap, (void *)EXC_MCHK, (size_t)&trapsize);
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bcopy(generictrap, (void *)EXC_PGM, (size_t)&trapsize);
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bcopy(generictrap, (void *)EXC_TRC, (size_t)&trapsize);
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bcopy(generictrap, (void *)EXC_BPT, (size_t)&trapsize);
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#endif
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bcopy(&alitrap, (void *)(EXC_ALI + trap_offset), (size_t)&alisize);
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bcopy(&dsitrap, (void *)(EXC_DSI + trap_offset), (size_t)&dsisize);
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bcopy(generictrap, (void *)EXC_ISI, (size_t)&trapsize);
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#ifdef __powerpc64__
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bcopy(generictrap, (void *)EXC_DSE, (size_t)&trapsize);
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bcopy(generictrap, (void *)EXC_ISE, (size_t)&trapsize);
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#endif
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bcopy(generictrap, (void *)EXC_EXI, (size_t)&trapsize);
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bcopy(generictrap, (void *)EXC_FPU, (size_t)&trapsize);
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bcopy(generictrap, (void *)EXC_DECR, (size_t)&trapsize);
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bcopy(generictrap, (void *)EXC_SC, (size_t)&trapsize);
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bcopy(generictrap, (void *)EXC_FPA, (size_t)&trapsize);
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|
bcopy(generictrap, (void *)EXC_VEC, (size_t)&trapsize);
|
|
bcopy(generictrap, (void *)EXC_VECAST_G4, (size_t)&trapsize);
|
|
bcopy(generictrap, (void *)EXC_VECAST_G5, (size_t)&trapsize);
|
|
#ifndef __powerpc64__
|
|
/* G2-specific TLB miss helper handlers */
|
|
bcopy(&imisstrap, (void *)EXC_IMISS, (size_t)&imisssize);
|
|
bcopy(&dlmisstrap, (void *)EXC_DLMISS, (size_t)&dlmisssize);
|
|
bcopy(&dsmisstrap, (void *)EXC_DSMISS, (size_t)&dsmisssize);
|
|
#endif
|
|
__syncicache(EXC_RSVD, EXC_LAST - EXC_RSVD);
|
|
|
|
/*
|
|
* Restore MSR
|
|
*/
|
|
mtmsr(msr);
|
|
|
|
/* Warn if cachline size was not determined */
|
|
if (cacheline_warn == 1) {
|
|
printf("WARNING: cacheline size undetermined, setting to 32\n");
|
|
}
|
|
|
|
/*
|
|
* Choose a platform module so we can get the physical memory map.
|
|
*/
|
|
|
|
platform_probe_and_attach();
|
|
|
|
/*
|
|
* Initialise virtual memory. Use BUS_PROBE_GENERIC priority
|
|
* in case the platform module had a better idea of what we
|
|
* should do.
|
|
*/
|
|
if (cpu_features & PPC_FEATURE_64)
|
|
pmap_mmu_install(MMU_TYPE_G5, BUS_PROBE_GENERIC);
|
|
else
|
|
pmap_mmu_install(MMU_TYPE_OEA, BUS_PROBE_GENERIC);
|
|
|
|
pmap_bootstrap(startkernel, endkernel);
|
|
mtmsr(PSL_KERNSET & ~PSL_EE);
|
|
|
|
/*
|
|
* Initialize params/tunables that are derived from memsize
|
|
*/
|
|
init_param2(physmem);
|
|
|
|
/*
|
|
* Grab booted kernel's name
|
|
*/
|
|
env = getenv("kernelname");
|
|
if (env != NULL) {
|
|
strlcpy(kernelname, env, sizeof(kernelname));
|
|
freeenv(env);
|
|
}
|
|
|
|
/*
|
|
* Finish setting up thread0.
|
|
*/
|
|
thread0.td_pcb = (struct pcb *)
|
|
((thread0.td_kstack + thread0.td_kstack_pages * PAGE_SIZE -
|
|
sizeof(struct pcb)) & ~15UL);
|
|
bzero((void *)thread0.td_pcb, sizeof(struct pcb));
|
|
pc->pc_curpcb = thread0.td_pcb;
|
|
|
|
/* Initialise the message buffer. */
|
|
msgbufinit(msgbufp, msgbufsize);
|
|
|
|
#ifdef KDB
|
|
if (boothowto & RB_KDB)
|
|
kdb_enter(KDB_WHY_BOOTFLAGS,
|
|
"Boot flags requested debugger");
|
|
#endif
|
|
|
|
return (((uintptr_t)thread0.td_pcb -
|
|
(sizeof(struct callframe) - 3*sizeof(register_t))) & ~15UL);
|
|
}
|
|
|
|
void
|
|
bzero(void *buf, size_t len)
|
|
{
|
|
caddr_t p;
|
|
|
|
p = buf;
|
|
|
|
while (((vm_offset_t) p & (sizeof(u_long) - 1)) && len) {
|
|
*p++ = 0;
|
|
len--;
|
|
}
|
|
|
|
while (len >= sizeof(u_long) * 8) {
|
|
*(u_long*) p = 0;
|
|
*((u_long*) p + 1) = 0;
|
|
*((u_long*) p + 2) = 0;
|
|
*((u_long*) p + 3) = 0;
|
|
len -= sizeof(u_long) * 8;
|
|
*((u_long*) p + 4) = 0;
|
|
*((u_long*) p + 5) = 0;
|
|
*((u_long*) p + 6) = 0;
|
|
*((u_long*) p + 7) = 0;
|
|
p += sizeof(u_long) * 8;
|
|
}
|
|
|
|
while (len >= sizeof(u_long)) {
|
|
*(u_long*) p = 0;
|
|
len -= sizeof(u_long);
|
|
p += sizeof(u_long);
|
|
}
|
|
|
|
while (len) {
|
|
*p++ = 0;
|
|
len--;
|
|
}
|
|
}
|
|
|
|
void
|
|
cpu_boot(int howto)
|
|
{
|
|
}
|
|
|
|
/*
|
|
* Flush the D-cache for non-DMA I/O so that the I-cache can
|
|
* be made coherent later.
|
|
*/
|
|
void
|
|
cpu_flush_dcache(void *ptr, size_t len)
|
|
{
|
|
/* TBD */
|
|
}
|
|
|
|
void
|
|
cpu_initclocks(void)
|
|
{
|
|
|
|
decr_tc_init();
|
|
cpu_initclocks_bsp();
|
|
}
|
|
|
|
/*
|
|
* Shutdown the CPU as much as possible.
|
|
*/
|
|
void
|
|
cpu_halt(void)
|
|
{
|
|
|
|
OF_exit();
|
|
}
|
|
|
|
int
|
|
ptrace_set_pc(struct thread *td, unsigned long addr)
|
|
{
|
|
struct trapframe *tf;
|
|
|
|
tf = td->td_frame;
|
|
tf->srr0 = (register_t)addr;
|
|
|
|
return (0);
|
|
}
|
|
|
|
int
|
|
ptrace_single_step(struct thread *td)
|
|
{
|
|
struct trapframe *tf;
|
|
|
|
tf = td->td_frame;
|
|
tf->srr1 |= PSL_SE;
|
|
|
|
return (0);
|
|
}
|
|
|
|
int
|
|
ptrace_clear_single_step(struct thread *td)
|
|
{
|
|
struct trapframe *tf;
|
|
|
|
tf = td->td_frame;
|
|
tf->srr1 &= ~PSL_SE;
|
|
|
|
return (0);
|
|
}
|
|
|
|
void
|
|
kdb_cpu_clear_singlestep(void)
|
|
{
|
|
|
|
kdb_frame->srr1 &= ~PSL_SE;
|
|
}
|
|
|
|
void
|
|
kdb_cpu_set_singlestep(void)
|
|
{
|
|
|
|
kdb_frame->srr1 |= PSL_SE;
|
|
}
|
|
|
|
/*
|
|
* Initialise a struct pcpu.
|
|
*/
|
|
void
|
|
cpu_pcpu_init(struct pcpu *pcpu, int cpuid, size_t sz)
|
|
{
|
|
#ifdef __powerpc64__
|
|
/* Copy the SLB contents from the current CPU */
|
|
memcpy(pcpu->pc_slb, PCPU_GET(slb), sizeof(pcpu->pc_slb));
|
|
#endif
|
|
}
|
|
|
|
void
|
|
spinlock_enter(void)
|
|
{
|
|
struct thread *td;
|
|
register_t msr;
|
|
|
|
td = curthread;
|
|
if (td->td_md.md_spinlock_count == 0) {
|
|
msr = intr_disable();
|
|
td->td_md.md_spinlock_count = 1;
|
|
td->td_md.md_saved_msr = msr;
|
|
} else
|
|
td->td_md.md_spinlock_count++;
|
|
critical_enter();
|
|
}
|
|
|
|
void
|
|
spinlock_exit(void)
|
|
{
|
|
struct thread *td;
|
|
register_t msr;
|
|
|
|
td = curthread;
|
|
critical_exit();
|
|
msr = td->td_md.md_saved_msr;
|
|
td->td_md.md_spinlock_count--;
|
|
if (td->td_md.md_spinlock_count == 0)
|
|
intr_restore(msr);
|
|
}
|
|
|
|
/*
|
|
* kcopy(const void *src, void *dst, size_t len);
|
|
*
|
|
* Copy len bytes from src to dst, aborting if we encounter a fatal
|
|
* page fault.
|
|
*
|
|
* kcopy() _must_ save and restore the old fault handler since it is
|
|
* called by uiomove(), which may be in the path of servicing a non-fatal
|
|
* page fault.
|
|
*/
|
|
int
|
|
kcopy(const void *src, void *dst, size_t len)
|
|
{
|
|
struct thread *td;
|
|
faultbuf env, *oldfault;
|
|
int rv;
|
|
|
|
td = PCPU_GET(curthread);
|
|
oldfault = td->td_pcb->pcb_onfault;
|
|
if ((rv = setfault(env)) != 0) {
|
|
td->td_pcb->pcb_onfault = oldfault;
|
|
return rv;
|
|
}
|
|
|
|
memcpy(dst, src, len);
|
|
|
|
td->td_pcb->pcb_onfault = oldfault;
|
|
return (0);
|
|
}
|
|
|
|
int db_trap_glue(struct trapframe *); /* Called from trap_subr.S */
|
|
|
|
int
|
|
db_trap_glue(struct trapframe *frame)
|
|
{
|
|
if (!(frame->srr1 & PSL_PR)
|
|
&& (frame->exc == EXC_TRC || frame->exc == EXC_RUNMODETRC
|
|
|| (frame->exc == EXC_PGM
|
|
&& (frame->srr1 & 0x20000))
|
|
|| frame->exc == EXC_BPT
|
|
|| frame->exc == EXC_DSI)) {
|
|
int type = frame->exc;
|
|
if (type == EXC_PGM && (frame->srr1 & 0x20000)) {
|
|
type = T_BREAKPOINT;
|
|
}
|
|
return (kdb_trap(type, 0, frame));
|
|
}
|
|
|
|
return (0);
|
|
}
|
|
|
|
#ifndef __powerpc64__
|
|
|
|
uint64_t
|
|
va_to_vsid(pmap_t pm, vm_offset_t va)
|
|
{
|
|
return ((pm->pm_sr[(uintptr_t)va >> ADDR_SR_SHFT]) & SR_VSID_MASK);
|
|
}
|
|
|
|
#endif
|