280 lines
7.7 KiB
ArmAsm
280 lines
7.7 KiB
ArmAsm
/*-
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* Copyright (c) 1990 The Regents of the University of California.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the University of
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* California, Berkeley and its contributors.
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* 4. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $Id: exception.s,v 1.1.1.1 1996/06/14 10:04:41 asami Exp $
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*/
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#include "npx.h" /* NNPX */
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#include "assym.s" /* system defines */
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#include <sys/errno.h> /* error return codes */
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#include <machine/spl.h> /* SWI_AST_MASK ... */
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#include <machine/psl.h> /* PSL_I */
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#include <machine/trap.h> /* trap codes */
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#include <sys/syscall.h> /* syscall numbers */
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#include <machine/asmacros.h> /* miscellaneous macros */
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#include <sys/cdefs.h> /* CPP macros */
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#define KDSEL 0x10 /* kernel data selector */
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#define SEL_RPL_MASK 0x0003
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#define TRAPF_CS_OFF (13 * 4)
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.text
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/*****************************************************************************/
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/* Trap handling */
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/*****************************************************************************/
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/*
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* Trap and fault vector routines
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*/
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#define IDTVEC(name) ALIGN_TEXT; .globl __CONCAT(_X,name); __CONCAT(_X,name):
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#define TRAP(a) pushl $(a) ; jmp _alltraps
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/*
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* XXX - debugger traps are now interrupt gates so at least bdb doesn't lose
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* control. The sti's give the standard losing behaviour for ddb and kgdb.
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*/
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#ifdef BDE_DEBUGGER
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#define BDBTRAP(name) \
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ss ; \
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cmpb $0,_bdb_exists ; \
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je 1f ; \
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testb $SEL_RPL_MASK,4(%esp) ; \
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jne 1f ; \
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ss ; \
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.globl __CONCAT(__CONCAT(bdb_,name),_ljmp); \
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__CONCAT(__CONCAT(bdb_,name),_ljmp): \
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ljmp $0,$0 ; \
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1:
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#else
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#define BDBTRAP(name)
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#endif
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#define BPTTRAP(a) testl $PSL_I,4+8(%esp) ; je 1f ; sti ; 1: ; TRAP(a)
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MCOUNT_LABEL(user)
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MCOUNT_LABEL(btrap)
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IDTVEC(div)
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pushl $0; TRAP(T_DIVIDE)
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IDTVEC(dbg)
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BDBTRAP(dbg)
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pushl $0; BPTTRAP(T_TRCTRAP)
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IDTVEC(nmi)
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pushl $0; TRAP(T_NMI)
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IDTVEC(bpt)
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BDBTRAP(bpt)
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pushl $0; BPTTRAP(T_BPTFLT)
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IDTVEC(ofl)
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pushl $0; TRAP(T_OFLOW)
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IDTVEC(bnd)
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pushl $0; TRAP(T_BOUND)
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IDTVEC(ill)
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pushl $0; TRAP(T_PRIVINFLT)
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IDTVEC(dna)
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pushl $0; TRAP(T_DNA)
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IDTVEC(fpusegm)
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pushl $0; TRAP(T_FPOPFLT)
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IDTVEC(tss)
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TRAP(T_TSSFLT)
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IDTVEC(missing)
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TRAP(T_SEGNPFLT)
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IDTVEC(stk)
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TRAP(T_STKFLT)
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IDTVEC(prot)
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TRAP(T_PROTFLT)
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IDTVEC(page)
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TRAP(T_PAGEFLT)
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IDTVEC(mchk)
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pushl $0; TRAP(T_MCHK)
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IDTVEC(rsvd)
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pushl $0; TRAP(T_RESERVED)
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IDTVEC(fpu)
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#if NNPX > 0
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/*
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* Handle like an interrupt (except for accounting) so that we can
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* call npxintr to clear the error. It would be better to handle
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* npx interrupts as traps. This used to be difficult for nested
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* interrupts, but now it is fairly easy - mask nested ones the
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* same as SWI_AST's.
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*/
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pushl $0 /* dummy error code */
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pushl $0 /* dummy trap type */
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pushal
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pushl %ds
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pushl %es /* now the stack frame is a trap frame */
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movl $KDSEL,%eax
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movl %ax,%ds
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movl %ax,%es
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FAKE_MCOUNT(12*4(%esp))
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movl _cpl,%eax
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pushl %eax
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pushl $0 /* dummy unit to finish building intr frame */
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incl _cnt+V_TRAP
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orl $SWI_AST_MASK,%eax
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movl %eax,_cpl
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call _npxintr
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incb _intr_nesting_level
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MEXITCOUNT
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jmp _doreti
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#else /* NNPX > 0 */
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pushl $0; TRAP(T_ARITHTRAP)
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#endif /* NNPX > 0 */
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IDTVEC(align)
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TRAP(T_ALIGNFLT)
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SUPERALIGN_TEXT
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.globl _alltraps
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_alltraps:
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pushal
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pushl %ds
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pushl %es
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alltraps_with_regs_pushed:
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movl $KDSEL,%eax
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movl %ax,%ds
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movl %ax,%es
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FAKE_MCOUNT(12*4(%esp))
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calltrap:
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FAKE_MCOUNT(_btrap) /* init "from" _btrap -> calltrap */
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incl _cnt+V_TRAP
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orl $SWI_AST_MASK,_cpl
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call _trap
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/*
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* There was no place to save the cpl so we have to recover it
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* indirectly. For traps from user mode it was 0, and for traps
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* from kernel mode Oring SWI_AST_MASK into it didn't change it.
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*/
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subl %eax,%eax
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testb $SEL_RPL_MASK,TRAPF_CS_OFF(%esp)
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jne 1f
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movl _cpl,%eax
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1:
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/*
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* Return via _doreti to handle ASTs. Have to change trap frame
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* to interrupt frame.
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*/
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pushl %eax
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subl $4,%esp
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incb _intr_nesting_level
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MEXITCOUNT
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jmp _doreti
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/*
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* Call gate entry for syscall.
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* The intersegment call has been set up to specify one dummy parameter.
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* This leaves a place to put eflags so that the call frame can be
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* converted to a trap frame. Note that the eflags is (semi-)bogusly
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* pushed into (what will be) tf_err and then copied later into the
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* final spot. It has to be done this way because esp can't be just
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* temporarily altered for the pushfl - an interrupt might come in
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* and clobber the saved cs/eip.
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*/
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SUPERALIGN_TEXT
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IDTVEC(syscall)
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pushfl /* save eflags in tf_err for now */
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subl $4,%esp /* skip over tf_trapno */
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pushal
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pushl %ds
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pushl %es
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movl $KDSEL,%eax /* switch to kernel segments */
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movl %ax,%ds
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movl %ax,%es
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movl TF_ERR(%esp),%eax /* copy saved eflags to final spot */
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movl %eax,TF_EFLAGS(%esp)
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movl $7,TF_ERR(%esp) /* sizeof "lcall 7,0" */
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FAKE_MCOUNT(12*4(%esp))
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incl _cnt+V_SYSCALL
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movl $SWI_AST_MASK,_cpl
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call _syscall
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/*
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* Return via _doreti to handle ASTs.
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*/
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pushl $0 /* cpl to restore */
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subl $4,%esp
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movb $1,_intr_nesting_level
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MEXITCOUNT
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jmp _doreti
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/*
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* Call gate entry for Linux/NetBSD syscall (int 0x80)
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*/
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SUPERALIGN_TEXT
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IDTVEC(int0x80_syscall)
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subl $8,%esp /* skip over tf_trapno and tf_err */
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pushal
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pushl %ds
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pushl %es
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movl $KDSEL,%eax /* switch to kernel segments */
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movl %ax,%ds
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movl %ax,%es
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movl $2,TF_ERR(%esp) /* sizeof "int 0x80" */
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FAKE_MCOUNT(12*4(%esp))
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incl _cnt+V_SYSCALL
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movl $SWI_AST_MASK,_cpl
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call _syscall
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/*
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* Return via _doreti to handle ASTs.
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*/
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pushl $0 /* cpl to restore */
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subl $4,%esp
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movb $1,_intr_nesting_level
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MEXITCOUNT
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jmp _doreti
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/*
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* Include what was once config+isa-dependent code.
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* XXX it should be in a stand-alone file. It's still icu-dependent and
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* belongs in i386/isa.
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*/
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#ifdef PC98
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#include "pc98/pc98/vector.s"
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#else
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#include "i386/isa/vector.s"
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#endif
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/*
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* Include what was once icu-dependent code.
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* XXX it should be merged into this file (also move the definition of
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* imen to vector.s or isa.c).
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* Before including it, set up a normal asm environment so that vector.s
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* doesn't have to know that stuff is included after it.
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*/
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.data
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ALIGN_DATA
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.text
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SUPERALIGN_TEXT
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#ifdef PC98
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#include "pc98/pc98/icu.s"
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#else
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#include "i386/isa/icu.s"
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#endif
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