04b6fa8330
facilities as well as support for the Octeon 2 family of SoCs.
XXX Note that with our antediluvian assembler, we can't support some Octeon 2
instructions and fall back to using the old ones instead.
179 lines
5.7 KiB
ArmAsm
179 lines
5.7 KiB
ArmAsm
/***********************license start***************
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* Copyright (c) 2003-2010 Cavium Networks (support@cavium.com). All rights
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* reserved.
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*
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met:
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*
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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*
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* * Redistributions in binary form must reproduce the above
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* copyright notice, this list of conditions and the following
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* disclaimer in the documentation and/or other materials provided
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* with the distribution.
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* * Neither the name of Cavium Networks nor the names of
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* its contributors may be used to endorse or promote products
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* derived from this software without specific prior written
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* permission.
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* This Software, including technical data, may be subject to U.S. export control
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* laws, including the U.S. Export Administration Act and its associated
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* regulations, and may be subject to export or import regulations in other
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* countries.
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* TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS"
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* AND WITH ALL FAULTS AND CAVIUM NETWORKS MAKES NO PROMISES, REPRESENTATIONS OR
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* WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH RESPECT TO
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* THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY REPRESENTATION OR
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* DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT DEFECTS, AND CAVIUM
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* SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES OF TITLE,
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* MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR PURPOSE, LACK OF
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* VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET POSSESSION OR
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* CORRESPONDENCE TO DESCRIPTION. THE ENTIRE RISK ARISING OUT OF USE OR
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* PERFORMANCE OF THE SOFTWARE LIES WITH YOU.
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***********************license end**************************************/
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//
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// The function defined here is called for every function as it is executed.
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// These calls are automatically inserted by GCC when the switch "-pg" is
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// used. This allows cvmx-log to add a PC entry as each function is executed.
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// This information, along with the timestamps can give the user a good idea
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// of the performance characteristics of their program. This function normally
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// takes about 22 cycles to execute.
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//
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#ifdef __linux__
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#include <asm/asm.h>
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#include <asm/regdef.h>
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#define LA dla
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#else
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#include <machine/asm.h>
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#include <machine/regdef.h>
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#define LA la
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#endif
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.set noreorder
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.set noat
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LEAF(_mcount)
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//
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// All registers we use must be saved since calls are added by gcc
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// after register allocation. The at register ($3) will contain the
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// original ra register before the _mcount call. Also the compiler
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// automatically performs a "dsubu sp, sp, 16" before we're called.
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// At the end of this function all registers must have their original
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// values and the stack pointr must be adjusted by 16. This code is
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// pretty unreadable since it has been arranged to promote dual issue.
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//
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#ifdef __linux__
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dsubu sp, sp, 32
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#else
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dsubu sp, sp, 16
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#endif
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sd s3, 24(sp) // Save register
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rdhwr s3, $31 // Read the cycle count
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sd s0, 0(sp) // Save register
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LA s0, cvmx_log_buffer_end_ptr // Load the address of the end of the log buffer
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sd s1, 8(sp) // Save register
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LA s1, cvmx_log_buffer_write_ptr // Load the address of the location in the log buffer
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sd s2, 16(sp) // Save register
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ld s0, 0(s0) // Get value of the current log buffer end location
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ld s2, 0(s1) // Get value of the current log buffer location
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dsubu s0, s0, s2 // Subtract the end pointer and the write pointer
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sltiu s0, s0, 16 // Check if there are at least 16 bytes
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bne s0, $0, call_c_pc // Call the slow C function if we don't have room in the log
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li s0, 0x001 // 11 bit constant that matches the first 11 bits of a CVMX_LOG_TYPE_PC header
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sd ra, 8(s2) // Write the pc to the log
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dins s3, s0, 53, 11 // Overwrite the upper cycle count bits with the CVMX_LOG_TYPE_PC header
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sd s3, 0(s2) // Write the log header
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daddu s2, s2, 16 // Increment the write location ptr
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sd s2, 0(s1) // Store the write location ptr
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return_c_pc:
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ld s0, 0(sp) // Restore register
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ld s1, 8(sp) // Restore register
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ld s2, 16(sp) // Restore register
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ld s3, 24(sp) // Restore register
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daddu sp, sp, 32 // Pop everything off the stack, even the 16 bytes done by gcc
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jr ra // Return to the caller and
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or ra, $1, $1 // make sure the ra is back to its original value
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call_c_pc:
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// The registers used by the C code may change based on optimizations. To be
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// safe, I'll save all registers. We're in the slow path case anyway.
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dsubu sp, sp, 216
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sd $1, 0(sp)
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sd $2, 8(sp)
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sd $3, 16(sp)
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sd $4, 24(sp)
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sd $5, 32(sp)
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sd $6, 40(sp)
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sd $7, 48(sp)
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sd $8, 56(sp)
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sd $9, 64(sp)
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sd $10, 72(sp)
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sd $11, 80(sp)
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sd $12, 88(sp)
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sd $13, 96(sp)
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sd $14, 104(sp)
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sd $15, 112(sp)
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// s0, s1, s2, s3 are already saved
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sd $20, 120(sp)
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sd $21, 128(sp)
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sd $22, 136(sp)
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sd $23, 144(sp)
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sd $24, 152(sp)
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sd $25, 160(sp)
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sd $26, 168(sp)
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sd $27, 176(sp)
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sd $28, 184(sp)
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sd $29, 192(sp)
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sd $30, 200(sp)
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sd $31, 208(sp)
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or a0, ra, ra
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jal cvmx_log_pc
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nop
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ld $1, 0(sp)
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ld $2, 8(sp)
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ld $3, 16(sp)
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ld $4, 24(sp)
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ld $5, 32(sp)
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ld $6, 40(sp)
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ld $7, 48(sp)
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ld $8, 56(sp)
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ld $9, 64(sp)
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ld $10, 72(sp)
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ld $11, 80(sp)
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ld $12, 88(sp)
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ld $13, 96(sp)
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ld $14, 104(sp)
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ld $15, 112(sp)
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// s0, s1, s2, s3 will be restored later
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ld $20, 120(sp)
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ld $21, 128(sp)
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ld $22, 136(sp)
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ld $23, 144(sp)
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ld $24, 152(sp)
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ld $25, 160(sp)
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ld $26, 168(sp)
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ld $27, 176(sp)
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ld $28, 184(sp)
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ld $29, 192(sp)
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ld $30, 200(sp)
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ld $31, 208(sp)
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b return_c_pc
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daddu sp, sp, 216
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END(_mcount)
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