738 lines
20 KiB
C
738 lines
20 KiB
C
/*
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* Copyright (c) 1999 Cameron Grant <gandalf@vilnya.demon.co.uk>
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* Portions Copyright by Luigi Rizzo - 1997-99
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#include <dev/pcm/sound.h>
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#define MIN_CHUNK_SIZE 256 /* for uiomove etc. */
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#define DMA_ALIGN_THRESHOLD 4
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#define DMA_ALIGN_MASK (~(DMA_ALIGN_THRESHOLD - 1))
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#define ISA_DMA(b) (((b)->chan >= 0 && (b)->chan != 4 && (b)->chan < 8))
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#define CANCHANGE(c) (!(c)->buffer.dl)
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static int chn_reinit(pcm_channel *c);
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static void chn_stintr(pcm_channel *c);
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/*
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* SOUND OUTPUT
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We use a circular buffer to store samples directed to the DAC.
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The buffer is split into two variable-size regions, each identified
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by an offset in the buffer (rp,fp) and a length (rl,fl):
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0 rp,rl fp,fl bufsize
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|__________>____________>________|
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FREE d READY w FREE
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READY: data written from the process and ready to be sent to the DAC;
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FREE: free part of the buffer.
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Both regions can wrap around the end of the buffer. At initialization,
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READY is empty, FREE takes all the available space, and dma is
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idle. dl contains the length of the current DMA transfer, dl=0
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means that the dma is idle.
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The two boundaries (rp,fp) in the buffers are advanced by DMA [d]
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and write() [w] operations. The first portion of the READY region
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is used for DMA transfers. The transfer is started at rp and with
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chunks of length dl. During DMA operations, dsp_wr_dmaupdate()
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updates rp, rl and fl tracking the ISA DMA engine as the transfer
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makes progress.
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When a new block is written, fp advances and rl,fl are updated
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accordingly.
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The code works as follows: the user write routine dsp_write_body()
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fills up the READY region with new data (reclaiming space from the
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FREE region) and starts the write DMA engine if inactive. When a
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DMA transfer is complete, an interrupt causes dsp_wrintr() to be
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called which extends the FREE region and possibly starts the next
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transfer.
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In some cases, the code tries to track the current status of DMA
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operations by calling dsp_wr_dmaupdate() which changes rp, rl and fl.
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The sistem tries to make all DMA transfers use the same size,
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play_blocksize or rec_blocksize. The size is either selected by
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the user, or computed by the system to correspond to about .25s of
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audio. The blocksize must be within a range which is currently:
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min(5ms, 40 bytes) ... 1/2 buffer size.
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When there aren't enough data (write) or space (read), a transfer
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is started with a reduced size.
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To reduce problems in case of overruns, the routine which fills up
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the buffer should initialize (e.g. by repeating the last value) a
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reasonably long area after the last block so that no noise is
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produced on overruns.
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*
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*/
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/* XXX this is broken: in the event a bounce buffer is used, data never
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* gets copied in or out of the real buffer. fix requires mods to isa_dma.c
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* and possibly fixes to other autodma mode clients
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*/
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static void
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chn_isadmabounce(pcm_channel *c)
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{
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if (ISA_DMA(&c->buffer)) {
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/* tell isa_dma to bounce data in/out */
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} else panic("chn_isadmabounce called on invalid channel");
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}
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static int
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chn_polltrigger(pcm_channel *c)
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{
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snd_dbuf *b = &c->buffer;
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unsigned lim = (c->flags & CHN_F_HAS_SIZE)? c->blocksize : 1;
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int trig = 0;
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if (c->flags & CHN_F_MAPPED)
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trig = ((b->int_count > b->prev_int_count) || b->first_poll);
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else trig = (((c->direction == PCMDIR_PLAY)? b->fl : b->rl) >= lim);
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return trig;
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}
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static int
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chn_pollreset(pcm_channel *c)
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{
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snd_dbuf *b = &c->buffer;
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if (c->flags & CHN_F_MAPPED) b->prev_int_count = b->int_count;
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b->first_poll = 0;
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return 1;
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}
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/*
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* chn_dmadone() updates pointers and wakes up any process sleeping
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* or waiting on a select().
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* Must be called at spltty().
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*/
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static void
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chn_dmadone(pcm_channel *c)
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{
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snd_dbuf *b = &c->buffer;
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chn_dmaupdate(c);
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if (ISA_DMA(b)) chn_isadmabounce(c); /* sync bounce buffer */
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wakeup(b);
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b->int_count++;
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if (b->sel.si_pid && chn_polltrigger(c)) selwakeup(&b->sel);
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}
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/*
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* chn_dmaupdate() tracks the status of a dma transfer,
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* updating pointers. It must be called at spltty().
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*
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* NOTE: when we are using auto dma in the device, rl might become
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* negative.
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*/
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void
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chn_dmaupdate(pcm_channel *c)
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{
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snd_dbuf *b = &c->buffer;
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int delta, hwptr = chn_getptr(c);
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if (c->direction == PCMDIR_PLAY) {
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delta = (b->bufsize + hwptr - b->rp) % b->bufsize;
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b->rp = hwptr;
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b->rl -= delta;
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b->fl += delta;
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} else {
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delta = (b->bufsize + hwptr - b->fp) % b->bufsize;
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b->fp = hwptr;
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b->rl += delta;
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b->fl -= delta;
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}
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b->total += delta;
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}
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/*
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* Write interrupt routine. Can be called from other places (e.g.
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* to start a paused transfer), but with interrupts disabled.
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*/
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static void
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chn_wrintr(pcm_channel *c)
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{
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snd_dbuf *b = &c->buffer;
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int start;
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if (b->dl) chn_dmadone(c);
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/*
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* start another dma operation only if have ready data in the buffer,
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* there is no pending abort, have a full-duplex device, or have a
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* half duplex device and there is no pending op on the other side.
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*
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* Force transfers to be aligned to a boundary of 4, which is
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* needed when doing stereo and 16-bit.
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*/
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if (c->flags & CHN_F_MAPPED) start = c->flags & CHN_F_TRIGGERED;
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else start = (b->rl >= DMA_ALIGN_THRESHOLD && !(c->flags & CHN_F_ABORTING));
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if (start) {
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int l;
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chn_dmaupdate(c);
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l = min(b->rl, c->blocksize) & DMA_ALIGN_MASK;
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if (c->flags & CHN_F_MAPPED) l = c->blocksize;
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/*
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* check if we need to reprogram the DMA on the sound card.
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* This happens if the size has changed _and_ the new size
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* is smaller, or it matches the blocksize.
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*
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* 0 <= l <= blocksize
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* 0 <= dl <= blocksize
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* reprog if (dl == 0 || l != dl)
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* was:
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* l != b->dl && (b->dl == 0 || l < b->dl || l == c->blocksize)
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*/
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if (b->dl == 0 || l != b->dl) {
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/* size has changed. Stop and restart */
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DEB(printf("wrintr: bsz %d -> %d, rp %d rl %d\n",
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b->dl, l, b->rp, b->rl));
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if (b->dl) chn_trigger(c, PCMTRIG_STOP);
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b->dl = l; /* record new transfer size */
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chn_trigger(c, PCMTRIG_START);
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}
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} else {
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/* cannot start a new dma transfer */
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DEB(printf("cannot start wr-dma flags 0x%08x rp %d rl %d\n",
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c->flags, b->rp, b->rl));
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if (b->dl) { /* was active */
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b->dl = 0;
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chn_trigger(c, PCMTRIG_STOP);
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#if 0
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if (c->flags & CHN_F_WRITING)
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DEB(printf("got wrint while reloading\n"));
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else if (b->rl <= 0) /* XXX added 980110 lr */
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chn_resetbuf(c);
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#endif
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}
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}
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}
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/*
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* user write routine
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*
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* advance the boundary between READY and FREE, fill the space with
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* uiomove(), and possibly start DMA. Do the above until the transfer
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* is complete.
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*
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* To minimize latency in case a pending DMA transfer is about to end,
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* we do the transfer in pieces of increasing sizes, extending the
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* READY area at every checkpoint. In the (necessary) assumption that
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* memory bandwidth is larger than the rate at which the dma consumes
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* data, we reduce the latency to something proportional to the length
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* of the first piece, while keeping the overhead low and being able
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* to feed the DMA with large blocks.
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*/
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int
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chn_write(pcm_channel *c, struct uio *buf)
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{
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int l, w, timeout, ret = 0;
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long s;
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snd_dbuf *b = &c->buffer;
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if (c->flags & CHN_F_WRITING) {
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/* This shouldn't happen and is actually silly
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* - will never wake up, just timeout; why not sleep on b?
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*/
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tsleep(&s, PZERO, "pcmwrW", hz);
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return EBUSY;
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}
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c->flags |= CHN_F_WRITING;
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while (buf->uio_resid >= DMA_ALIGN_THRESHOLD) {
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s = spltty();
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chn_dmaupdate(c);
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splx(s);
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if (b->fl < DMA_ALIGN_THRESHOLD) {
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if (c->flags & CHN_F_NBIO) break;
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timeout = (buf->uio_resid >= b->dl)? hz : 1;
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ret = tsleep(b, PRIBIO | PCATCH, "pcmwr", timeout);
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if (ret == EINTR) chn_abort(c);
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if (ret == EINTR || ret == ERESTART) break;
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ret = 0;
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continue;
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}
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/* ensure we always have a whole number of samples */
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l = min(b->fl, b->bufsize - b->fp) & DMA_ALIGN_MASK;
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w = c->feeder->feed(c->feeder, b->buf + b->fp, l, buf);
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s = spltty();
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b->rl += w;
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b->fl -= w;
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b->fp = (b->fp + w) % b->bufsize;
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splx(s);
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if (b->rl && !b->dl) chn_stintr(c);
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}
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c->flags &= ~CHN_F_WRITING;
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return ret;
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}
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/*
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* SOUND INPUT
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*
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The input part is similar to the output one, with a circular buffer
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split in two regions, and boundaries advancing because of read() calls
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[r] or dma operation [d]. At initialization, as for the write
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routine, READY is empty, and FREE takes all the space.
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0 rp,rl fp,fl bufsize
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|__________>____________>________|
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FREE r READY d FREE
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Operation is as follows: upon user read (dsp_read_body()) a DMA read
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is started if not already active (marked by b->dl > 0),
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then as soon as data are available in the READY region they are
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transferred to the user buffer, thus advancing the boundary between FREE
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and READY. Upon interrupts, caused by a completion of a DMA transfer,
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the READY region is extended and possibly a new transfer is started.
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When necessary, dsp_rd_dmaupdate() is called to advance fp (and update
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rl,fl accordingly). Upon user reads, rp is advanced and rl,fl are
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updated accordingly.
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The rules to choose the size of the new DMA area are similar to
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the other case, with a preferred constant transfer size equal to
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rec_blocksize, and fallback to smaller sizes if no space is available.
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*/
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/* read interrupt routine. Must be called with interrupts blocked. */
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static void
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chn_rdintr(pcm_channel *c)
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{
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snd_dbuf *b = &c->buffer;
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int start;
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if (b->dl) chn_dmadone(c);
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DEB(printf("rdintr: start dl %d, rp:rl %d:%d, fp:fl %d:%d\n",
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b->dl, b->rp, b->rl, b->fp, b->fl));
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/* Restart if have enough free space to absorb overruns */
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if (c->flags & CHN_F_MAPPED) start = c->flags & CHN_F_TRIGGERED;
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else start = (b->fl > 0x200 && !(c->flags & CHN_F_ABORTING));
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if (start) {
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int l = min(b->fl - 0x100, c->blocksize);
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if (c->flags & CHN_F_MAPPED) l = c->blocksize;
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l &= DMA_ALIGN_MASK ; /* realign sizes */
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DEB(printf("rdintr: dl %d -> %d\n", b->dl, l);)
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if (l != b->dl) {
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/* size has changed. Stop and restart */
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if (b->dl) {
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chn_trigger(c, PCMTRIG_STOP);
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chn_dmaupdate(c);
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l = min(b->fl - 0x100, c->blocksize);
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l &= DMA_ALIGN_MASK ; /* realign sizes */
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}
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b->dl = l;
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chn_trigger(c, PCMTRIG_START);
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}
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} else {
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if (b->dl) { /* was active */
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b->dl = 0;
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chn_dmaupdate(c);
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chn_trigger(c, PCMTRIG_STOP);
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}
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}
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}
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/*
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* body of user-read routine
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*
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* Start DMA if not active; wait for READY not empty.
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* Transfer data from READY region using uiomove(), advance boundary
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* between FREE and READY. Repeat until transfer is complete.
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*
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* To avoid excessive latency in freeing up space for the DMA
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* engine, transfers are done in blocks of increasing size, so that
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* the latency is proportional to the size of the smallest block, but
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* we have a low overhead and are able to feed the dma engine with
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* large blocks.
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*
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* NOTE: in the current version, read will not return more than
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* blocksize bytes at once (unless more are already available), to
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* avoid that requests using very large buffers block for too long.
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*/
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int
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chn_read(pcm_channel *c, struct uio *buf)
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{
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int w, l, timeout, limit, ret = 0;
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long s;
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snd_dbuf *b = &c->buffer;
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if (c->flags & CHN_F_READING) {
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/* This shouldn't happen and is actually silly */
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tsleep(&s, PZERO, "pcmrdR", hz);
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return (EBUSY);
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}
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if (!b->rl & !b->dl) chn_stintr(c);
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c->flags |= CHN_F_READING;
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limit = buf->uio_resid - c->blocksize;
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if (limit < 0) limit = 0;
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while (buf->uio_resid > limit) {
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s = spltty();
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chn_dmaupdate(c);
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splx(s);
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if (b->rl < DMA_ALIGN_THRESHOLD) {
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if (c->flags & CHN_F_NBIO) break;
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timeout = (buf->uio_resid - limit >= b->dl)? hz : 1;
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ret = tsleep(b, PRIBIO | PCATCH, "pcmrd", timeout);
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if (ret == EINTR) chn_abort(c);
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if (ret == EINTR || ret == ERESTART) break;
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ret = 0;
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continue;
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}
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/* ensure we always have a whole number of samples */
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l = min(b->rl, b->bufsize - b->rp) & DMA_ALIGN_MASK;
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w = c->feeder->feed(c->feeder, b->buf + b->rp, l, buf);
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s = spltty();
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b->rl -= w;
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b->fl += w;
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b->rp = (b->rp + w) % b->bufsize;
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splx(s);
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}
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c->flags &= ~CHN_F_READING;
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return ret;
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}
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void
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chn_intr(pcm_channel *c)
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{
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if (!c->buffer.dl) chn_reinit(c);
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if (c->direction == PCMDIR_PLAY) chn_wrintr(c); else chn_rdintr(c);
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}
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static void
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chn_stintr(pcm_channel *c)
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{
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u_long s;
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s = spltty();
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chn_intr(c);
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splx(s);
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}
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static void
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chn_dma_setmap(void *arg, bus_dma_segment_t *segs, int nseg, int error)
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{
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snd_dbuf *b = (snd_dbuf *)arg;
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if (bootverbose) {
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printf("pcm: setmap %lx, %lx; ", (unsigned long)segs->ds_addr,
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(unsigned long)segs->ds_len);
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printf("%p -> %lx\n", b->buf, (unsigned long)vtophys(b->buf));
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}
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}
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int
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chn_allocbuf(snd_dbuf *b, bus_dma_tag_t parent_dmat)
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{
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if (bus_dmamem_alloc(parent_dmat, (void **)&b->buf,
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BUS_DMA_NOWAIT, &b->dmamap)) return -1;
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if (bus_dmamap_load(parent_dmat, b->dmamap, b->buf,
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b->bufsize, chn_dma_setmap, b, 0)) return -1;
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return 0;
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}
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|
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void
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chn_resetbuf(pcm_channel *c)
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{
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snd_dbuf *b = &c->buffer;
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u_int16_t data, *p;
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u_int32_t i;
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c->buffer.sample_size = 1;
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c->buffer.sample_size <<= (c->hwfmt & AFMT_STEREO)? 1 : 0;
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c->buffer.sample_size <<= (c->hwfmt & AFMT_16BIT)? 1 : 0;
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/* rely on bufsize & 3 == 0 */
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if (c->hwfmt & AFMT_SIGNED) data = 0x00; else data = 0x80;
|
|
if (c->hwfmt & AFMT_16BIT) data <<= 8; else data |= data << 8;
|
|
if (c->hwfmt & AFMT_BIGENDIAN)
|
|
data = ((data >> 8) & 0x00ff) | ((data << 8) & 0xff00);
|
|
for (i = 0, p = (u_int16_t *)b->buf; i < b->bufsize; i += 2)
|
|
*p++ = data;
|
|
b->rp = b->fp = 0;
|
|
b->dl = b->rl = 0;
|
|
b->prev_total = b->total = 0;
|
|
b->prev_int_count = b->int_count = 0;
|
|
b->first_poll = 1;
|
|
b->fl = b->bufsize;
|
|
}
|
|
|
|
void
|
|
buf_isadma(snd_dbuf *b, int go)
|
|
{
|
|
if (ISA_DMA(b)) {
|
|
if (go == PCMTRIG_START) isa_dmastart(b->dir | B_RAW, b->buf,
|
|
b->bufsize, b->chan);
|
|
else {
|
|
isa_dmastop(b->chan);
|
|
isa_dmadone(b->dir | B_RAW, b->buf, b->bufsize,
|
|
b->chan);
|
|
}
|
|
} else panic("buf_isadma called on invalid channel");
|
|
}
|
|
|
|
int
|
|
buf_isadmaptr(snd_dbuf *b)
|
|
{
|
|
if (ISA_DMA(b)) {
|
|
int i = b->dl? isa_dmastatus(b->chan) : b->bufsize;
|
|
if (i < 0) i = 0;
|
|
return b->bufsize - i;
|
|
} else panic("buf_isadmaptr called on invalid channel");
|
|
return -1;
|
|
}
|
|
|
|
/*
|
|
* snd_sync waits until the space in the given channel goes above
|
|
* a threshold. The threshold is checked against fl or rl respectively.
|
|
* Assume that the condition can become true, do not check here...
|
|
*/
|
|
int
|
|
chn_sync(pcm_channel *c, int threshold)
|
|
{
|
|
u_long s, rdy;
|
|
int ret;
|
|
snd_dbuf *b = &c->buffer;
|
|
|
|
for (;;) {
|
|
s = spltty();
|
|
chn_dmaupdate(c);
|
|
rdy = (c->direction == PCMDIR_PLAY)? b->fl : b->rl;
|
|
if (rdy <= threshold) {
|
|
ret = tsleep((caddr_t)b, PRIBIO | PCATCH, "pcmsyn", 1);
|
|
splx(s);
|
|
if (ret == ERESTART || ret == EINTR) {
|
|
printf("tsleep returns %d\n", ret);
|
|
return -1;
|
|
}
|
|
} else break;
|
|
}
|
|
splx(s);
|
|
return 0;
|
|
}
|
|
|
|
int
|
|
chn_poll(pcm_channel *c, int ev, struct proc *p)
|
|
{
|
|
snd_dbuf *b = &c->buffer;
|
|
u_long s = spltty();
|
|
if (b->dl) chn_dmaupdate(c);
|
|
splx(s);
|
|
if (chn_polltrigger(c) && chn_pollreset(c)) return ev;
|
|
else {
|
|
selrecord(p, &b->sel);
|
|
return 0;
|
|
}
|
|
}
|
|
|
|
/*
|
|
* chn_abort is a non-blocking function which aborts a pending
|
|
* DMA transfer and flushes the buffers.
|
|
* It returns the number of bytes that have not been transferred.
|
|
*/
|
|
int
|
|
chn_abort(pcm_channel *c)
|
|
{
|
|
long s;
|
|
int missing = 0;
|
|
snd_dbuf *b = &c->buffer;
|
|
|
|
s = spltty();
|
|
if (b->dl) {
|
|
b->dl = 0;
|
|
c->flags &= ~((c->direction == PCMDIR_PLAY)? CHN_F_WRITING : CHN_F_READING);
|
|
chn_trigger(c, PCMTRIG_ABORT);
|
|
chn_dmadone(c);
|
|
}
|
|
missing = b->rl;
|
|
splx(s);
|
|
return missing;
|
|
}
|
|
|
|
/*
|
|
* this routine tries to flush the dma transfer. It is called
|
|
* on a close. We immediately abort any read DMA
|
|
* operation, and then wait for the play buffer to drain.
|
|
*/
|
|
|
|
int
|
|
chn_flush(pcm_channel *c)
|
|
{
|
|
int ret, count = 10;
|
|
snd_dbuf *b = &c->buffer;
|
|
|
|
DEB(printf("snd_flush c->flags 0x%08x\n", c->flags));
|
|
c->flags |= CHN_F_CLOSING;
|
|
if (c->direction != PCMDIR_PLAY) chn_abort(c);
|
|
else while (b->dl) {
|
|
/* still pending output data. */
|
|
ret = tsleep((caddr_t)b, PRIBIO | PCATCH, "pcmflu", hz);
|
|
chn_dmaupdate(c);
|
|
DEB(printf("snd_sync: now rl : fl %d : %d\n", b->rl, b->fl));
|
|
if (ret == EINTR) {
|
|
printf("tsleep returns %d\n", ret);
|
|
return -1;
|
|
}
|
|
if (ret && --count == 0) {
|
|
printf("timeout flushing dbuf_out, cnt 0x%x flags 0x%x\n",
|
|
b->rl, c->flags);
|
|
break;
|
|
}
|
|
}
|
|
c->flags &= ~CHN_F_CLOSING;
|
|
if (c->direction == PCMDIR_PLAY) chn_abort(c);
|
|
return 0;
|
|
}
|
|
|
|
int
|
|
chn_reset(pcm_channel *c)
|
|
{
|
|
chn_abort(c);
|
|
c->flags &= CHN_F_RESET;
|
|
chn_resetbuf(c);
|
|
c->flags |= CHN_F_INIT;
|
|
return 0;
|
|
}
|
|
|
|
static int
|
|
chn_reinit(pcm_channel *c)
|
|
{
|
|
if ((c->flags & CHN_F_INIT) && CANCHANGE(c)) {
|
|
chn_setformat(c, c->format);
|
|
chn_setspeed(c, c->speed);
|
|
chn_setblocksize(c, c->blocksize);
|
|
chn_setvolume(c, (c->volume >> 8) & 0xff, c->volume & 0xff);
|
|
c->flags &= ~CHN_F_INIT;
|
|
return 1;
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
int
|
|
chn_init(pcm_channel *c, void *devinfo, int dir)
|
|
{
|
|
c->flags = 0;
|
|
c->feeder = &feeder_root;
|
|
c->buffer.chan = -1;
|
|
c->devinfo = c->init(devinfo, &c->buffer, c, dir);
|
|
chn_setdir(c, dir);
|
|
return 0;
|
|
}
|
|
|
|
int
|
|
chn_setdir(pcm_channel *c, int dir)
|
|
{
|
|
c->direction = dir;
|
|
if (ISA_DMA(&c->buffer))
|
|
c->buffer.dir = (dir == PCMDIR_PLAY)? B_WRITE : B_READ;
|
|
return c->setdir(c->devinfo, c->direction);
|
|
}
|
|
|
|
int
|
|
chn_setvolume(pcm_channel *c, int left, int right)
|
|
{
|
|
/* could add a feeder for volume changing if channel returns -1 */
|
|
if (CANCHANGE(c)) {
|
|
return -1;
|
|
}
|
|
c->volume = (left << 8) | right;
|
|
c->flags |= CHN_F_INIT;
|
|
return 0;
|
|
}
|
|
|
|
int
|
|
chn_setspeed(pcm_channel *c, int speed)
|
|
{
|
|
/* could add a feeder for rate conversion */
|
|
if (CANCHANGE(c)) {
|
|
c->speed = c->setspeed(c->devinfo, speed);
|
|
return c->speed;
|
|
}
|
|
c->speed = speed;
|
|
c->flags |= CHN_F_INIT;
|
|
return 0;
|
|
}
|
|
|
|
int
|
|
chn_setformat(pcm_channel *c, u_int32_t fmt)
|
|
{
|
|
if (CANCHANGE(c)) {
|
|
c->hwfmt = c->format = fmt;
|
|
c->hwfmt = chn_feedchain(c);
|
|
chn_resetbuf(c);
|
|
c->setformat(c->devinfo, c->hwfmt);
|
|
return fmt;
|
|
}
|
|
c->format = fmt;
|
|
c->flags |= CHN_F_INIT;
|
|
return 0;
|
|
}
|
|
|
|
int
|
|
chn_setblocksize(pcm_channel *c, int blksz)
|
|
{
|
|
if (CANCHANGE(c)) {
|
|
c->flags &= ~CHN_F_HAS_SIZE;
|
|
if (blksz >= 2) c->flags |= CHN_F_HAS_SIZE;
|
|
blksz = abs(blksz);
|
|
if (blksz < 2) blksz = (c->buffer.sample_size * c->speed) >> 2;
|
|
RANGE(blksz, 1024, c->buffer.bufsize / 4);
|
|
blksz &= ~3;
|
|
c->blocksize = c->setblocksize(c->devinfo, blksz);
|
|
return c->blocksize;
|
|
}
|
|
c->blocksize = blksz;
|
|
c->flags |= CHN_F_INIT;
|
|
return 0;
|
|
}
|
|
|
|
int
|
|
chn_trigger(pcm_channel *c, int go)
|
|
{
|
|
return c->trigger(c->devinfo, go);
|
|
}
|
|
|
|
int
|
|
chn_getptr(pcm_channel *c)
|
|
{
|
|
return c->getptr(c->devinfo);
|
|
}
|
|
|
|
pcmchan_caps *
|
|
chn_getcaps(pcm_channel *c)
|
|
{
|
|
return c->getcaps(c->devinfo);
|
|
}
|