129dec4245
as they support Intel Core/Core 2 and VIA Nano processors. - Align "optional agp" in conf/files.* for consistency while I am here.
437 lines
12 KiB
C
437 lines
12 KiB
C
/*-
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* Copyright (c) 2000 Doug Rabson
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include "opt_bus.h"
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/malloc.h>
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#include <sys/kernel.h>
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#include <sys/module.h>
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#include <sys/bus.h>
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#include <sys/lock.h>
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#include <sys/mutex.h>
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#include <sys/proc.h>
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#include <dev/agp/agppriv.h>
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#include <dev/agp/agpreg.h>
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#include <dev/pci/pcivar.h>
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#include <dev/pci/pcireg.h>
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#include <vm/vm.h>
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#include <vm/vm_object.h>
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#include <vm/pmap.h>
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#define REG_GARTCTRL 0
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#define REG_APSIZE 1
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#define REG_ATTBASE 2
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struct agp_via_softc {
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struct agp_softc agp;
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u_int32_t initial_aperture; /* aperture size at startup */
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struct agp_gatt *gatt;
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int *regs;
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};
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static int via_v2_regs[] = { AGP_VIA_GARTCTRL, AGP_VIA_APSIZE,
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AGP_VIA_ATTBASE };
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static int via_v3_regs[] = { AGP3_VIA_GARTCTRL, AGP3_VIA_APSIZE,
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AGP3_VIA_ATTBASE };
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static const char*
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agp_via_match(device_t dev)
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{
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if (pci_get_class(dev) != PCIC_BRIDGE
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|| pci_get_subclass(dev) != PCIS_BRIDGE_HOST)
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return NULL;
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if (agp_find_caps(dev) == 0)
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return NULL;
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switch (pci_get_devid(dev)) {
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case 0x01981106:
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return ("VIA 8763 (P4X600) host to PCI bridge");
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case 0x02591106:
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return ("VIA PM800/PN800/PM880/PN880 host to PCI bridge");
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case 0x02691106:
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return ("VIA KT880 host to PCI bridge");
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case 0x02961106:
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return ("VIA 3296 (P4M800) host to PCI bridge");
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case 0x03051106:
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return ("VIA 82C8363 (Apollo KT133x/KM133) host to PCI bridge");
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case 0x03141106:
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return ("VIA 3314 (P4M800CE) host to PCI bridge");
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case 0x03241106:
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return ("VIA VT3324 (CX700) host to PCI bridge");
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case 0x03271106:
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return ("VIA 3327 (P4M890) host to PCI bridge");
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case 0x03641106:
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return ("VIA 3364 (P4M900) host to PCI bridge");
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case 0x03911106:
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return ("VIA 8371 (Apollo KX133) host to PCI bridge");
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case 0x05011106:
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return ("VIA 8501 (Apollo MVP4) host to PCI bridge");
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case 0x05971106:
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return ("VIA 82C597 (Apollo VP3) host to PCI bridge");
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case 0x05981106:
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return ("VIA 82C598 (Apollo MVP3) host to PCI bridge");
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case 0x06011106:
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return ("VIA 8601 (Apollo ProMedia/PLE133Ta) host to PCI bridge");
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case 0x06051106:
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return ("VIA 82C694X (Apollo Pro 133A) host to PCI bridge");
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case 0x06911106:
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return ("VIA 82C691 (Apollo Pro) host to PCI bridge");
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case 0x30911106:
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return ("VIA 8633 (Pro 266) host to PCI bridge");
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case 0x30991106:
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return ("VIA 8367 (KT266/KY266x/KT333) host to PCI bridge");
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case 0x31011106:
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return ("VIA 8653 (Pro266T) host to PCI bridge");
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case 0x31121106:
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return ("VIA 8361 (KLE133) host to PCI bridge");
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case 0x31161106:
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return ("VIA XM266 (PM266/KM266) host to PCI bridge");
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case 0x31231106:
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return ("VIA 862x (CLE266) host to PCI bridge");
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case 0x31281106:
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return ("VIA 8753 (P4X266) host to PCI bridge");
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case 0x31481106:
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return ("VIA 8703 (P4M266x/P4N266) host to PCI bridge");
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case 0x31561106:
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return ("VIA XN266 (Apollo Pro266) host to PCI bridge");
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case 0x31681106:
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return ("VIA 8754 (PT800) host to PCI bridge");
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case 0x31891106:
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return ("VIA 8377 (Apollo KT400/KT400A/KT600) host to PCI bridge");
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case 0x32051106:
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return ("VIA 8235/8237 (Apollo KM400/KM400A) host to PCI bridge");
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case 0x32081106:
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return ("VIA 8783 (PT890) host to PCI bridge");
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case 0x32581106:
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return ("VIA PT880 host to PCI bridge");
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case 0xb1981106:
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return ("VIA VT83xx/VT87xx/KTxxx/Px8xx host to PCI bridge");
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};
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return NULL;
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}
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static int
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agp_via_probe(device_t dev)
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{
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const char *desc;
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if (resource_disabled("agp", device_get_unit(dev)))
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return (ENXIO);
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desc = agp_via_match(dev);
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if (desc) {
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device_set_desc(dev, desc);
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return BUS_PROBE_DEFAULT;
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}
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return ENXIO;
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}
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static int
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agp_via_attach(device_t dev)
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{
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struct agp_via_softc *sc = device_get_softc(dev);
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struct agp_gatt *gatt;
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int error;
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u_int32_t agpsel;
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/* XXX: This should be keying off of whether the bridge is AGP3 capable,
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* rather than a bunch of device ids for chipsets that happen to do 8x.
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*/
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switch (pci_get_devid(dev)) {
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case 0x01981106:
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case 0x02591106:
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case 0x02691106:
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case 0x02961106:
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case 0x03141106:
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case 0x03241106:
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case 0x03271106:
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case 0x03641106:
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case 0x31231106:
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case 0x31681106:
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case 0x31891106:
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case 0x32051106:
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case 0x32581106:
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case 0xb1981106:
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/* The newer VIA chipsets will select the AGP version based on
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* what AGP versions the card supports. We still have to
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* program it using the v2 registers if it has chosen to use
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* compatibility mode.
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*/
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agpsel = pci_read_config(dev, AGP_VIA_AGPSEL, 1);
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if ((agpsel & (1 << 1)) == 0)
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sc->regs = via_v3_regs;
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else
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sc->regs = via_v2_regs;
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break;
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default:
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sc->regs = via_v2_regs;
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break;
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}
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error = agp_generic_attach(dev);
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if (error)
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return error;
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sc->initial_aperture = AGP_GET_APERTURE(dev);
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for (;;) {
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gatt = agp_alloc_gatt(dev);
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if (gatt)
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break;
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/*
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* Probably contigmalloc failure. Try reducing the
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* aperture so that the gatt size reduces.
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*/
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if (AGP_SET_APERTURE(dev, AGP_GET_APERTURE(dev) / 2)) {
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agp_generic_detach(dev);
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return ENOMEM;
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}
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}
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sc->gatt = gatt;
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if (sc->regs == via_v2_regs) {
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/* Install the gatt. */
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pci_write_config(dev, sc->regs[REG_ATTBASE], gatt->ag_physical | 3, 4);
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/* Enable the aperture. */
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pci_write_config(dev, sc->regs[REG_GARTCTRL], 0x0f, 4);
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} else {
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u_int32_t gartctrl;
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/* Install the gatt. */
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pci_write_config(dev, sc->regs[REG_ATTBASE], gatt->ag_physical, 4);
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/* Enable the aperture. */
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gartctrl = pci_read_config(dev, sc->regs[REG_ATTBASE], 4);
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pci_write_config(dev, sc->regs[REG_GARTCTRL], gartctrl | (3 << 7), 4);
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}
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device_printf(dev, "aperture size is %dM\n",
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sc->initial_aperture / 1024 / 1024);
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return 0;
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}
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static int
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agp_via_detach(device_t dev)
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{
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struct agp_via_softc *sc = device_get_softc(dev);
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agp_free_cdev(dev);
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pci_write_config(dev, sc->regs[REG_GARTCTRL], 0, 4);
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pci_write_config(dev, sc->regs[REG_ATTBASE], 0, 4);
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AGP_SET_APERTURE(dev, sc->initial_aperture);
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agp_free_gatt(sc->gatt);
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agp_free_res(dev);
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return 0;
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}
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static u_int32_t
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agp_via_get_aperture(device_t dev)
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{
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struct agp_via_softc *sc = device_get_softc(dev);
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u_int32_t apsize;
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if (sc->regs == via_v2_regs) {
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apsize = pci_read_config(dev, sc->regs[REG_APSIZE], 1) & 0x1f;
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/*
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* The size is determined by the number of low bits of
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* register APBASE which are forced to zero. The low 20 bits
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* are always forced to zero and each zero bit in the apsize
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* field just read forces the corresponding bit in the 27:20
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* to be zero. We calculate the aperture size accordingly.
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*/
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return (((apsize ^ 0xff) << 20) | ((1 << 20) - 1)) + 1;
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} else {
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apsize = pci_read_config(dev, sc->regs[REG_APSIZE], 2) & 0xfff;
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switch (apsize) {
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case 0x800:
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return 0x80000000;
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case 0xc00:
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return 0x40000000;
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case 0xe00:
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return 0x20000000;
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case 0xf00:
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return 0x10000000;
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case 0xf20:
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return 0x08000000;
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case 0xf30:
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return 0x04000000;
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case 0xf38:
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return 0x02000000;
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default:
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device_printf(dev, "Invalid aperture setting 0x%x",
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pci_read_config(dev, sc->regs[REG_APSIZE], 2));
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return 0;
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}
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}
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}
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static int
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agp_via_set_aperture(device_t dev, u_int32_t aperture)
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{
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struct agp_via_softc *sc = device_get_softc(dev);
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u_int32_t apsize, key, val;
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if (sc->regs == via_v2_regs) {
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/*
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* Reverse the magic from get_aperture.
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*/
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apsize = ((aperture - 1) >> 20) ^ 0xff;
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/*
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* Double check for sanity.
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*/
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if ((((apsize ^ 0xff) << 20) | ((1 << 20) - 1)) + 1 != aperture)
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return EINVAL;
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pci_write_config(dev, sc->regs[REG_APSIZE], apsize, 1);
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} else {
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switch (aperture) {
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case 0x80000000:
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key = 0x800;
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break;
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case 0x40000000:
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key = 0xc00;
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break;
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case 0x20000000:
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key = 0xe00;
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break;
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case 0x10000000:
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key = 0xf00;
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break;
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case 0x08000000:
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key = 0xf20;
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break;
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case 0x04000000:
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key = 0xf30;
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break;
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case 0x02000000:
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key = 0xf38;
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break;
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default:
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device_printf(dev, "Invalid aperture size (%dMb)\n",
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aperture / 1024 / 1024);
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return EINVAL;
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}
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val = pci_read_config(dev, sc->regs[REG_APSIZE], 2);
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pci_write_config(dev, sc->regs[REG_APSIZE],
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((val & ~0xfff) | key), 2);
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}
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return 0;
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}
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static int
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agp_via_bind_page(device_t dev, int offset, vm_offset_t physical)
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{
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struct agp_via_softc *sc = device_get_softc(dev);
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if (offset < 0 || offset >= (sc->gatt->ag_entries << AGP_PAGE_SHIFT))
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return EINVAL;
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sc->gatt->ag_virtual[offset >> AGP_PAGE_SHIFT] = physical;
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return 0;
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}
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static int
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agp_via_unbind_page(device_t dev, int offset)
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{
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struct agp_via_softc *sc = device_get_softc(dev);
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if (offset < 0 || offset >= (sc->gatt->ag_entries << AGP_PAGE_SHIFT))
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return EINVAL;
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sc->gatt->ag_virtual[offset >> AGP_PAGE_SHIFT] = 0;
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return 0;
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}
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static void
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agp_via_flush_tlb(device_t dev)
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{
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struct agp_via_softc *sc = device_get_softc(dev);
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u_int32_t gartctrl;
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if (sc->regs == via_v2_regs) {
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pci_write_config(dev, sc->regs[REG_GARTCTRL], 0x8f, 4);
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pci_write_config(dev, sc->regs[REG_GARTCTRL], 0x0f, 4);
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} else {
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gartctrl = pci_read_config(dev, sc->regs[REG_GARTCTRL], 4);
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pci_write_config(dev, sc->regs[REG_GARTCTRL], gartctrl &
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~(1 << 7), 4);
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pci_write_config(dev, sc->regs[REG_GARTCTRL], gartctrl, 4);
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}
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}
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static device_method_t agp_via_methods[] = {
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/* Device interface */
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DEVMETHOD(device_probe, agp_via_probe),
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DEVMETHOD(device_attach, agp_via_attach),
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DEVMETHOD(device_detach, agp_via_detach),
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DEVMETHOD(device_shutdown, bus_generic_shutdown),
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DEVMETHOD(device_suspend, bus_generic_suspend),
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DEVMETHOD(device_resume, bus_generic_resume),
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/* AGP interface */
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DEVMETHOD(agp_get_aperture, agp_via_get_aperture),
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DEVMETHOD(agp_set_aperture, agp_via_set_aperture),
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DEVMETHOD(agp_bind_page, agp_via_bind_page),
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DEVMETHOD(agp_unbind_page, agp_via_unbind_page),
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DEVMETHOD(agp_flush_tlb, agp_via_flush_tlb),
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DEVMETHOD(agp_enable, agp_generic_enable),
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DEVMETHOD(agp_alloc_memory, agp_generic_alloc_memory),
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DEVMETHOD(agp_free_memory, agp_generic_free_memory),
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DEVMETHOD(agp_bind_memory, agp_generic_bind_memory),
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DEVMETHOD(agp_unbind_memory, agp_generic_unbind_memory),
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{ 0, 0 }
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};
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static driver_t agp_via_driver = {
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"agp",
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agp_via_methods,
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sizeof(struct agp_via_softc),
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};
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static devclass_t agp_devclass;
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DRIVER_MODULE(agp_via, hostb, agp_via_driver, agp_devclass, 0, 0);
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MODULE_DEPEND(agp_via, agp, 1, 1, 1);
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MODULE_DEPEND(agp_via, pci, 1, 1, 1);
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