dc9b124d66
Summary: The Freescale e500v2 PowerPC core does not use a standard FPU. Instead, it uses a Signal Processing Engine (SPE)--a DSP-style vector processor unit, which doubles as a FPU. The PowerPC SPE ABI is incompatible with the stock powerpc ABI, so a new MACHINE_ARCH was created to deal with this. Additionaly, the SPE opcodes overlap with Altivec, so these are mutually exclusive. Taking advantage of this fact, a new file, powerpc/booke/spe.c, was created with the same function set as in powerpc/powerpc/altivec.c, so it becomes effectively a drop-in replacement. setjmp/longjmp were modified to save the upper 32-bits of the now-64-bit GPRs (upper 32-bits are only accessible by the SPE). Note: This does _not_ support the SPE in the e500v1, as the e500v1 SPE does not support double-precision floating point. Also, without a new MACHINE_ARCH it would be impossible to provide binary packages which utilize the SPE. Additionally, no work has been done to support ports, work is needed for this. This also means no newer gcc can yet be used. However, gcc's powerpc support has been refactored which would make adding a powerpcspe-freebsd target very easy. Test Plan: This was lightly tested on a RouterBoard RB800 and an AmigaOne A1222 (P1022-based) board, compiled against the new ABI. Base system utilities (/bin/sh, /bin/ls, etc) still function appropriately, the system is able to boot multiuser. Reviewed By: bdrewery, imp Relnotes: yes Differential Revision: https://reviews.freebsd.org/D5683
372 lines
12 KiB
Makefile
372 lines
12 KiB
Makefile
# $FreeBSD$
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# Set default CPU compile flags and baseline CPUTYPE for each arch. The
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# compile flags must support the minimum CPU type for each architecture but
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# may tune support for more advanced processors.
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.if !defined(CPUTYPE) || empty(CPUTYPE)
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_CPUCFLAGS =
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. if ${MACHINE_CPUARCH} == "aarch64"
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MACHINE_CPU = arm64
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. elif ${MACHINE_CPUARCH} == "amd64"
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MACHINE_CPU = amd64 sse2 sse mmx
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. elif ${MACHINE_CPUARCH} == "arm"
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MACHINE_CPU = arm
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. elif ${MACHINE_CPUARCH} == "i386"
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MACHINE_CPU = i486
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. elif ${MACHINE_CPUARCH} == "mips"
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MACHINE_CPU = mips
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. elif ${MACHINE_CPUARCH} == "powerpc"
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MACHINE_CPU = aim
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. elif ${MACHINE_CPUARCH} == "riscv"
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MACHINE_CPU = riscv
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. elif ${MACHINE_CPUARCH} == "sparc64"
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MACHINE_CPU = ultrasparc
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. endif
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.else
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# Handle aliases (not documented in make.conf to avoid user confusion
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# between e.g. i586 and pentium)
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. if ${MACHINE_CPUARCH} == "amd64" || ${MACHINE_CPUARCH} == "i386"
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. if ${CPUTYPE} == "barcelona"
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CPUTYPE = amdfam10
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. elif ${CPUTYPE} == "core-avx2"
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CPUTYPE = haswell
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. elif ${CPUTYPE} == "core-avx-i"
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CPUTYPE = ivybridge
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. elif ${CPUTYPE} == "corei7-avx"
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CPUTYPE = sandybridge
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. elif ${CPUTYPE} == "corei7"
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CPUTYPE = nehalem
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. elif ${CPUTYPE} == "slm"
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CPUTYPE = silvermont
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. elif ${CPUTYPE} == "atom"
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CPUTYPE = bonnell
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. elif ${CPUTYPE} == "core"
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CPUTYPE = prescott
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. endif
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. if ${MACHINE_CPUARCH} == "amd64"
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. if ${CPUTYPE} == "prescott"
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CPUTYPE = nocona
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. endif
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. else
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. if ${CPUTYPE} == "k7"
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CPUTYPE = athlon
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. elif ${CPUTYPE} == "p4"
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CPUTYPE = pentium4
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. elif ${CPUTYPE} == "p4m"
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CPUTYPE = pentium4m
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. elif ${CPUTYPE} == "p3"
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CPUTYPE = pentium3
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. elif ${CPUTYPE} == "p3m"
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CPUTYPE = pentium3m
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. elif ${CPUTYPE} == "p-m"
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CPUTYPE = pentium-m
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. elif ${CPUTYPE} == "p2"
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CPUTYPE = pentium2
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. elif ${CPUTYPE} == "i686"
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CPUTYPE = pentiumpro
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. elif ${CPUTYPE} == "i586/mmx"
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CPUTYPE = pentium-mmx
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. elif ${CPUTYPE} == "i586"
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CPUTYPE = pentium
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. endif
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. endif
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. elif ${MACHINE_ARCH} == "sparc64"
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. if ${CPUTYPE} == "us"
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CPUTYPE = ultrasparc
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. elif ${CPUTYPE} == "us3"
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CPUTYPE = ultrasparc3
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. endif
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. endif
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###############################################################################
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# Logic to set up correct gcc optimization flag. This must be included
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# after /etc/make.conf so it can react to the local value of CPUTYPE
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# defined therein. Consult:
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# http://gcc.gnu.org/onlinedocs/gcc/ARM-Options.html
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# http://gcc.gnu.org/onlinedocs/gcc/RS-6000-and-PowerPC-Options.html
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# http://gcc.gnu.org/onlinedocs/gcc/MIPS-Options.html
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# http://gcc.gnu.org/onlinedocs/gcc/SPARC-Options.html
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# http://gcc.gnu.org/onlinedocs/gcc/i386-and-x86_002d64-Options.html
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. if ${MACHINE_CPUARCH} == "i386"
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. if ${CPUTYPE} == "crusoe"
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_CPUCFLAGS = -march=i686 -falign-functions=0 -falign-jumps=0 -falign-loops=0
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. elif ${CPUTYPE} == "k5"
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_CPUCFLAGS = -march=pentium
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. elif ${CPUTYPE} == "c7"
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_CPUCFLAGS = -march=c3-2
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. else
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_CPUCFLAGS = -march=${CPUTYPE}
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. endif
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. elif ${MACHINE_CPUARCH} == "amd64"
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_CPUCFLAGS = -march=${CPUTYPE}
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. elif ${MACHINE_CPUARCH} == "arm"
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. if ${CPUTYPE} == "xscale"
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#XXX: gcc doesn't seem to like -mcpu=xscale, and dies while rebuilding itself
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#_CPUCFLAGS = -mcpu=xscale
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_CPUCFLAGS = -march=armv5te -D__XSCALE__
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. elif ${CPUTYPE:M*soft*} != ""
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_CPUCFLAGS = -mfloat-abi=softfp
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. elif ${CPUTYPE} == "armv6"
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# Not sure we still need ARM_ARCH_6=1 here.
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_CPUCFLAGS = -march=${CPUTYPE} -DARM_ARCH_6=1
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. elif ${CPUTYPE} == "cortexa"
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_CPUCFLAGS = -march=armv7 -DARM_ARCH_6=1 -mfpu=vfp
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. elif ${CPUTYPE:Marmv[4567]*} != ""
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# Handle all the armvX types that FreeBSD runs:
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# armv4, armv4t, armv5, armv5te, armv6, armv6t2, armv7, armv7-a, armv7ve
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# they require -march=. All the others require -mcpu=.
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_CPUCFLAGS = -march=${CPUTYPE}
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. else
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# Common values for FreeBSD
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# arm: (any arm v4 or v5 processor you are targeting)
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# arm920t, arm926ej-s, marvell-pj4, fa526, fa626,
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# fa606te, fa626te, fa726te
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# armv6: (any arm v7 or v8 processor you are targeting and the arm1176jzf-s)
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# arm1176jzf-s, generic-armv7-a, cortex-a5, cortex-a7, cortex-a8,
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# cortex-a9, cortex-a12, cortex-a15, cortex-a17, cortex-a53, cortex-a57,
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# cortex-a72, exynos-m1
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_CPUCFLAGS = -mcpu=${CPUTYPE}
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. endif
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. elif ${MACHINE_ARCH} == "powerpc"
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. if ${CPUTYPE} == "e500"
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_CPUCFLAGS = -Wa,-me500 -msoft-float
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. else
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_CPUCFLAGS = -mcpu=${CPUTYPE} -mno-powerpc64
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. endif
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. elif ${MACHINE_ARCH} == "powerpcspe"
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_CPUCFLAGS = -Wa,-me500 -mspe=yes -mabi=spe -mfloat-gprs=double
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. elif ${MACHINE_ARCH} == "powerpc64"
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_CPUCFLAGS = -mcpu=${CPUTYPE}
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. elif ${MACHINE_CPUARCH} == "mips"
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# mips[1234], mips32, mips64, and all later releases need to have mips
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# preserved (releases later than r2 require external toolchain)
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. if ${CPUTYPE:Mmips32*} != "" || ${CPUTYPE:Mmips64*} != "" || \
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${CPUTYPE:Mmips[1234]} != ""
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_CPUCFLAGS = -march=${CPUTYPE}
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. else
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# Default -march to the CPUTYPE passed in, with mips stripped off so we
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# accept either mips4kc or 4kc, mostly for historical reasons
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# Typical values for cores:
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# 4kc, 24kc, 34kc, 74kc, 1004kc, octeon, octeon+, octeon2, octeon3,
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# sb1, xlp, xlr
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_CPUCFLAGS = -march=${CPUTYPE:S/^mips//}
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. endif
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. elif ${MACHINE_CPUARCH} == "riscv"
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_CPUCFLAGS = -msoft-float # -march="RV64I" # RISCVTODO
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. elif ${MACHINE_ARCH} == "sparc64"
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. if ${CPUTYPE} == "v9"
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_CPUCFLAGS = -mcpu=v9
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. elif ${CPUTYPE} == "ultrasparc"
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_CPUCFLAGS = -mcpu=ultrasparc
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. elif ${CPUTYPE} == "ultrasparc3"
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_CPUCFLAGS = -mcpu=ultrasparc3
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. endif
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. elif ${MACHINE_CPUARCH} == "aarch64"
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_CPUCFLAGS = -mcpu=${CPUTYPE}
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. endif
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# Set up the list of CPU features based on the CPU type. This is an
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# unordered list to make it easy for client makefiles to test for the
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# presence of a CPU feature.
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########## i386
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. if ${MACHINE_CPUARCH} == "i386"
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. if ${CPUTYPE} == "bdver4"
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MACHINE_CPU = xop avx2 avx sse42 sse41 ssse3 sse4a sse3 sse2 sse mmx k6 k5 i586
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. elif ${CPUTYPE} == "bdver3" || ${CPUTYPE} == "bdver2" || \
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${CPUTYPE} == "bdver1"
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MACHINE_CPU = xop avx sse42 sse41 ssse3 sse4a sse3 sse2 sse mmx k6 k5 i586
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. elif ${CPUTYPE} == "btver2"
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MACHINE_CPU = avx sse42 sse41 ssse3 sse4a sse3 sse2 sse mmx k6 k5 i586
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. elif ${CPUTYPE} == "btver1"
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MACHINE_CPU = ssse3 sse4a sse3 sse2 sse mmx k6 k5 i586
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. elif ${CPUTYPE} == "amdfam10"
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MACHINE_CPU = athlon-xp athlon k7 3dnow sse4a sse3 sse2 sse mmx k6 k5 i586
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. elif ${CPUTYPE} == "opteron-sse3" || ${CPUTYPE} == "athlon64-sse3"
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MACHINE_CPU = athlon-xp athlon k7 3dnow sse3 sse2 sse mmx k6 k5 i586
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. elif ${CPUTYPE} == "opteron" || ${CPUTYPE} == "athlon64" || \
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${CPUTYPE} == "athlon-fx"
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MACHINE_CPU = athlon-xp athlon k7 3dnow sse2 sse mmx k6 k5 i586
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. elif ${CPUTYPE} == "athlon-mp" || ${CPUTYPE} == "athlon-xp" || \
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${CPUTYPE} == "athlon-4"
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MACHINE_CPU = athlon-xp athlon k7 3dnow sse mmx k6 k5 i586
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. elif ${CPUTYPE} == "athlon" || ${CPUTYPE} == "athlon-tbird"
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MACHINE_CPU = athlon k7 3dnow mmx k6 k5 i586
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. elif ${CPUTYPE} == "k6-3" || ${CPUTYPE} == "k6-2" || ${CPUTYPE} == "geode"
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MACHINE_CPU = 3dnow mmx k6 k5 i586
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. elif ${CPUTYPE} == "k6"
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MACHINE_CPU = mmx k6 k5 i586
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. elif ${CPUTYPE} == "k5"
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MACHINE_CPU = k5 i586
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. elif ${CPUTYPE} == "skylake" || ${CPUTYPE} == "knl"
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MACHINE_CPU = avx512 avx2 avx sse42 sse41 ssse3 sse3 sse2 sse i686 mmx i586
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. elif ${CPUTYPE} == "broadwell" || ${CPUTYPE} == "haswell"
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MACHINE_CPU = avx2 avx sse42 sse41 ssse3 sse3 sse2 sse i686 mmx i586
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. elif ${CPUTYPE} == "ivybridge" || ${CPUTYPE} == "sandybridge"
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MACHINE_CPU = avx sse42 sse41 ssse3 sse3 sse2 sse i686 mmx i586
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. elif ${CPUTYPE} == "westmere" || ${CPUTYPE} == "nehalem" || \
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${CPUTYPE} == "silvermont"
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MACHINE_CPU = sse42 sse41 ssse3 sse3 sse2 sse i686 mmx i586
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. elif ${CPUTYPE} == "penryn"
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MACHINE_CPU = sse41 ssse3 sse3 sse2 sse i686 mmx i586
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. elif ${CPUTYPE} == "core2" || ${CPUTYPE} == "bonnell"
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MACHINE_CPU = ssse3 sse3 sse2 sse i686 mmx i586
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. elif ${CPUTYPE} == "yonah" || ${CPUTYPE} == "prescott"
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MACHINE_CPU = sse3 sse2 sse i686 mmx i586
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. elif ${CPUTYPE} == "pentium4" || ${CPUTYPE} == "pentium4m" || \
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${CPUTYPE} == "pentium-m"
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MACHINE_CPU = sse2 sse i686 mmx i586
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. elif ${CPUTYPE} == "pentium3" || ${CPUTYPE} == "pentium3m"
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MACHINE_CPU = sse i686 mmx i586
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. elif ${CPUTYPE} == "pentium2"
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MACHINE_CPU = i686 mmx i586
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. elif ${CPUTYPE} == "pentiumpro"
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MACHINE_CPU = i686 i586
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. elif ${CPUTYPE} == "pentium-mmx"
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MACHINE_CPU = mmx i586
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. elif ${CPUTYPE} == "pentium"
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MACHINE_CPU = i586
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. elif ${CPUTYPE} == "c7"
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MACHINE_CPU = sse3 sse2 sse i686 mmx i586
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. elif ${CPUTYPE} == "c3-2"
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MACHINE_CPU = sse i686 mmx i586
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. elif ${CPUTYPE} == "c3"
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MACHINE_CPU = 3dnow mmx i586
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. elif ${CPUTYPE} == "winchip2"
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MACHINE_CPU = 3dnow mmx
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. elif ${CPUTYPE} == "winchip-c6"
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MACHINE_CPU = mmx
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. endif
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MACHINE_CPU += i486
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########## amd64
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. elif ${MACHINE_CPUARCH} == "amd64"
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. if ${CPUTYPE} == "bdver4"
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MACHINE_CPU = xop avx2 avx sse42 sse41 ssse3 sse4a sse3
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. elif ${CPUTYPE} == "bdver3" || ${CPUTYPE} == "bdver2" || \
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${CPUTYPE} == "bdver1"
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MACHINE_CPU = xop avx sse42 sse41 ssse3 sse4a sse3
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. elif ${CPUTYPE} == "btver2"
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MACHINE_CPU = avx sse42 sse41 ssse3 sse4a sse3
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. elif ${CPUTYPE} == "btver1"
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MACHINE_CPU = ssse3 sse4a sse3
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. elif ${CPUTYPE} == "amdfam10"
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MACHINE_CPU = k8 3dnow sse4a sse3
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. elif ${CPUTYPE} == "opteron-sse3" || ${CPUTYPE} == "athlon64-sse3" || \
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${CPUTYPE} == "k8-sse3"
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MACHINE_CPU = k8 3dnow sse3
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. elif ${CPUTYPE} == "opteron" || ${CPUTYPE} == "athlon64" || \
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${CPUTYPE} == "athlon-fx" || ${CPUTYPE} == "k8"
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MACHINE_CPU = k8 3dnow
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. elif ${CPUTYPE} == "skylake" || ${CPUTYPE} == "knl"
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MACHINE_CPU = avx512 avx2 avx sse42 sse41 ssse3 sse3
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. elif ${CPUTYPE} == "broadwell" || ${CPUTYPE} == "haswell"
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MACHINE_CPU = avx2 avx sse42 sse41 ssse3 sse3
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. elif ${CPUTYPE} == "ivybridge" || ${CPUTYPE} == "sandybridge"
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MACHINE_CPU = avx sse42 sse41 ssse3 sse3
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. elif ${CPUTYPE} == "westmere" || ${CPUTYPE} == "nehalem" || \
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${CPUTYPE} == "silvermont"
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MACHINE_CPU = sse42 sse41 ssse3 sse3
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. elif ${CPUTYPE} == "penryn"
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MACHINE_CPU = sse41 ssse3 sse3
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. elif ${CPUTYPE} == "core2" || ${CPUTYPE} == "bonnell"
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MACHINE_CPU = ssse3 sse3
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. elif ${CPUTYPE} == "nocona"
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MACHINE_CPU = sse3
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. endif
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MACHINE_CPU += amd64 sse2 sse mmx
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########## Mips
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. elif ${MACHINE_CPUARCH} == "mips"
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MACHINE_CPU = mips
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########## powerpc
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. elif ${MACHINE_ARCH} == "powerpc"
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. if ${CPUTYPE} == "e500"
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MACHINE_CPU = booke softfp
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. endif
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########## riscv
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. elif ${MACHINE_CPUARCH} == "riscv"
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MACHINE_CPU = riscv
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########## sparc64
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. elif ${MACHINE_ARCH} == "sparc64"
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. if ${CPUTYPE} == "v9"
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MACHINE_CPU = v9
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. elif ${CPUTYPE} == "ultrasparc"
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MACHINE_CPU = v9 ultrasparc
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. elif ${CPUTYPE} == "ultrasparc3"
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MACHINE_CPU = v9 ultrasparc ultrasparc3
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. endif
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. endif
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.endif
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.if ${MACHINE_CPUARCH} == "mips"
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CFLAGS += -G0
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.endif
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########## arm
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.if ${MACHINE_CPUARCH} == "arm"
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MACHINE_CPU += arm
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. if ${MACHINE_ARCH:Marmv6*} != ""
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MACHINE_CPU += armv6
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. endif
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# armv6 is a hybrid. It can use the softfp ABI, but doesn't emulate
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# floating point in the general case, so don't define softfp for
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# it at this time. arm and armeb are pure softfp, so define it
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# for them.
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. if ${MACHINE_ARCH:Marmv6*} == ""
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MACHINE_CPU += softfp
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. endif
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# Normally armv6 is hard float ABI from FreeBSD 11 onwards. However
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# when CPUTYPE has 'soft' in it, we use the soft-float ABI to allow
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# building of soft-float ABI libraries. In this case, we have to
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# add the -mfloat-abi=softfp to force that.
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.if ${MACHINE_ARCH:Marmv6*} && defined(CPUTYPE) && ${CPUTYPE:M*soft*} != ""
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# Needs to be CFLAGS not _CPUCFLAGS because it's needed for the ABI
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# not a nice optimization.
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CFLAGS += -mfloat-abi=softfp
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.endif
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.endif
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.if ${MACHINE_ARCH} == "powerpcspe"
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CFLAGS += -mcpu=8540 -Wa,-me500 -mspe=yes -mabi=spe -mfloat-gprs=double
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.endif
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.if ${MACHINE_CPUARCH} == "riscv"
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CFLAGS += -msoft-float
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ACFLAGS += -msoft-float
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.endif
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# NB: COPTFLAGS is handled in /usr/src/sys/conf/kern.pre.mk
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.if !defined(NO_CPU_CFLAGS)
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CFLAGS += ${_CPUCFLAGS}
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.endif
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#
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# Prohibit the compiler from emitting SIMD instructions.
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# These flags are added to CFLAGS in areas where the extra context-switch
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# cost outweighs the advantages of SIMD instructions.
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#
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# gcc:
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# Setting -mno-mmx implies -mno-3dnow
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# Setting -mno-sse implies -mno-sse2, -mno-sse3, -mno-ssse3 and -mfpmath=387
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#
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# clang:
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# Setting -mno-mmx implies -mno-3dnow and -mno-3dnowa
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# Setting -mno-sse implies -mno-sse2, -mno-sse3, -mno-ssse3, -mno-sse41 and
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# -mno-sse42
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# (-mfpmath= is not supported)
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|
#
|
|
.if ${MACHINE_CPUARCH} == "i386" || ${MACHINE_CPUARCH} == "amd64"
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CFLAGS_NO_SIMD.clang= -mno-avx
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CFLAGS_NO_SIMD= -mno-mmx -mno-sse
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|
.endif
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CFLAGS_NO_SIMD += ${CFLAGS_NO_SIMD.${COMPILER_TYPE}}
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|
|
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# Add in any architecture-specific CFLAGS.
|
|
# These come from make.conf or the command line or the environment.
|
|
CFLAGS += ${CFLAGS.${MACHINE_ARCH}}
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|
CXXFLAGS += ${CXXFLAGS.${MACHINE_ARCH}}
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