373bbe25ff
* Orion
- 88F5181
- 88F5182
- 88F5281
* Kirkwood
- 88F6281
* Discovery
- MV78100
The above families of SOCs are built around CPU cores compliant with ARMv5TE
instruction set architecture definition. They share a number of integrated
peripherals. This commit brings support for the following basic elements:
* GPIO
* Interrupt controller
* L1, L2 cache
* Timers, watchdog, RTC
* TWSI (I2C)
* UART
Other peripherals drivers will be introduced separately.
Reviewed by: imp, marcel, stass (Thanks guys!)
Obtained from: Marvell, Semihalf
163 lines
3.3 KiB
C
163 lines
3.3 KiB
C
/*-
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* Copyright (C) 2008 MARVELL INTERNATIONAL LTD.
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* All rights reserved.
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*
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* Developed by Semihalf.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. Neither the name of MARVELL nor the names of contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/kernel.h>
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#include <sys/malloc.h>
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#include <machine/bus.h>
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/*
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* Bus space functions for Marvell SoC family
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*/
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/* Prototypes for all the bus_space structure functions */
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bs_protos(generic);
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bs_protos(generic_armv4);
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/*
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* The obio bus space tag. This is constant for all instances, so
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* we never have to explicitly "create" it.
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*/
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static struct bus_space _base_tag = {
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/* cookie */
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(void *) 0,
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/* mapping/unmapping */
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generic_bs_map,
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generic_bs_unmap,
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generic_bs_subregion,
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/* allocation/deallocation */
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generic_bs_alloc,
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generic_bs_free,
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/* barrier */
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generic_bs_barrier,
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/* read (single) */
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generic_bs_r_1,
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generic_armv4_bs_r_2,
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generic_bs_r_4,
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NULL,
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/* read multiple */
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generic_bs_rm_1,
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generic_armv4_bs_rm_2,
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generic_bs_rm_4,
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NULL,
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/* read region */
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generic_bs_rr_1,
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generic_armv4_bs_rr_2,
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generic_bs_rr_4,
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NULL,
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/* write (single) */
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generic_bs_w_1,
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generic_armv4_bs_w_2,
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generic_bs_w_4,
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NULL,
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/* write multiple */
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generic_bs_wm_1,
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generic_armv4_bs_wm_2,
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generic_bs_wm_4,
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NULL,
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/* write region */
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NULL,
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NULL,
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NULL,
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NULL,
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/* set multiple */
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NULL,
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NULL,
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NULL,
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NULL,
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/* set region */
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NULL,
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NULL,
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NULL,
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NULL,
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/* copy */
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NULL,
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NULL,
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NULL,
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NULL,
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/* read stream (single) */
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NULL,
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NULL,
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NULL,
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NULL,
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/* read multiple stream */
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NULL,
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generic_armv4_bs_rm_2, /* bus_space_read_multi_stream_2 */
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NULL,
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NULL,
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/* read region stream */
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NULL,
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NULL,
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NULL,
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NULL,
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/* write stream (single) */
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NULL,
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NULL,
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NULL,
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NULL,
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/* write multiple stream */
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NULL,
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generic_armv4_bs_wm_2, /* bus_space_write_multi_stream_2 */
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NULL,
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NULL,
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/* write region stream */
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NULL,
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NULL,
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NULL,
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NULL
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};
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bus_space_tag_t obio_tag = &_base_tag;
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