Navdeep Parhar c1508f2bad cxgbe(4): Add sysctls to extract debug information from the chip: ... dev.t4nex.X.misc.cim_la logic analyzer dump dev.t4nex.X.misc.cim_qcfg queue configuration dev.t4nex.X.misc.cim_ibq_xxx inbound queues dev.t4nex.X.misc.cim_obq_xxx outbound queues Obtained from: Chelsio MFC after: 1 week		2013-02-21 20:13:15 +00:00
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common	cxgbe(4): Add sysctls to extract debug information from the chip:	2013-02-21 20:13:15 +00:00
firmware	cxgbe(4): updates to the configuration file that controls how hardware	2013-01-09 21:27:14 +00:00
tom	Install an extra hold on the newly allocated synq entry so that it	2013-01-26 03:23:28 +00:00
adapter.h	Force the 404-BT card (4 x 1G) to use the "uwire" configuration file.	2013-01-26 03:10:28 +00:00
offload.h	cxgbe(4): Updates to the hardware L2 table management code.	2013-01-14 20:36:22 +00:00
osdep.h	Switch some PCI register reads from using magic numbers to using the names	2012-09-19 12:27:23 +00:00
t4_ioctl.h	Add a driver ioctl to clear a port's MAC statistics.	2012-10-10 19:27:40 +00:00
t4_l2t.c	cxgbe(4): Updates to the hardware L2 table management code.	2013-01-14 20:36:22 +00:00
t4_l2t.h	cxgbe(4): Updates to the hardware L2 table management code.	2013-01-14 20:36:22 +00:00
t4_main.c	cxgbe(4): Add sysctls to extract debug information from the chip:	2013-02-21 20:13:15 +00:00
t4_sge.c	cxgbe(4): Assume that CSUM_TSO in the transmit path implies CSUM_IP and	2013-02-20 23:15:40 +00:00