7a40330b95
These functions are already referenced throughout the manpage -- this makes their presence more apparent. MFC after: 2 months Sponsored by: Dell EMC Isilon
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576 lines
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.\" Copyright (c) 2003-2008 Joseph Koshy. All rights reserved.
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.\"
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.\" Redistribution and use in source and binary forms, with or without
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.\" modification, are permitted provided that the following conditions
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.\" are met:
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.\" 1. Redistributions of source code must retain the above copyright
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.\" notice, this list of conditions and the following disclaimer.
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.\" 2. Redistributions in binary form must reproduce the above copyright
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.\" notice, this list of conditions and the following disclaimer in the
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.\" documentation and/or other materials provided with the distribution.
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.\"
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.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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.\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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.\" ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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.\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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.\" SUCH DAMAGE.
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.\"
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.\" $FreeBSD$
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.\"
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.Dd April 6, 2017
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.Dt PMC 3
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.Os
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.Sh NAME
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.Nm pmc
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.Nd library for accessing hardware performance monitoring counters
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.Sh LIBRARY
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.Lb libpmc
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.Sh SYNOPSIS
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.In pmc.h
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.Sh DESCRIPTION
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The
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.Lb libpmc
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provides a programming interface that allows applications to use
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hardware performance counters to gather performance data about
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specific processes or for the system as a whole.
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The library is implemented using the lower-level facilities offered by
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the
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.Xr hwpmc 4
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driver.
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.Ss Key Concepts
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Performance monitoring counters (PMCs) are represented by the library
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using a software abstraction.
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These
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.Dq abstract
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PMCs can have two scopes:
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.Bl -bullet
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.It
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System scope.
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These PMCs measure events in a whole-system manner, i.e., independent
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of the currently executing thread.
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System scope PMCs are allocated on specific CPUs and do not
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migrate between CPUs.
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Non-privileged process are allowed to allocate system scope PMCs if the
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.Xr hwpmc 4
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sysctl tunable:
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.Va security.bsd.unprivileged_syspmcs
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is non-zero.
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.It
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Process scope.
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These PMCs only measure hardware events when the processes they are
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attached to are executing on a CPU.
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In an SMP system, process scope PMCs migrate between CPUs along with
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their target processes.
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.El
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.Pp
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Orthogonal to PMC scope, PMCs may be allocated in one of two
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operational modes:
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.Bl -bullet
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.It
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Counting PMCs measure events according to their scope
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(system or process).
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The application needs to explicitly read these counters
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to retrieve their value.
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.It
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Sampling PMCs cause the CPU to be periodically interrupted
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and information about its state of execution to be collected.
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Sampling PMCs are used to profile specific processes and kernel
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threads or to profile the system as a whole.
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.El
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.Pp
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The scope and operational mode for a software PMC are specified at
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PMC allocation time.
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An application is allowed to allocate multiple PMCs subject
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to availability of hardware resources.
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.Pp
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The library uses human-readable strings to name the event being
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measured by hardware.
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The syntax used for specifying a hardware event along with additional
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event specific qualifiers (if any) is described in detail in section
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.Sx "EVENT SPECIFIERS"
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below.
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.Pp
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PMCs are associated with the process that allocated them and
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will be automatically reclaimed by the system when the process exits.
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Additionally, process-scope PMCs have to be attached to one or more
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target processes before they can perform measurements.
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A process-scope PMC may be attached to those target processes
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that its owner process would otherwise be permitted to debug.
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An owner process may attach PMCs to itself allowing
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it to measure its own behavior.
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Additionally, on some machine architectures, such self-attached PMCs
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may be read cheaply using specialized instructions supported by the
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processor.
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.Pp
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Certain kinds of PMCs require that a log file be configured before
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they may be started.
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These include:
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.Bl -bullet
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.It
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System scope sampling PMCs.
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.It
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Process scope sampling PMCs.
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.It
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Process scope counting PMCs that have been configured to report PMC
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readings on process context switches or process exits.
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.El
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.Pp
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Up to one log file may be configured per owner process.
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Events logged to a log file may be subsequently analyzed using the
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.Xr pmclog 3
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family of functions.
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.Ss Supported CPUs
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The CPUs known to the PMC library are named by the
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.Vt "enum pmc_cputype"
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enumeration.
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Supported CPUs include:
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.Pp
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.Bl -tag -width "Li PMC_CPU_INTEL_CORE2" -compact
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.It Li PMC_CPU_AMD_K7
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.Tn "AMD Athlon"
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CPUs.
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.It Li PMC_CPU_AMD_K8
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.Tn "AMD Athlon64"
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CPUs.
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.It Li PMC_CPU_INTEL_ATOM
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.Tn Intel
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.Tn Atom
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CPUs and other CPUs conforming to version 3 of the
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.Tn Intel
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performance measurement architecture.
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.It Li PMC_CPU_INTEL_CORE
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.Tn Intel
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.Tn Core Solo
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and
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.Tn Core Duo
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CPUs, and other CPUs conforming to version 1 of the
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.Tn Intel
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performance measurement architecture.
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.It Li PMC_CPU_INTEL_CORE2
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.Tn Intel
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.Tn "Core2 Solo" ,
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.Tn "Core2 Duo"
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and
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.Tn "Core2 Extreme"
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CPUs, and other CPUs conforming to version 2 of the
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.Tn Intel
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performance measurement architecture.
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.It Li PMC_CPU_INTEL_P5
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.Tn Intel
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.Tn "Pentium"
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CPUs.
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.It Li PMC_CPU_INTEL_P6
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.Tn Intel
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.Tn "Pentium Pro"
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CPUs.
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.It Li PMC_CPU_INTEL_PII
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.Tn "Intel Pentium II"
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CPUs.
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.It Li PMC_CPU_INTEL_PIII
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.Tn "Intel Pentium III"
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CPUs.
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.It Li PMC_CPU_INTEL_PIV
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.Tn "Intel Pentium 4"
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CPUs.
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.It Li PMC_CPU_INTEL_PM
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.Tn "Intel Pentium M"
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CPUs.
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.El
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.Ss Supported PMCs
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PMC supported by this library are named by the
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.Vt enum pmc_class
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enumeration.
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Supported PMC kinds include:
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.Pp
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.Bl -tag -width "Li PMC_CLASS_IAF" -compact
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.It Li PMC_CLASS_IAF
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Fixed function hardware counters presents in CPUs conforming to the
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.Tn Intel
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performance measurement architecture version 2 and later.
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.It Li PMC_CLASS_IAP
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Programmable hardware counters present in CPUs conforming to the
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.Tn Intel
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performance measurement architecture version 1 and later.
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.It Li PMC_CLASS_K7
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Programmable hardware counters present in
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.Tn "AMD Athlon"
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CPUs.
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.It Li PMC_CLASS_K8
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Programmable hardware counters present in
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.Tn "AMD Athlon64"
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CPUs.
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.It Li PMC_CLASS_P4
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Programmable hardware counters present in
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.Tn "Intel Pentium 4"
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CPUs.
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.It Li PMC_CLASS_P5
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Programmable hardware counters present in
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.Tn Intel
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.Tn Pentium
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CPUs.
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.It Li PMC_CLASS_P6
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Programmable hardware counters present in
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.Tn Intel
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.Tn "Pentium Pro" ,
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.Tn "Pentium II" ,
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.Tn "Pentium III" ,
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.Tn "Celeron" ,
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and
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.Tn "Pentium M"
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CPUs.
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.It Li PMC_CLASS_TSC
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The timestamp counter on i386 and amd64 architecture CPUs.
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.It Li PMC_CLASS_SOFT
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Software events.
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.El
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.Ss PMC Capabilities
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Capabilities of performance monitoring hardware are denoted using
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the
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.Vt "enum pmc_caps"
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enumeration.
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Supported capabilities include:
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.Pp
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.Bl -tag -width "Li PMC_CAP_INTERRUPT" -compact
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.It Li PMC_CAP_CASCADE
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The ability to cascade counters.
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.It Li PMC_CAP_EDGE
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The ability to count negated to asserted transitions of the hardware
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conditions being probed for.
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.It Li PMC_CAP_INTERRUPT
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The ability to interrupt the CPU.
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.It Li PMC_CAP_INVERT
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The ability to invert the sense of the hardware conditions being
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measured.
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.It Li PMC_CAP_PRECISE
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The ability to perform precise sampling.
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.It Li PMC_CAP_QUALIFIER
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The hardware allows monitored to be further qualified in some
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system dependent way.
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.It Li PMC_CAP_READ
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The ability to read from performance counters.
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.It Li PMC_CAP_SYSTEM
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The ability to restrict counting of hardware events to when the CPU is
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running privileged code.
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.It Li PMC_CAP_THRESHOLD
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The ability to ignore simultaneous hardware events below a
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programmable threshold.
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.It Li PMC_CAP_USER
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The ability to restrict counting of hardware events to those when the
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CPU is running unprivileged code.
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.It Li PMC_CAP_WRITE
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The ability to write to performance counters.
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.El
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.Ss CPU Naming Conventions
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CPUs are named using small integers from zero up to, but
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excluding, the value returned by function
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.Fn pmc_ncpu .
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On platforms supporting sparsely numbered CPUs not all the numbers in
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this range will denote valid CPUs.
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Operations on non-existent CPUs will return an error.
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.Ss Functional Grouping of the API
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This section contains a brief overview of the available functionality
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in the PMC library.
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Each function listed here is described further in its own manual page.
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.Bl -tag -width 2n
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.It Administration
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.Bl -tag -width 6n -compact
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.It Fn pmc_disable , Fn pmc_enable
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Administratively disable (enable) specific performance monitoring
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counter hardware.
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Counters that are disabled will not be available to applications to
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use.
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.El
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.It "Convenience Functions"
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.Bl -tag -width 6n -compact
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.It Fn pmc_event_names_of_class
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Returns a list of event names supported by a given PMC type.
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.It Fn pmc_name_of_capability
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Convert a
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.Dv PMC_CAP_*
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flag to a human-readable string.
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.It Fn pmc_name_of_class
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Convert a
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.Dv PMC_CLASS_*
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constant to a human-readable string.
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.It Fn pmc_name_of_cputype
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Return a human-readable name for a CPU type.
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.It Fn pmc_name_of_disposition
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Return a human-readable string describing a PMC's disposition.
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.It Fn pmc_name_of_event
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Convert a numeric event code to a human-readable string.
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.It Fn pmc_name_of_mode
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Convert a
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.Dv PMC_MODE_*
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constant to a human-readable name.
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.It Fn pmc_name_of_state
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Return a human-readable string describing a PMC's current state.
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.El
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.It "Library Initialization"
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.Bl -tag -width 6n -compact
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.It Fn pmc_init
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Initialize the library.
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This function must be called before any other library function.
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.El
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.It "Log File Handling"
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.Bl -tag -width 6n -compact
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.It Fn pmc_configure_logfile
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Configure a log file for
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.Xr hwpmc 4
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to write logged events to.
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.It Fn pmc_flush_logfile
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Flush all pending log data in
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.Xr hwpmc 4 Ns Ap s
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buffers.
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.It Fn pmc_close_logfile
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Flush all pending log data and close
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.Xr hwpmc 4 Ns Ap s
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side of the stream.
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.It Fn pmc_writelog
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Append arbitrary user data to the current log file.
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.El
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.It "PMC Management"
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.Bl -tag -width 6n -compact
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.It Fn pmc_allocate , Fn pmc_release
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Allocate (free) a PMC.
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.It Fn pmc_attach , Fn pmc_detach
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Attach (detach) a process scope PMC to a target.
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.It Fn pmc_read , Fn pmc_write , Fn pmc_rw
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Read (write) a value from (to) a PMC.
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.It Fn pmc_start , Fn pmc_stop
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Start (stop) a software PMC.
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.It Fn pmc_set
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Set the reload value for a sampling PMC.
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.El
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.It "Queries"
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.Bl -tag -width 6n -compact
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.It Fn pmc_capabilities
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Retrieve the capabilities for a given PMC.
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.It Fn pmc_cpuinfo
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Retrieve information about the CPUs and PMC hardware present in the
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system.
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.It Fn pmc_get_driver_stats
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Retrieve statistics maintained by
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.Xr hwpmc 4 .
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.It Fn pmc_ncpu
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Determine the greatest possible CPU number on the system.
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.It Fn pmc_npmc
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Return the number of hardware PMCs present in a given CPU.
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.It Fn pmc_pmcinfo
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Return information about the state of a given CPU's PMCs.
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.It Fn pmc_width
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Determine the width of a hardware counter in bits.
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.El
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.It "x86 Architecture Specific API"
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.Bl -tag -width 6n -compact
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.It Fn pmc_get_msr
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Returns the processor model specific register number
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associated with
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.Fa pmc .
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Applications may then use the x86
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.Ic RDPMC
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instruction to directly read the contents of the PMC.
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.El
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.El
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.Ss Signal Handling Requirements
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Applications using PMCs are required to handle the following signals:
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.Bl -tag -width ".Dv SIGBUS"
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.It Dv SIGBUS
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When the
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.Xr hwpmc 4
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module is unloaded using
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.Xr kldunload 8 ,
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processes that have PMCs allocated to them will be sent a
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.Dv SIGBUS
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signal.
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.It Dv SIGIO
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The
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.Xr hwpmc 4
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driver will send a PMC owning process a
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.Dv SIGIO
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signal if:
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.Bl -bullet
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.It
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If any process-mode PMC allocated by it loses all its
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target processes.
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.It
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If the driver encounters an error when writing log data to a
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configured log file.
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This error may be retrieved by a subsequent call to
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.Fn pmc_flush_logfile .
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.El
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.El
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.Ss Typical Program Flow
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.Bl -enum
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.It
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An application would first invoke function
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.Fn pmc_init
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to allow the library to initialize itself.
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.It
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Signal handling would then be set up.
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.It
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Next the application would allocate the PMCs it desires using function
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.Fn pmc_allocate .
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.It
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Initial values for PMCs may be set using function
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.Fn pmc_set .
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.It
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If a log file is necessary for the PMCs to work, it would
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be configured using function
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.Fn pmc_configure_logfile .
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.It
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Process scope PMCs would then be attached to their target processes
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using function
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.Fn pmc_attach .
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.It
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The PMCs would then be started using function
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.Fn pmc_start .
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.It
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Once started, the values of counting PMCs may be read using function
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.Fn pmc_read .
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For PMCs that write events to the log file, this logged data would be
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read and parsed using the
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.Xr pmclog 3
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|
family of functions.
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|
.It
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|
PMCs are stopped using function
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.Fn pmc_stop ,
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and process scope PMCs are detached from their targets using
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function
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.Fn pmc_detach .
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.It
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Before the process exits, its may release its PMCs using function
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.Fn pmc_release .
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Any configured log file may be closed using function
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.Fn pmc_configure_logfile .
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.El
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|
.Sh EVENT SPECIFIERS
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Event specifiers are strings comprising of an event name, followed by
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optional parameters modifying the semantics of the hardware event
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being probed.
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Event names are PMC architecture dependent, but the PMC library defines
|
|
machine independent aliases for commonly used events.
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.Pp
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Event specifiers spellings are case-insensitive and space characters,
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periods, underscores and hyphens are considered equivalent to each other.
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|
Thus the event specifiers
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.Qq "Example Event" ,
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.Qq "example-event" ,
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and
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.Qq "EXAMPLE_EVENT"
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|
are equivalent.
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|
.Ss PMC Architecture Dependent Events
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|
PMC architecture dependent event specifiers are described in the
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|
following manual pages:
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|
.Bl -column " PMC_CLASS_TSC " "MANUAL PAGE "
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|
.It Em "PMC Class" Ta Em "Manual Page"
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|
.It Li PMC_CLASS_IAF Ta Xr pmc.iaf 3
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|
.It Li PMC_CLASS_IAP Ta Xr pmc.atom 3 , Xr pmc.core 3 , Xr pmc.core2 3
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.It Li PMC_CLASS_K7 Ta Xr pmc.k7 3
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.It Li PMC_CLASS_K8 Ta Xr pmc.k8 3
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.It Li PMC_CLASS_P4 Ta Xr pmc.p4 3
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.It Li PMC_CLASS_P5 Ta Xr pmc.p5 3
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.It Li PMC_CLASS_P6 Ta Xr pmc.p6 3
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.It Li PMC_CLASS_TSC Ta Xr pmc.tsc 3
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.El
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.Ss Event Name Aliases
|
|
Event name aliases are PMC-independent names for commonly used events.
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The following aliases are known to this version of the
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|
.Nm pmc
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library:
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.Bl -tag -width indent
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.It Li branches
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Measure the number of branches retired.
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.It Li branch-mispredicts
|
|
Measure the number of retired branches that were mispredicted.
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.It Li cycles
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|
Measure processor cycles.
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This event is implemented using the processor's Time Stamp Counter
|
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register.
|
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.It Li dc-misses
|
|
Measure the number of data cache misses.
|
|
.It Li ic-misses
|
|
Measure the number of instruction cache misses.
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|
.It Li instructions
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|
Measure the number of instructions retired.
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.It Li interrupts
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|
Measure the number of interrupts seen.
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.It Li unhalted-cycles
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|
Measure the number of cycles the processor is not in a halted
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or sleep state.
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.El
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.Sh COMPATIBILITY
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The interface between the
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.Nm pmc
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library and the
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.Xr hwpmc 4
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driver is intended to be private to the implementation and may
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change.
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In order to ease forward compatibility with future versions of the
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.Xr hwpmc 4
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driver, applications are urged to dynamically link with the
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.Nm pmc
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library.
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.Pp
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The
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.Nm pmc
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API is
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.Ud
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.Sh SEE ALSO
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.Xr pmc.atom 3 ,
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.Xr pmc.core 3 ,
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.Xr pmc.core2 3 ,
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.Xr pmc.haswell 3 ,
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.Xr pmc.haswelluc 3 ,
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.Xr pmc.haswellxeon 3 ,
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.Xr pmc.iaf 3 ,
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.Xr pmc.ivybridge 3 ,
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.Xr pmc.ivybridgexeon 3 ,
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.Xr pmc.k7 3 ,
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.Xr pmc.k8 3 ,
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.Xr pmc.mips24k 3 ,
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.Xr pmc.octeon 3 ,
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.Xr pmc.p4 3 ,
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.Xr pmc.p5 3 ,
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.Xr pmc.p6 3 ,
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.Xr pmc.sandybridge 3 ,
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.Xr pmc.sandybridgeuc 3 ,
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.Xr pmc.sandybridgexeon 3 ,
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.Xr pmc.soft 3 ,
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.Xr pmc.tsc 3 ,
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.Xr pmc.westmere 3 ,
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.Xr pmc.westmereuc 3 ,
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.Xr pmc.xscale 3 ,
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.Xr pmc_allocate 3 ,
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.Xr pmc_attach 3 ,
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.Xr pmc_capabilities 3 ,
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.Xr pmc_configure_logfile 3 ,
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.Xr pmc_disable 3 ,
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.Xr pmc_event_names_of_class 3 ,
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.Xr pmc_get_driver_stats 3 ,
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.Xr pmc_get_msr 3 ,
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.Xr pmc_init 3 ,
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.Xr pmc_name_of_capability 3 ,
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.Xr pmc_read 3 ,
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.Xr pmc_set 3 ,
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.Xr pmc_start 3 ,
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.Xr pmclog 3 ,
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.Xr hwpmc 4 ,
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.Xr pmccontrol 8 ,
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.Xr pmcstat 8
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.Sh HISTORY
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The
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.Nm pmc
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library first appeared in
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.Fx 6.0 .
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.Sh AUTHORS
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The
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.Lb libpmc
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library was written by
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.An Joseph Koshy Aq Mt jkoshy@FreeBSD.org .
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