321 lines
11 KiB
C
321 lines
11 KiB
C
/*-
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* Copyright (c) 2003-04 3ware, Inc.
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* Copyright (c) 2000 Michael Smith
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* Copyright (c) 2000 BSDi
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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/*
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* 3ware driver for 9000 series storage controllers.
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*
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* Author: Vinod Kashyap
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*/
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#define TWA_DRIVER_VERSION_STRING "2.50.02.012"
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#define TWA_REQUEST_TIMEOUT_PERIOD 60 /* seconds */
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#define TWA_MESSAGE_SOURCE_CONTROLLER_ERROR 3
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#define TWA_MESSAGE_SOURCE_CONTROLLER_EVENT 4
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#define TWA_MESSAGE_SOURCE_FREEBSD_DRIVER 6
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#define TWA_MESSAGE_SOURCE_FREEBSD_OS 9
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#define TWA_MALLOC_CLASS M_TWA
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/* Macros for bus-space calls. */
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#define TWA_READ_REGISTER(sc, offset) \
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(u_int32_t)bus_space_read_4(sc->twa_bus_tag, sc->twa_bus_handle, offset)
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#define TWA_WRITE_REGISTER(sc, offset, val) \
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bus_space_write_4(sc->twa_bus_tag, sc->twa_bus_handle, offset, (u_int32_t)val)
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/* Possible values of tr->tr_status. */
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#define TWA_CMD_SETUP 0x0 /* being assembled */
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#define TWA_CMD_BUSY 0x1 /* submitted to controller */
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#define TWA_CMD_PENDING 0x2 /* in pending queue */
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#define TWA_CMD_COMPLETE 0x3 /* completed by controller (maybe with error) */
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/* Possible values of tr->tr_flags. */
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#define TWA_CMD_DATA_IN (1<<0) /* read request */
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#define TWA_CMD_DATA_OUT (1<<1) /* write request */
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#define TWA_CMD_DATA_COPY_NEEDED (1<<2) /* data in ccb is misaligned, have to copy to/from private buffer */
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#define TWA_CMD_SLEEP_ON_REQUEST (1<<3) /* owner is sleeping on this command */
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#define TWA_CMD_MAPPED (1<<4) /* request has been mapped */
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#define TWA_CMD_IN_PROGRESS (1<<5) /* bus_dmamap_load returned EINPROGRESS */
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#define TWA_CMD_TIMER_SET (1<<6) /* request is being timed */
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/* Possible values of tr->tr_cmd_pkt_type. */
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#define TWA_CMD_PKT_TYPE_7K (1<<0)
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#define TWA_CMD_PKT_TYPE_9K (1<<1)
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#define TWA_CMD_PKT_TYPE_INTERNAL (1<<2)
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#define TWA_CMD_PKT_TYPE_IOCTL (1<<3)
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#define TWA_CMD_PKT_TYPE_EXTERNAL (1<<4)
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/* Possible values of sc->twa_state. */
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#define TWA_STATE_INTR_ENABLED (1<<0) /* interrupts have been enabled */
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#define TWA_STATE_SHUTDOWN (1<<1) /* controller is shut down */
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#define TWA_STATE_OPEN (1<<2) /* control device is open */
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#define TWA_STATE_SUSPEND (1<<3) /* controller is suspended */
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#define TWA_STATE_SIMQ_FROZEN (1<<4) /* simq frozen */
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/* Possible values of sc->twa_ioctl_lock.lock. */
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#define TWA_LOCK_FREE 0x0 /* lock is free */
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#define TWA_LOCK_HELD 0x1 /* lock is held */
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/* Error/AEN message structure. */
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struct twa_message {
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u_int32_t code;
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char *message;
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};
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#ifdef TWA_DEBUG
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struct twa_q_statistics {
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u_int32_t q_length;
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u_int32_t q_max;
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};
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#define TWAQ_FREE 0
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#define TWAQ_BUSY 1
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#define TWAQ_PENDING 2
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#define TWAQ_COMPLETE 3
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#define TWAQ_COUNT 4 /* total number of queues */
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#endif /* TWA_DEBUG */
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/* Driver's request packet. */
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struct twa_request {
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struct twa_command_packet *tr_command; /* ptr to cmd pkt submitted to controller */
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u_int32_t tr_request_id; /* request id for tracking with firmware */
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void *tr_data; /* ptr to data being passed to firmware */
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u_int32_t tr_length; /* length of buffer being passed to firmware */
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void *tr_real_data; /* ptr to, and length of data passed */
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u_int32_t tr_real_length; /* to us from above, in case a buffer copy
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was done due to non-compliance to
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alignment requirements */
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TAILQ_ENTRY(twa_request) tr_link; /* to link this request in a list */
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struct twa_softc *tr_sc; /* controller that owns us */
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u_int32_t tr_status; /* command status */
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u_int32_t tr_flags; /* request flags */
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u_int32_t tr_error; /* error encountered before request submission */
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u_int32_t tr_cmd_pkt_type;/* type of request */
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void *tr_private; /* request specific data to use during callback */
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void (*tr_callback)(struct twa_request *tr);/* callback handler */
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bus_addr_t tr_cmd_phys; /* physical address of command in controller space */
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bus_dmamap_t tr_buf_map; /* DMA map for data */
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} __attribute__ ((packed));
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/* Per-controller structure. */
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struct twa_softc {
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/* Request queues and arrays. */
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TAILQ_HEAD(, twa_request) twa_free; /* free request packets */
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TAILQ_HEAD(, twa_request) twa_busy; /* requests busy in the controller */
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TAILQ_HEAD(, twa_request) twa_pending; /* internal requests pending */
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TAILQ_HEAD(, twa_request) twa_complete; /* requests completed by firmware (not by us) */
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struct twa_request *twa_lookup[TWA_Q_LENGTH];/* requests indexed by request_id */
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struct twa_request *twa_req_buf;
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struct twa_command_packet *twa_cmd_pkt_buf;
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/* AEN handler fields. */
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struct twa_event_packet *twa_aen_queue[TWA_Q_LENGTH];/* circular queue of AENs from firmware */
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uint16_t working_srl; /* driver & firmware negotiated srl */
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uint16_t working_branch; /* branch # of the firmware that the driver is compatible with */
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uint16_t working_build; /* build # of the firmware that the driver is compatible with */
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u_int32_t twa_operating_mode; /* base mode/current mode */
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u_int32_t twa_aen_head; /* AEN queue head */
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u_int32_t twa_aen_tail; /* AEN queue tail */
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u_int32_t twa_current_sequence_id;/* index of the last event + 1 */
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u_int32_t twa_aen_queue_overflow; /* indicates if unretrieved events were overwritten */
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u_int32_t twa_aen_queue_wrapped; /* indicates if AEN queue ever wrapped */
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u_int32_t twa_wait_timeout; /* identifier for calling tsleep */
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/* Controller state. */
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u_int32_t twa_state;
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#ifdef TWA_DEBUG
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struct twa_q_statistics twa_qstats[TWAQ_COUNT]; /* queue statistics */
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#endif /* TWA_DEBUG */
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struct {
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u_int32_t lock; /* lock state */
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u_int32_t timeout;/* time at which the lock will become available,
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even if not released */
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} twa_ioctl_lock; /* lock for use by user applications, for synchronization
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between ioctl calls */
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device_t twa_bus_dev; /* bus device */
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struct cdev *twa_ctrl_dev; /* control device */
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struct resource *twa_io_res; /* register interface window */
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bus_space_handle_t twa_bus_handle; /* bus space handle */
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bus_space_tag_t twa_bus_tag; /* bus space tag */
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bus_dma_tag_t twa_parent_tag; /* parent DMA tag */
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bus_dma_tag_t twa_cmd_tag; /* cmd DMA tag */
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bus_dma_tag_t twa_buf_tag; /* data buffer DMA tag */
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bus_dmamap_t twa_cmd_map; /* DMA map for the array of cmd pkts */
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bus_addr_t twa_cmd_pkt_phys;/* phys addr of first of array of cmd pkts */
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struct resource *twa_irq_res; /* interrupt resource*/
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void *twa_intr_handle;/* interrupt handle */
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struct intr_config_hook twa_ich; /* delayed-startup hook */
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struct sysctl_ctx_list twa_sysctl_ctx;
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struct sysctl_oid *twa_sysctl_tree;
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struct cam_sim *twa_sim; /* sim for this controller */
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struct cam_path *twa_path; /* peripheral, path, tgt, lun
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associated with this controller */
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};
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/*
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* Queue primitives
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*/
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#ifdef TWA_DEBUG
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#define TWAQ_INIT(sc, qname) \
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do { \
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sc->twa_qstats[qname].q_length = 0; \
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sc->twa_qstats[qname].q_max = 0; \
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} while(0)
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#define TWAQ_ADD(sc, qname) \
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do { \
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struct twa_q_statistics *qs = &(sc)->twa_qstats[qname]; \
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\
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qs->q_length++; \
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if (qs->q_length > qs->q_max) \
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qs->q_max = qs->q_length; \
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} while(0)
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#define TWAQ_REMOVE(sc, qname) (sc)->twa_qstats[qname].q_length--
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#else /* TWA_DEBUG */
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#define TWAQ_INIT(sc, qname)
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#define TWAQ_ADD(sc, qname)
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#define TWAQ_REMOVE(sc, qname)
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#endif /* TWA_DEBUG */
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#define TWAQ_REQUEST_QUEUE(name, index) \
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static __inline void twa_initq_ ## name(struct twa_softc *sc) \
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{ \
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TAILQ_INIT(&sc->twa_ ## name); \
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TWAQ_INIT(sc, index); \
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} \
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static __inline void twa_enqueue_ ## name(struct twa_request *tr) \
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{ \
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int s; \
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\
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s = splcam(); \
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TAILQ_INSERT_TAIL(&tr->tr_sc->twa_ ## name, tr, tr_link); \
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TWAQ_ADD(tr->tr_sc, index); \
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splx(s); \
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} \
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static __inline void twa_requeue_ ## name(struct twa_request *tr) \
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{ \
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int s; \
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\
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s = splcam(); \
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TAILQ_INSERT_HEAD(&tr->tr_sc->twa_ ## name, tr, tr_link); \
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TWAQ_ADD(tr->tr_sc, index); \
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splx(s); \
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} \
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static __inline struct twa_request *twa_dequeue_ ## name(struct twa_softc *sc)\
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{ \
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struct twa_request *tr; \
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int s; \
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\
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s = splcam(); \
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if ((tr = TAILQ_FIRST(&sc->twa_ ## name)) != NULL) { \
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TAILQ_REMOVE(&sc->twa_ ## name, tr, tr_link); \
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TWAQ_REMOVE(sc, index); \
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} \
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splx(s); \
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return(tr); \
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} \
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static __inline void twa_remove_ ## name(struct twa_request *tr) \
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{ \
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int s; \
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\
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s = splcam(); \
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TAILQ_REMOVE(&tr->tr_sc->twa_ ## name, tr, tr_link); \
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TWAQ_REMOVE(tr->tr_sc, index); \
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splx(s); \
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}
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TWAQ_REQUEST_QUEUE(free, TWAQ_FREE)
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TWAQ_REQUEST_QUEUE(busy, TWAQ_BUSY)
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TWAQ_REQUEST_QUEUE(pending, TWAQ_PENDING)
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TWAQ_REQUEST_QUEUE(complete, TWAQ_COMPLETE)
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#ifdef TWA_DEBUG
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extern u_int8_t twa_dbg_level;
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extern u_int8_t twa_call_dbg_level;
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/* Printf with the bus device in question. */
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#define twa_dbg_dprint(dbg_level, sc, fmt, args...) \
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do { \
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if (dbg_level <= twa_dbg_level) \
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device_printf(sc->twa_bus_dev, \
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"%s: " fmt "\n", __func__ , ##args);\
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} while(0)
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#define twa_dbg_dprint_enter(dbg_level, sc) \
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do { \
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if (dbg_level <= twa_call_dbg_level) \
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device_printf(sc->twa_bus_dev, \
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"%s: entered.\n", __func__); \
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} while(0)
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#define twa_dbg_dprint_exit(dbg_level, sc) \
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do { \
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if (dbg_level <= twa_call_dbg_level) \
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device_printf(sc->twa_bus_dev, \
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"%s: exiting.\n", __func__); \
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} while(0)
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#define twa_dbg_print(dbg_level, fmt, args...) \
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do { \
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if (dbg_level <= twa_dbg_level) \
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printf("%s: " fmt "\n", __func__ , ##args);\
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} while(0)
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#else
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#define twa_dbg_dprint(dbg_level, sc, fmt, args...)
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#define twa_dbg_dprint_enter(dbg_level, sc)
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#define twa_dbg_dprint_exit(dbg_level, sc)
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#define twa_dbg_print(dbg_level, fmt, args...)
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#endif
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#define twa_printf(sc, fmt, args...) \
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device_printf(sc->twa_bus_dev, fmt, ##args)
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