82 lines
3.7 KiB
C
82 lines
3.7 KiB
C
/* OpenBSD: qsphyreg.h,v 1.2 1999/03/09 00:02:45 jason Exp */
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/* NetBSD: qsphyreg.h,v 1.1 1998/08/11 00:01:03 thorpej Exp */
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/* $FreeBSD$ */
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/*-
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* Copyright (c) 1998 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
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* NASA Ames Research Center.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _DEV_MII_QSPHYREG_H_
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#define _DEV_MII_QSPHYREG_H_
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/*
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* Register definitions for the Quality Semiconductor QS6612
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* Further documentation can be found at:
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* http://www.qualitysemi.com/products/network.html
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*/
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#define MII_QSPHY_MCTL 0x11 /* Mode control */
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#define MCTL_T4PRE 0x1000 /* 100baseT4 interface present */
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#define MCTL_BTEXT 0x0800 /* reduce 10baseT squelch level */
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#define MCTL_FACTTEST 0x0100 /* factory test mode */
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#define MCTL_PHYADDRMASK 0x00f8 /* PHY address */
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#define MCTL_FACTTEST2 0x0004 /* another factory test mode */
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#define MCTL_NLPDIS 0x0002 /* disable link pulse tx */
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#define MCTL_SQEDIS 0x0001 /* disable SQE */
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#define MII_QSPHY_ISRC 0x1d /* Interrupt source */
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#define MII_QSPHY_IMASK 0x1e /* Interrupt mask */
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#define IMASK_TLINTR 0x8000 /* ThunderLAN interrupt mode */
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#define IMASK_ANCPL 0x0040 /* autonegotiation complete */
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#define IMASK_RFD 0x0020 /* remote fault detected */
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#define IMASK_LD 0x0010 /* link down */
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#define IMASK_ANLPA 0x0008 /* autonegotiation LP ACK */
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#define IMASK_PDT 0x0004 /* parallel detection fault */
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#define IMASK_ANPR 0x0002 /* autonegotiation page received */
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#define IMASK_REF 0x0001 /* receive error counter full */
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#define MII_QSPHY_PCTL 0x1f /* PHY control */
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#define PCTL_RXERDIS 0x2000 /* receive error counter disable */
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#define PCTL_ANC 0x1000 /* autonegotiation complete */
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#define PCTL_RLBEN 0x0200 /* remote coopback enable */
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#define PCTL_DCREN 0x0100 /* DC restoration enable */
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#define PCTL_4B5BEN 0x0040 /* 4b/5b encoding */
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#define PCTL_PHYISO 0x0020 /* isolate PHY */
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#define PCTL_OPMASK 0x001c /* operation mode mask */
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#define PCTL_AN 0x0000 /* autonegotiation in-progress */
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#define PCTL_10_T 0x0004 /* 10baseT */
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#define PCTL_100_TX 0x0008 /* 100baseTX */
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#define PCTL_100_T4 0x0010 /* 100baseT4 */
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#define PCTL_10_T_FDX 0x0014 /* 10baseT-FDX */
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#define PCTL_100_TX_FDX 0x0018 /* 100baseTX-FDX */
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#define PCTL_MLT3DIS 0x0002 /* disable MLT3 */
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#define PCTL_SRCDIS 0x0001 /* disable scrambling */
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#endif /* _DEV_MII_QSPHYREG_H_ */
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