f11c7f6305
The isci driver is for the integrated SAS controller in the Intel C600 (Patsburg) chipset. Source files in sys/dev/isci directory are FreeBSD-specific, and sys/dev/isci/scil subdirectory contains an OS-agnostic library (SCIL) published by Intel to control the SAS controller. This library is used primarily as-is in this driver, with some post-processing to better integrate into the kernel build environment. isci.4 and a README in the sys/dev/isci directory contain a few additional details. This driver is only built for amd64 and i386 targets. Sponsored by: Intel Reviewed by: scottl Approved by: scottl
264 lines
11 KiB
C
264 lines
11 KiB
C
/*-
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* This file is provided under a dual BSD/GPLv2 license. When using or
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* redistributing this file, you may do so under either license.
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*
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* GPL LICENSE SUMMARY
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*
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* Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
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* The full GNU General Public License is included in this distribution
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* in the file called LICENSE.GPL.
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*
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* BSD LICENSE
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*
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* Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#ifndef _SCU_COMPLETION_CODES_HEADER_
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#define _SCU_COMPLETION_CODES_HEADER_
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/**
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* @file
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*
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* @brief This file contains the constants and macros for the SCU hardware
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* completion codes.
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*/
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#ifdef __cplusplus
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extern "C" {
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#endif // __cplusplus
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#define SCU_COMPLETION_TYPE_SHIFT 28
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#define SCU_COMPLETION_TYPE_MASK 0x70000000
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/**
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* This macro constructs an SCU completion type
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*/
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#define SCU_COMPLETION_TYPE(type) \
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((U32)(type) << SCU_COMPLETION_TYPE_SHIFT)
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/**
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* These macros contain the SCU completion types
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*
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* @name SCU_COMPLETION_TYPE
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*/
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/*@}*/
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#define SCU_COMPLETION_TYPE_TASK SCU_COMPLETION_TYPE(0)
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#define SCU_COMPLETION_TYPE_SDMA SCU_COMPLETION_TYPE(1)
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#define SCU_COMPLETION_TYPE_UFI SCU_COMPLETION_TYPE(2)
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#define SCU_COMPLETION_TYPE_EVENT SCU_COMPLETION_TYPE(3)
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#define SCU_COMPLETION_TYPE_NOTIFY SCU_COMPLETION_TYPE(4)
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/*@}*/
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/**
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* These constants provide the shift and mask values for the various parts of
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* an SCU completion code.
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*/
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#define SCU_COMPLETION_STATUS_MASK 0x0FFC0000
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#define SCU_COMPLETION_TL_STATUS_MASK 0x0FC00000
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#define SCU_COMPLETION_TL_STATUS_SHIFT 22
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#define SCU_COMPLETION_SDMA_STATUS_MASK 0x003C0000
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#define SCU_COMPLETION_PEG_MASK 0x00010000
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#define SCU_COMPLETION_PORT_MASK 0x00007000
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#define SCU_COMPLETION_PE_MASK SCU_COMPLETION_PORT_MASK
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#define SCU_COMPLETION_PE_SHIFT 12
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#define SCU_COMPLETION_INDEX_MASK 0x00000FFF
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/**
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* This macro returns the SCU completion type.
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*/
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#define SCU_GET_COMPLETION_TYPE(completion_code) \
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((completion_code) & SCU_COMPLETION_TYPE_MASK)
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/**
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* This macro returns the SCU completion status.
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*/
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#define SCU_GET_COMPLETION_STATUS(completion_code) \
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((completion_code) & SCU_COMPLETION_STATUS_MASK)
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/**
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* This macro returns the transport layer completion status.
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*/
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#define SCU_GET_COMPLETION_TL_STATUS(completion_code) \
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((completion_code) & SCU_COMPLETION_TL_STATUS_MASK)
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/**
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* This macro takes a completion code and performs the shift and mask
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* operations to turn it into a completion code that can be compared to a
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* SCU_GET_COMPLETION_TL_STATUS.
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*/
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#define SCU_MAKE_COMPLETION_STATUS(completion_code) \
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((U32)(completion_code) << SCU_COMPLETION_TL_STATUS_SHIFT)
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/**
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* This macro takes a SCU_GET_COMPLETION_TL_STATUS and normalizes it for a
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* return code.
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*/
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#define SCU_NORMALIZE_COMPLETION_STATUS(completion_code) \
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( \
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((U32)((completion_code) & SCU_COMPLETION_TL_STATUS_MASK)) \
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>> SCU_COMPLETION_TL_STATUS_SHIFT \
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)
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/**
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* This macro returns the SDMA completion status.
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*/
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#define SCU_GET_COMPLETION_SDMA_STATUS(completion_code) \
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((completion_code) & SCU_COMPLETION_SDMA_STATUS_MASK)
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/**
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* This macro returns the Protocol Engine Group from the completion code.
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*/
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#define SCU_GET_COMPLETION_PEG(completion_code) \
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((completion_code) & SCU_COMPLETION_PEG_MASK)
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/**
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* This macro reuturns the logical port index from the completion code.
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*/
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#define SCU_GET_COMPLETION_PORT(completion_code) \
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((completion_code) & SCU_COMPLETION_PORT_MASK)
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/**
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* This macro returns the PE index from the completion code.
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*/
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#define SCU_GET_PROTOCOL_ENGINE_INDEX(completion_code) \
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(((U32)((completion_code) & SCU_COMPLETION_PE_MASK)) >> SCU_COMPLETION_PE_SHIFT)
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/**
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* This macro returns the index of the completion which is either a TCi or an
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* RNi depending on the completion type.
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*/
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#define SCU_GET_COMPLETION_INDEX(completion_code) \
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((completion_code) & SCU_COMPLETION_INDEX_MASK)
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#define SCU_UNSOLICITED_FRAME_MASK 0x0FFF0000
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#define SCU_UNSOLICITED_FRAME_SHIFT 16
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/**
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* This macro returns a normalized frame index from an unsolicited frame
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* completion.
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*/
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#define SCU_GET_FRAME_INDEX(completion_code) \
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( \
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((U32)((completion_code) & SCU_UNSOLICITED_FRAME_MASK)) \
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>> SCU_UNSOLICITED_FRAME_SHIFT \
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)
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#define SCU_UNSOLICITED_FRAME_ERROR_MASK 0x00008000
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/**
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* This macro returns a zero (0) value if there is no frame error otherwise
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* it returns non-zero (!0).
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*/
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#define SCU_GET_FRAME_ERROR(completion_code) \
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((completion_code) & SCU_UNSOLICITED_FRAME_ERROR_MASK)
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/**
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* These constants represent normalized completion codes which must be shifted
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* 18 bits to match it with the hardware completion code. In a 16-bit compiler,
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* immediate constants are 16-bit values (the size of an int). If we shift those
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* by 18 bits, we completely lose the value. To ensure the value is a 32-bit
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* value like we want, each immediate value must be cast to a U32.
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*/
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#define SCU_TASK_DONE_GOOD ((U32)0x00)
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#define SCU_TASK_DONE_CRC_ERR ((U32)0x14)
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#define SCU_TASK_DONE_CHECK_RESPONSE ((U32)0x14)
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#define SCU_TASK_DONE_GEN_RESPONSE ((U32)0x15)
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#define SCU_TASK_DONE_NAK_CMD_ERR ((U32)0x16)
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#define SCU_TASK_DONE_CMD_LL_R_ERR ((U32)0x16)
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#define SCU_TASK_DONE_LL_R_ERR ((U32)0x17)
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#define SCU_TASK_DONE_ACK_NAK_TO ((U32)0x17)
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#define SCU_TASK_DONE_LL_PERR ((U32)0x18)
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#define SCU_TASK_DONE_LL_SY_TERM ((U32)0x19)
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#define SCU_TASK_DONE_NAK_ERR ((U32)0x19)
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#define SCU_TASK_DONE_LL_LF_TERM ((U32)0x1A)
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#define SCU_TASK_DONE_DATA_LEN_ERR ((U32)0x1A)
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#define SCU_TASK_DONE_LL_CL_TERM ((U32)0x1B)
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#define SCU_TASK_DONE_LL_ABORT_ERR ((U32)0x1B)
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#define SCU_TASK_DONE_SEQ_INV_TYPE ((U32)0x1C)
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#define SCU_TASK_DONE_UNEXP_XR ((U32)0x1C)
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#define SCU_TASK_DONE_INV_FIS_TYPE ((U32)0x1D)
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#define SCU_TASK_DONE_XR_IU_LEN_ERR ((U32)0x1D)
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#define SCU_TASK_DONE_INV_FIS_LEN ((U32)0x1E)
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#define SCU_TASK_DONE_XR_WD_LEN ((U32)0x1E)
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#define SCU_TASK_DONE_SDMA_ERR ((U32)0x1F)
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#define SCU_TASK_DONE_OFFSET_ERR ((U32)0x20)
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#define SCU_TASK_DONE_MAX_PLD_ERR ((U32)0x21)
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#define SCU_TASK_DONE_EXCESS_DATA ((U32)0x22)
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#define SCU_TASK_DONE_LF_ERR ((U32)0x23)
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#define SCU_TASK_DONE_UNEXP_FIS ((U32)0x24)
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#define SCU_TASK_DONE_UNEXP_RESP ((U32)0x24)
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#define SCU_TASK_DONE_EARLY_RESP ((U32)0x25)
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#define SCU_TASK_DONE_SMP_RESP_TO_ERR ((U32)0x26)
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#define SCU_TASK_DONE_DMASETUP_DIRERR ((U32)0x27)
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#define SCU_TASK_DONE_SMP_UFI_ERR ((U32)0x27)
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#define SCU_TASK_DONE_XFERCNT_ERR ((U32)0x28)
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#define SCU_TASK_DONE_SMP_FRM_TYPE_ERR ((U32)0x28)
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#define SCU_TASK_DONE_SMP_LL_RX_ERR ((U32)0x29)
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#define SCU_TASK_DONE_RESP_LEN_ERR ((U32)0x2A)
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#define SCU_TASK_DONE_UNEXP_DATA ((U32)0x2B)
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#define SCU_TASK_DONE_OPEN_FAIL ((U32)0x2C)
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#define SCU_TASK_DONE_UNEXP_SDBFIS ((U32)0x2D)
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#define SCU_TASK_DONE_REG_ERR ((U32)0x2E)
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#define SCU_TASK_DONE_SDB_ERR ((U32)0x2F)
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#define SCU_TASK_DONE_TASK_ABORT ((U32)0x30)
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#if defined(PBG_HBA_BETA_BUILD)
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#define SCU_TASK_DONE_CMD_SDMA_ERR ((U32)0x32)
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#define SCU_TASK_DONE_CMD_LL_ABORT_ERR ((U32)0x33)
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#endif
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#define SCU_TASK_OPEN_REJECT_WRONG_DESTINATION ((U32)0x34)
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#define SCU_TASK_OPEN_REJECT_RESERVED_ABANDON_1 ((U32)0x35)
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#define SCU_TASK_OPEN_REJECT_RESERVED_ABANDON_2 ((U32)0x36)
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#define SCU_TASK_OPEN_REJECT_RESERVED_ABANDON_3 ((U32)0x37)
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#define SCU_TASK_OPEN_REJECT_BAD_DESTINATION ((U32)0x38)
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#define SCU_TASK_OPEN_REJECT_ZONE_VIOLATION ((U32)0x39)
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#define SCU_TASK_DONE_VIIT_ENTRY_NV ((U32)0x3A)
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#define SCU_TASK_DONE_IIT_ENTRY_NV ((U32)0x3B)
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#define SCU_TASK_DONE_RNCNV_OUTBOUND ((U32)0x3C)
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#define SCU_TASK_OPEN_REJECT_STP_RESOURCES_BUSY ((U32)0x3D)
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#define SCU_TASK_OPEN_REJECT_PROTOCOL_NOT_SUPPORTED ((U32)0x3E)
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#define SCU_TASK_OPEN_REJECT_CONNECTION_RATE_NOT_SUPPORTED ((U32)0x3F)
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#ifdef __cplusplus
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}
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#endif // __cplusplus
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#endif // _SCU_COMPLETION_CODES_HEADER_
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