148 lines
4.1 KiB
C
148 lines
4.1 KiB
C
/*
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* Copyright (c) 1994, 1995, 1996. FreeBSD(98) porting team.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer as
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* the first lines of this file unmodified.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#ifndef __PC98_PC98_30LINE_H__
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#define __PC98_PC98_30LINE_H__
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#include <pc98/pc98/module.h>
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#ifndef LINE30_ROW
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#define LINE30_ROW 30
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#endif
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#define _CR 80
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#ifndef _VS
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#define _VS 2
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#endif
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#ifndef _HS
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#define _HS 1 + 1
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#endif
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#ifndef _HFP
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#define _HFP 3 + 1
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#endif
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#ifndef _HBP
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#define _HBP 14 + 1
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#endif
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#ifndef _VFP
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#define _VFP 11
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#endif
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#ifndef _VBP
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#define _VBP 44
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#endif
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#define _LF LINE30_ROW*16
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#define _GDC_RESET 0x00
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#define _GDC_SYNC 0x0e
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#define _GDC_MASTER 0x6f
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#define _GDC_SLAVE 0x6e
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#define _GDC_START 0x0d
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#define _GDC_STOP 0x0c
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#define _GDC_SCROLL 0x70
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#define _GDC_PITCH 0x47
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#define GDC_CR 0
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#define GDC_VS 1
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#define GDC_HS 2
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#define GDC_HFP 3
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#define GDC_HBP 4
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#define GDC_VFP 5
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#define GDC_VBP 6
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#define GDC_LF 7
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#define _24KHZ 0
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#define _31KHZ 1
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#define _2_5MHZ 0
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#define _5MHZ 1
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#define _25L 0
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#define _30L 1
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#define T25_G400 0
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#define T30_G400 1
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#define T30_G480 2
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static void master_gdc_cmd(unsigned int);
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static void master_gdc_prm(unsigned int);
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static void master_gdc_word_prm(unsigned int);
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#ifdef LINE30
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static void master_gdc_fifo_empty(void);
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#endif
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static void master_gdc_wait_vsync(void);
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static void gdc_cmd(unsigned int);
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#ifdef LINE30
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static void gdc_prm(unsigned int);
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static void gdc_word_prm(unsigned int);
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static void gdc_fifo_empty(void);
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#endif
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static void gdc_wait_vsync(void);
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#ifdef LINE30
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static int check_gdc_clock(void);
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static int gdc_INFO = _25L;
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#endif
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static int gdc_FH = _24KHZ;
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static void initialize_gdc(unsigned int, int);
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#ifdef LINE30
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static unsigned int master_param[2][2][8] = {
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{{78, 8, 7, 9, 7, 7, 25, 400}, /* 400/24k */
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{_CR-2, _VS, _HS-1, _HFP-1, _HBP-1, _VFP, _VBP, _LF}}, /* 480/24k */
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{{78, 2, 7, 3, 7, 13, 34, 400}, /* 400/31k */
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{78, 2, 11, 3, 3, 6, 37, 480}}}; /* 480/31k */
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static unsigned int slave_param[2][6][8] = {
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{{38, 8, 3, 4, 3, 7, 25, 400}, /* normal */
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{78, 8, 7, 9, 7, 7, 25, 400},
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{_CR/2-2, _VS, (_HS)/2-1, (_HFP)/2-1, (_HBP)/2-1,
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_VFP+(_LF-400)/2+8, _VBP+(_LF-400)/2-8, 400}, /* 30 & 400 */
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{_CR-2, _VS, _HS-1, _HFP-1, _HBP-1,
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_VFP+(_LF-400)/2+8, _VBP+(_LF-400)/2-8, 400},
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{_CR/2-2, _VS, (_HS)/2-1, (_HFP)/2-1, (_HBP)/2-1,
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_VFP, _VBP, _LF}, /* 30 & 480 */
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{_CR-2, _VS, _HS-1, _HFP-1, _HBP-1, _VFP, _VBP, _LF}},
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{{38, 2, 3, 1, 3, 13, 34, 400}, /* normal */
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{78, 2, 7, 3, 7, 13, 34, 400},
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{38, 2, 5, 1, 1, 6+48, 37+32, 400}, /* 30 & 400 */
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{78, 2, 11, 3, 3, 6+48, 37+32, 400},
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{38, 2, 5, 1, 1, 6, 37, 480}, /* 30 & 480 */
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{78, 2, 11, 3, 3, 6, 37, 480}}};
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static int SlavePCH[2] = {40,80};
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static int MasterPCH = 80;
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static int SlaveScrlLF[3] = {400,400,_LF};
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#endif
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#endif /* __PC98_PC98_30LINE_H__ */
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