127e4d9524
Driver for tbg clocks. Read reference frequency from parent and modify it depending on parameters read from register. Reviewed by: manu Obtained from: Semihalf Differential revision: https://reviews.freebsd.org/D32293
227 lines
5.7 KiB
C
227 lines
5.7 KiB
C
/*-
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* SPDX-License-Identifier: BSD-2-Clause-FreeBSD
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*
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* Copyright (c) 2021 Semihalf.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/bus.h>
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#include <sys/kernel.h>
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#include <sys/module.h>
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#include <sys/rman.h>
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#include <machine/bus.h>
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#include <dev/extres/clk/clk.h>
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#include <dev/ofw/ofw_bus_subr.h>
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#include "clkdev_if.h"
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#include "a37x0_tbg_pll.h"
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#define NUM_TBG 4
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#define TBG_CTRL0 0x4
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#define TBG_CTRL1 0x8
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#define TBG_CTRL7 0x20
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#define TBG_CTRL8 0x30
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#define TBG_MASK 0x1FF
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#define TBG_A_REFDIV 0
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#define TBG_B_REFDIV 16
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#define TBG_A_FBDIV 2
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#define TBG_B_FBDIV 18
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#define TBG_A_VCODIV_SEL 0
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#define TBG_B_VCODIV_SEL 16
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#define TBG_A_VCODIV_DIFF 1
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#define TBG_B_VCODIV_DIFF 17
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struct a37x0_tbg_softc {
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device_t dev;
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struct clkdom *clkdom;
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struct resource *res;
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};
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static struct resource_spec a37x0_tbg_clk_spec[] = {
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{ SYS_RES_MEMORY, 0, RF_ACTIVE },
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{ -1, 0 }
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};
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struct a37x0_tbg_def {
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char *name;
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uint32_t refdiv_shift;
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uint32_t fbdiv_shift;
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uint32_t vcodiv_offset;
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uint32_t vcodiv_shift;
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uint32_t tbg_bypass_en;
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};
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static const struct a37x0_tbg_def tbg[NUM_TBG] = {
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{"TBG-A-P", TBG_A_REFDIV, TBG_A_FBDIV, TBG_CTRL8, TBG_A_VCODIV_DIFF, 9},
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{"TBG-B-P", TBG_B_REFDIV, TBG_B_FBDIV, TBG_CTRL8,
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TBG_B_VCODIV_DIFF, 25},
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{"TBG-A-S", TBG_A_REFDIV, TBG_A_FBDIV, TBG_CTRL1, TBG_A_VCODIV_SEL, 9},
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{"TBG-B-S", TBG_B_REFDIV, TBG_B_FBDIV, TBG_CTRL1, TBG_B_VCODIV_SEL, 25}
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};
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static devclass_t a37x0_tbg_devclass;
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static int a37x0_tbg_read_4(device_t, bus_addr_t, uint32_t *);
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static int a37x0_tbg_attach(device_t);
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static int a37x0_tbg_detach(device_t);
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static int a37x0_tbg_probe(device_t);
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static device_method_t a37x0_tbg_methods [] = {
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DEVMETHOD(device_attach, a37x0_tbg_attach),
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DEVMETHOD(device_detach, a37x0_tbg_detach),
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DEVMETHOD(device_probe, a37x0_tbg_probe),
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DEVMETHOD(clkdev_read_4, a37x0_tbg_read_4),
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DEVMETHOD_END
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};
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static driver_t a37x0_tbg_driver = {
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"a37x0_tbg",
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a37x0_tbg_methods,
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sizeof(struct a37x0_tbg_softc)
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};
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EARLY_DRIVER_MODULE(a37x0_tbg, simplebus, a37x0_tbg_driver,
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a37x0_tbg_devclass, 0, 0, BUS_PASS_TIMER + BUS_PASS_ORDER_MIDDLE);
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static int
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a37x0_tbg_read_4(device_t dev, bus_addr_t offset, uint32_t *val)
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{
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struct a37x0_tbg_softc *sc;
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sc = device_get_softc(dev);
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*val = bus_read_4(sc->res, offset);
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return (0);
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}
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static int
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a37x0_tbg_attach(device_t dev)
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{
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struct a37x0_tbg_pll_clk_def def;
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struct a37x0_tbg_softc *sc;
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const char *clkname;
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int error, i;
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phandle_t node;
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clk_t clock;
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sc = device_get_softc(dev);
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node = ofw_bus_get_node(dev);
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sc->dev = dev;
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if (bus_alloc_resources(dev, a37x0_tbg_clk_spec, &sc->res) != 0) {
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device_printf(dev, "Cannot allocate resources\n");
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return (ENXIO);
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}
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sc->clkdom = clkdom_create(dev);
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if (sc->clkdom == NULL) {
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device_printf(dev, "Cannot create clock domain.\n");
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return (ENXIO);
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}
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error = clk_get_by_ofw_index(dev, node, 0, &clock);
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if (error != 0) {
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device_printf(dev, "Cannot find clock parent\n");
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bus_release_resources(dev, a37x0_tbg_clk_spec, &sc->res);
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return (error);
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}
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clkname = clk_get_name(clock);
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for (i = 0; i < NUM_TBG; i++) {
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def.clkdef.parent_names = &clkname;
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def.clkdef.parent_cnt = 1;
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def.clkdef.id = i;
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def.clkdef.name = tbg[i].name;
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def.vcodiv.offset = tbg[i].vcodiv_offset;
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def.vcodiv.shift = tbg[i].vcodiv_shift;
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def.refdiv.offset = TBG_CTRL7;
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def.refdiv.shift = tbg[i].refdiv_shift;
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def.fbdiv.offset = TBG_CTRL0;
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def.fbdiv.shift = tbg[i].fbdiv_shift;
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def.vcodiv.mask = def.refdiv.mask = def.fbdiv.mask = TBG_MASK;
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def.tbg_bypass.offset = TBG_CTRL1;
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def.tbg_bypass.shift = tbg[i].tbg_bypass_en;
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def.tbg_bypass.mask = 0x1;
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error = a37x0_tbg_pll_clk_register(sc->clkdom, &def);
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if (error) {
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device_printf(dev, "Cannot register clock node\n");
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bus_release_resources(dev, a37x0_tbg_clk_spec,
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&sc->res);
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return (ENXIO);
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}
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}
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error = clkdom_finit(sc->clkdom);
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if (error) {
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device_printf(dev,
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"Cannot finalize clock domain intialization\n");
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bus_release_resources(dev, a37x0_tbg_clk_spec, &sc->res);
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return (ENXIO);
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}
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if (bootverbose)
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clkdom_dump(sc->clkdom);
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return (0);
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}
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static int
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a37x0_tbg_probe(device_t dev)
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{
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if (!ofw_bus_status_okay(dev))
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return (ENXIO);
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if (!ofw_bus_is_compatible(dev, "marvell,armada-3700-tbg-clock"))
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return (ENXIO);
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device_set_desc(dev, "Marvell Armada 3700 time base generators");
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return (BUS_PROBE_DEFAULT);
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}
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static int
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a37x0_tbg_detach(device_t dev)
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{
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return (EBUSY);
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}
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