623 lines
19 KiB
C
623 lines
19 KiB
C
/*-
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* Copyright (c) 2006 IronPort Systems
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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/*-
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* Copyright (c) 2007 LSI Corp.
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* Copyright (c) 2007 Rajesh Prabhakaran.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#ifndef _MFIVAR_H
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#define _MFIVAR_H
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/lock.h>
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#include <sys/sx.h>
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#include <sys/types.h>
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#include <sys/taskqueue.h>
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#include "opt_mfi.h"
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/*
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* SCSI structures and definitions are used from here, but no linking
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* requirements are made to CAM.
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*/
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#include <cam/scsi/scsi_all.h>
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struct mfi_hwcomms {
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uint32_t hw_pi;
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uint32_t hw_ci;
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uint32_t hw_reply_q[1];
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};
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#define MEGASAS_MAX_NAME 32
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#define MEGASAS_VERSION "4.23"
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struct mfi_softc;
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struct disk;
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struct ccb_hdr;
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struct mfi_command {
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TAILQ_ENTRY(mfi_command) cm_link;
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time_t cm_timestamp;
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struct mfi_softc *cm_sc;
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union mfi_frame *cm_frame;
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bus_addr_t cm_frame_busaddr;
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struct mfi_sense *cm_sense;
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bus_addr_t cm_sense_busaddr;
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bus_dmamap_t cm_dmamap;
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union mfi_sgl *cm_sg;
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void *cm_data;
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int cm_len;
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int cm_stp_len;
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int cm_total_frame_size;
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int cm_extra_frames;
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int cm_flags;
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#define MFI_CMD_MAPPED (1<<0)
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#define MFI_CMD_DATAIN (1<<1)
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#define MFI_CMD_DATAOUT (1<<2)
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#define MFI_CMD_COMPLETED (1<<3)
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#define MFI_CMD_POLLED (1<<4)
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#define MFI_ON_MFIQ_FREE (1<<5)
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#define MFI_ON_MFIQ_READY (1<<6)
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#define MFI_ON_MFIQ_BUSY (1<<7)
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#define MFI_ON_MFIQ_MASK ((1<<5)|(1<<6)|(1<<7))
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#define MFI_CMD_SCSI (1<<8)
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uint8_t retry_for_fw_reset;
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void (* cm_complete)(struct mfi_command *cm);
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void *cm_private;
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int cm_index;
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int cm_error;
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};
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struct mfi_disk {
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TAILQ_ENTRY(mfi_disk) ld_link;
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device_t ld_dev;
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int ld_id;
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int ld_unit;
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struct mfi_softc *ld_controller;
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struct mfi_ld_info *ld_info;
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struct disk *ld_disk;
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int ld_flags;
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#define MFI_DISK_FLAGS_OPEN 0x01
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#define MFI_DISK_FLAGS_DISABLED 0x02
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};
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struct mfi_disk_pending {
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TAILQ_ENTRY(mfi_disk_pending) ld_link;
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int ld_id;
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};
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struct mfi_system_pd {
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TAILQ_ENTRY(mfi_system_pd) pd_link;
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device_t pd_dev;
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int pd_id;
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int pd_unit;
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struct mfi_softc *pd_controller;
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struct mfi_pd_info *pd_info;
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struct disk *pd_disk;
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int pd_flags;
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};
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struct mfi_system_pending {
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TAILQ_ENTRY(mfi_system_pending) pd_link;
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int pd_id;
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};
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struct mfi_evt_queue_elm {
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TAILQ_ENTRY(mfi_evt_queue_elm) link;
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struct mfi_evt_detail detail;
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};
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struct mfi_aen {
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TAILQ_ENTRY(mfi_aen) aen_link;
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struct proc *p;
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};
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struct mfi_skinny_dma_info {
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bus_dma_tag_t dmat[514];
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bus_dmamap_t dmamap[514];
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uint32_t mem[514];
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int noofmaps;
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};
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struct megasas_sge
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{
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bus_addr_t phys_addr;
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uint32_t length;
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};
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struct mfi_cmd_tbolt;
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struct mfi_softc {
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device_t mfi_dev;
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int mfi_flags;
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#define MFI_FLAGS_SG64 (1<<0)
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#define MFI_FLAGS_QFRZN (1<<1)
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#define MFI_FLAGS_OPEN (1<<2)
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#define MFI_FLAGS_STOP (1<<3)
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#define MFI_FLAGS_1064R (1<<4)
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#define MFI_FLAGS_1078 (1<<5)
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#define MFI_FLAGS_GEN2 (1<<6)
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#define MFI_FLAGS_SKINNY (1<<7)
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#define MFI_FLAGS_TBOLT (1<<8)
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// Start: LSIP200113393
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bus_dma_tag_t verbuf_h_dmat;
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bus_dmamap_t verbuf_h_dmamap;
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bus_addr_t verbuf_h_busaddr;
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uint32_t *verbuf;
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void *kbuff_arr[MAX_IOCTL_SGE];
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bus_dma_tag_t mfi_kbuff_arr_dmat[2];
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bus_dmamap_t mfi_kbuff_arr_dmamap[2];
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bus_addr_t mfi_kbuff_arr_busaddr[2];
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struct mfi_hwcomms *mfi_comms;
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TAILQ_HEAD(,mfi_command) mfi_free;
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TAILQ_HEAD(,mfi_command) mfi_ready;
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TAILQ_HEAD(BUSYQ,mfi_command) mfi_busy;
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struct bio_queue_head mfi_bioq;
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struct mfi_qstat mfi_qstat[MFIQ_COUNT];
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struct resource *mfi_regs_resource;
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bus_space_handle_t mfi_bhandle;
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bus_space_tag_t mfi_btag;
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int mfi_regs_rid;
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bus_dma_tag_t mfi_parent_dmat;
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bus_dma_tag_t mfi_buffer_dmat;
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bus_dma_tag_t mfi_comms_dmat;
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bus_dmamap_t mfi_comms_dmamap;
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bus_addr_t mfi_comms_busaddr;
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bus_dma_tag_t mfi_frames_dmat;
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bus_dmamap_t mfi_frames_dmamap;
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bus_addr_t mfi_frames_busaddr;
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union mfi_frame *mfi_frames;
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bus_dma_tag_t mfi_tb_init_dmat;
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bus_dmamap_t mfi_tb_init_dmamap;
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bus_addr_t mfi_tb_init_busaddr;
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bus_addr_t mfi_tb_ioc_init_busaddr;
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union mfi_frame *mfi_tb_init;
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TAILQ_HEAD(,mfi_evt_queue_elm) mfi_evt_queue;
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struct task mfi_evt_task;
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struct task mfi_map_sync_task;
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TAILQ_HEAD(,mfi_aen) mfi_aen_pids;
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struct mfi_command *mfi_aen_cm;
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struct mfi_command *mfi_skinny_cm;
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struct mfi_command *mfi_map_sync_cm;
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int cm_aen_abort;
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int cm_map_abort;
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uint32_t mfi_aen_triggered;
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uint32_t mfi_poll_waiting;
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uint32_t mfi_boot_seq_num;
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struct selinfo mfi_select;
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int mfi_delete_busy_volumes;
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int mfi_keep_deleted_volumes;
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int mfi_detaching;
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bus_dma_tag_t mfi_sense_dmat;
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bus_dmamap_t mfi_sense_dmamap;
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bus_addr_t mfi_sense_busaddr;
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struct mfi_sense *mfi_sense;
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struct resource *mfi_irq;
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void *mfi_intr;
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int mfi_irq_rid;
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struct intr_config_hook mfi_ich;
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eventhandler_tag eh;
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/* OCR flags */
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uint8_t adpreset;
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uint8_t issuepend_done;
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uint8_t disableOnlineCtrlReset;
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uint32_t mfiStatus;
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uint32_t last_seq_num;
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uint32_t volatile hw_crit_error;
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/*
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* Allocation for the command array. Used as an indexable array to
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* recover completed commands.
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*/
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struct mfi_command *mfi_commands;
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/*
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* How many commands were actually allocated
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*/
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int mfi_total_cmds;
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/*
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* How many commands the firmware can handle. Also how big the reply
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* queue is, minus 1.
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*/
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int mfi_max_fw_cmds;
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/*
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* How many S/G elements we'll ever actually use
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*/
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int mfi_max_sge;
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/*
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* How many bytes a compound frame is, including all of the extra frames
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* that are used for S/G elements.
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*/
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int mfi_cmd_size;
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/*
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* How large an S/G element is. Used to calculate the number of single
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* frames in a command.
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*/
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int mfi_sge_size;
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/*
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* Max number of sectors that the firmware allows
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*/
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uint32_t mfi_max_io;
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TAILQ_HEAD(,mfi_disk) mfi_ld_tqh;
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TAILQ_HEAD(,mfi_system_pd) mfi_syspd_tqh;
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TAILQ_HEAD(,mfi_disk_pending) mfi_ld_pend_tqh;
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TAILQ_HEAD(,mfi_system_pending) mfi_syspd_pend_tqh;
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eventhandler_tag mfi_eh;
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struct cdev *mfi_cdev;
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TAILQ_HEAD(, ccb_hdr) mfi_cam_ccbq;
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struct mfi_command * (* mfi_cam_start)(void *);
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void (*mfi_cam_rescan_cb)(struct mfi_softc *,
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uint32_t);
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struct callout mfi_watchdog_callout;
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struct mtx mfi_io_lock;
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struct sx mfi_config_lock;
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/* Controller type specific interfaces */
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void (*mfi_enable_intr)(struct mfi_softc *sc);
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void (*mfi_disable_intr)(struct mfi_softc *sc);
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int32_t (*mfi_read_fw_status)(struct mfi_softc *sc);
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int (*mfi_check_clear_intr)(struct mfi_softc *sc);
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void (*mfi_issue_cmd)(struct mfi_softc *sc, bus_addr_t bus_add,
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uint32_t frame_cnt);
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int (*mfi_adp_reset)(struct mfi_softc *sc);
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int (*mfi_adp_check_reset)(struct mfi_softc *sc);
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void (*mfi_intr_ptr)(void *sc);
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/* ThunderBolt */
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uint32_t mfi_tbolt;
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uint32_t MFA_enabled;
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/* Single Reply structure size */
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uint16_t reply_size;
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/* Singler message size. */
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uint16_t raid_io_msg_size;
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TAILQ_HEAD(TB, mfi_cmd_tbolt) mfi_cmd_tbolt_tqh;
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/* ThunderBolt base contiguous memory mapping. */
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bus_dma_tag_t mfi_tb_dmat;
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bus_dmamap_t mfi_tb_dmamap;
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bus_addr_t mfi_tb_busaddr;
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/* ThunderBolt Contiguous DMA memory Mapping */
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uint8_t * request_message_pool;
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uint8_t * request_message_pool_align;
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uint8_t * request_desc_pool;
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bus_addr_t request_msg_busaddr;
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bus_addr_t reply_frame_busaddr;
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bus_addr_t sg_frame_busaddr;
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/* ThunderBolt IOC Init Descriptor */
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bus_dma_tag_t mfi_tb_ioc_init_dmat;
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bus_dmamap_t mfi_tb_ioc_init_dmamap;
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uint8_t * mfi_tb_ioc_init_desc;
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struct mfi_cmd_tbolt **mfi_cmd_pool_tbolt;
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/* Virtual address of reply Frame Pool */
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struct mfi_mpi2_reply_header* reply_frame_pool;
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struct mfi_mpi2_reply_header* reply_frame_pool_align;
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/* Last reply frame address */
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uint8_t * reply_pool_limit;
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uint16_t last_reply_idx;
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uint8_t max_SGEs_in_chain_message;
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uint8_t max_SGEs_in_main_message;
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uint8_t chain_offset_value_for_main_message;
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uint8_t chain_offset_value_for_mpt_ptmsg;
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};
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union desc_value {
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uint64_t word;
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struct {
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uint32_t low;
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uint32_t high;
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}u;
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};
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// TODO find the right definition
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#define XXX_MFI_CMD_OP_INIT2 0x9
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/*
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* Request descriptor types
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*/
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#define MFI_REQ_DESCRIPT_FLAGS_LD_IO 0x7
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#define MFI_REQ_DESCRIPT_FLAGS_MFA 0x1
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#define MFI_REQ_DESCRIPT_FLAGS_TYPE_SHIFT 0x1
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#define MFI_FUSION_FP_DEFAULT_TIMEOUT 0x14
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#define MFI_LOAD_BALANCE_FLAG 0x1
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#define MFI_DCMD_MBOX_PEND_FLAG 0x1
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//#define MR_PROT_INFO_TYPE_CONTROLLER 0x08
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#define MEGASAS_SCSI_VARIABLE_LENGTH_CMD 0x7f
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#define MEGASAS_SCSI_SERVICE_ACTION_READ32 0x9
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#define MEGASAS_SCSI_SERVICE_ACTION_WRITE32 0xB
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#define MEGASAS_SCSI_ADDL_CDB_LEN 0x18
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#define MEGASAS_RD_WR_PROTECT_CHECK_ALL 0x20
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#define MEGASAS_RD_WR_PROTECT_CHECK_NONE 0x60
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#define MEGASAS_EEDPBLOCKSIZE 512
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struct mfi_cmd_tbolt {
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union mfi_mpi2_request_descriptor *request_desc;
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struct mfi_mpi2_request_raid_scsi_io *io_request;
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bus_addr_t io_request_phys_addr;
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bus_addr_t sg_frame_phys_addr;
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bus_addr_t sense_phys_addr;
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MPI2_SGE_IO_UNION *sg_frame;
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uint8_t *sense;
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TAILQ_ENTRY(mfi_cmd_tbolt) next;
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/*
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* Context for a MFI frame.
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* Used to get the mfi cmd from list when a MFI cmd is completed
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*/
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uint32_t sync_cmd_idx;
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uint16_t index;
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uint8_t status;
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};
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extern int mfi_attach(struct mfi_softc *);
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extern void mfi_free(struct mfi_softc *);
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extern int mfi_shutdown(struct mfi_softc *);
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extern void mfi_startio(struct mfi_softc *);
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extern void mfi_disk_complete(struct bio *);
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extern int mfi_disk_disable(struct mfi_disk *);
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extern void mfi_disk_enable(struct mfi_disk *);
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extern int mfi_dump_blocks(struct mfi_softc *, int id, uint64_t, void *, int);
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extern int mfi_syspd_disable(struct mfi_system_pd *);
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extern void mfi_syspd_enable(struct mfi_system_pd *);
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extern int mfi_dump_syspd_blocks(struct mfi_softc *, int id, uint64_t, void *,
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int);
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extern int mfi_transition_firmware(struct mfi_softc *sc);
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extern int mfi_aen_setup(struct mfi_softc *sc, uint32_t seq_start);
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extern void mfi_complete(struct mfi_softc *sc, struct mfi_command *cm);
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extern int mfi_mapcmd(struct mfi_softc *sc,struct mfi_command *cm);
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extern int mfi_wait_command(struct mfi_softc *sc, struct mfi_command *cm);
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extern void mfi_tbolt_enable_intr_ppc(struct mfi_softc *);
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extern void mfi_tbolt_disable_intr_ppc(struct mfi_softc *);
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extern int32_t mfi_tbolt_read_fw_status_ppc(struct mfi_softc *);
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extern int32_t mfi_tbolt_check_clear_intr_ppc(struct mfi_softc *);
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extern void mfi_tbolt_issue_cmd_ppc(struct mfi_softc *, bus_addr_t, uint32_t);
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extern void mfi_tbolt_init_globals(struct mfi_softc*);
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extern uint32_t mfi_tbolt_get_memory_requirement(struct mfi_softc *);
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extern int mfi_tbolt_init_desc_pool(struct mfi_softc *, uint8_t *, uint32_t);
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extern int mfi_tbolt_init_MFI_queue(struct mfi_softc *);
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extern void mfi_intr_tbolt(void *arg);
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extern int mfi_tbolt_alloc_cmd(struct mfi_softc *sc);
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extern int mfi_tbolt_send_frame(struct mfi_softc *sc, struct mfi_command *cm);
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extern int mfi_tbolt_adp_reset(struct mfi_softc *sc);
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extern int mfi_tbolt_reset(struct mfi_softc *sc);
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extern void mfi_tbolt_sync_map_info(struct mfi_softc *sc);
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extern void mfi_handle_map_sync(void *context, int pending);
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extern int mfi_dcmd_command(struct mfi_softc *, struct mfi_command **,
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uint32_t, void **, size_t);
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extern int mfi_build_cdb(int, uint8_t, u_int64_t, u_int32_t, uint8_t *);
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#define MFIQ_ADD(sc, qname) \
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do { \
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struct mfi_qstat *qs; \
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\
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qs = &(sc)->mfi_qstat[qname]; \
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qs->q_length++; \
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if (qs->q_length > qs->q_max) \
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qs->q_max = qs->q_length; \
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} while (0)
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#define MFIQ_REMOVE(sc, qname) (sc)->mfi_qstat[qname].q_length--
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#define MFIQ_INIT(sc, qname) \
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do { \
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sc->mfi_qstat[qname].q_length = 0; \
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sc->mfi_qstat[qname].q_max = 0; \
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} while (0)
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#define MFIQ_COMMAND_QUEUE(name, index) \
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static __inline void \
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mfi_initq_ ## name (struct mfi_softc *sc) \
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{ \
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TAILQ_INIT(&sc->mfi_ ## name); \
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MFIQ_INIT(sc, index); \
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} \
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static __inline void \
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mfi_enqueue_ ## name (struct mfi_command *cm) \
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{ \
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if ((cm->cm_flags & MFI_ON_MFIQ_MASK) != 0) { \
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printf("command %p is on another queue, " \
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"flags = %#x\n", cm, cm->cm_flags); \
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panic("command is on another queue"); \
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} \
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TAILQ_INSERT_TAIL(&cm->cm_sc->mfi_ ## name, cm, cm_link); \
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cm->cm_flags |= MFI_ON_ ## index; \
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MFIQ_ADD(cm->cm_sc, index); \
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} \
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static __inline void \
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mfi_requeue_ ## name (struct mfi_command *cm) \
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{ \
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if ((cm->cm_flags & MFI_ON_MFIQ_MASK) != 0) { \
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printf("command %p is on another queue, " \
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"flags = %#x\n", cm, cm->cm_flags); \
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panic("command is on another queue"); \
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} \
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TAILQ_INSERT_HEAD(&cm->cm_sc->mfi_ ## name, cm, cm_link); \
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cm->cm_flags |= MFI_ON_ ## index; \
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MFIQ_ADD(cm->cm_sc, index); \
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} \
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static __inline struct mfi_command * \
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mfi_dequeue_ ## name (struct mfi_softc *sc) \
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{ \
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struct mfi_command *cm; \
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\
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if ((cm = TAILQ_FIRST(&sc->mfi_ ## name)) != NULL) { \
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if ((cm->cm_flags & MFI_ON_ ## index) == 0) { \
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printf("command %p not in queue, " \
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"flags = %#x, bit = %#x\n", cm, \
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cm->cm_flags, MFI_ON_ ## index); \
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panic("command not in queue"); \
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} \
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TAILQ_REMOVE(&sc->mfi_ ## name, cm, cm_link); \
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cm->cm_flags &= ~MFI_ON_ ## index; \
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MFIQ_REMOVE(sc, index); \
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} \
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return (cm); \
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} \
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static __inline void \
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mfi_remove_ ## name (struct mfi_command *cm) \
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{ \
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if ((cm->cm_flags & MFI_ON_ ## index) == 0) { \
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printf("command %p not in queue, flags = %#x, " \
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"bit = %#x\n", cm, cm->cm_flags, \
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MFI_ON_ ## index); \
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panic("command not in queue"); \
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} \
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TAILQ_REMOVE(&cm->cm_sc->mfi_ ## name, cm, cm_link); \
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cm->cm_flags &= ~MFI_ON_ ## index; \
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MFIQ_REMOVE(cm->cm_sc, index); \
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} \
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struct hack
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MFIQ_COMMAND_QUEUE(free, MFIQ_FREE);
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MFIQ_COMMAND_QUEUE(ready, MFIQ_READY);
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MFIQ_COMMAND_QUEUE(busy, MFIQ_BUSY);
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static __inline void
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mfi_initq_bio(struct mfi_softc *sc)
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{
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bioq_init(&sc->mfi_bioq);
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MFIQ_INIT(sc, MFIQ_BIO);
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}
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static __inline void
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mfi_enqueue_bio(struct mfi_softc *sc, struct bio *bp)
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{
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bioq_insert_tail(&sc->mfi_bioq, bp);
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MFIQ_ADD(sc, MFIQ_BIO);
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}
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static __inline struct bio *
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mfi_dequeue_bio(struct mfi_softc *sc)
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{
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struct bio *bp;
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if ((bp = bioq_first(&sc->mfi_bioq)) != NULL) {
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bioq_remove(&sc->mfi_bioq, bp);
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MFIQ_REMOVE(sc, MFIQ_BIO);
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}
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return (bp);
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}
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/*
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* This is from the original scsi_extract_sense() in CAM. It's copied
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* here because CAM now uses a non-inline version that follows more complex
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* additions to the SPC spec, and we don't want to force a dependency on
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* the CAM module for such a trivial action.
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*/
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static __inline void
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mfi_extract_sense(struct scsi_sense_data_fixed *sense,
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int *error_code, int *sense_key, int *asc, int *ascq)
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{
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*error_code = sense->error_code & SSD_ERRCODE;
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*sense_key = sense->flags & SSD_KEY;
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*asc = (sense->extra_len >= 5) ? sense->add_sense_code : 0;
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*ascq = (sense->extra_len >= 6) ? sense->add_sense_code_qual : 0;
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}
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static __inline void
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mfi_print_sense(struct mfi_softc *sc, void *sense)
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{
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int error, key, asc, ascq;
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mfi_extract_sense((struct scsi_sense_data_fixed *)sense,
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&error, &key, &asc, &ascq);
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device_printf(sc->mfi_dev, "sense error %d, sense_key %d, "
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"asc %d, ascq %d\n", error, key, asc, ascq);
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}
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#define MFI_WRITE4(sc, reg, val) bus_space_write_4((sc)->mfi_btag, \
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sc->mfi_bhandle, (reg), (val))
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#define MFI_READ4(sc, reg) bus_space_read_4((sc)->mfi_btag, \
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(sc)->mfi_bhandle, (reg))
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#define MFI_WRITE2(sc, reg, val) bus_space_write_2((sc)->mfi_btag, \
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sc->mfi_bhandle, (reg), (val))
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#define MFI_READ2(sc, reg) bus_space_read_2((sc)->mfi_btag, \
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(sc)->mfi_bhandle, (reg))
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#define MFI_WRITE1(sc, reg, val) bus_space_write_1((sc)->mfi_btag, \
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sc->mfi_bhandle, (reg), (val))
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#define MFI_READ1(sc, reg) bus_space_read_1((sc)->mfi_btag, \
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(sc)->mfi_bhandle, (reg))
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|
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MALLOC_DECLARE(M_MFIBUF);
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|
SYSCTL_DECL(_hw_mfi);
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|
|
|
#define MFI_RESET_WAIT_TIME 180
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|
#define MFI_CMD_TIMEOUT 30
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#define MFI_SYS_PD_IO 0
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|
#define MFI_LD_IO 1
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|
#define MFI_SKINNY_MEMORY 0x02000000
|
|
#define MFI_MAXPHYS (128 * 1024)
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|
|
|
#ifdef MFI_DEBUG
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|
extern void mfi_print_cmd(struct mfi_command *cm);
|
|
extern void mfi_dump_cmds(struct mfi_softc *sc);
|
|
extern void mfi_validate_sg(struct mfi_softc *, struct mfi_command *, const char *, int );
|
|
#define MFI_PRINT_CMD(cm) mfi_print_cmd(cm)
|
|
#define MFI_DUMP_CMDS(sc) mfi_dump_cmds(sc)
|
|
#define MFI_VALIDATE_CMD(sc, cm) mfi_validate_sg(sc, cm, __FUNCTION__, __LINE__)
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|
#else
|
|
#define MFI_PRINT_CMD(cm)
|
|
#define MFI_DUMP_CMDS(sc)
|
|
#define MFI_VALIDATE_CMD(sc, cm)
|
|
#endif
|
|
|
|
extern void mfi_release_command(struct mfi_command *cm);
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|
|
#endif /* _MFIVAR_H */
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