718cf2ccb9
Mainly focus on files that use BSD 2-Clause license, however the tool I was using misidentified many licenses so this was mostly a manual - error prone - task. The Software Package Data Exchange (SPDX) group provides a specification to make it easier for automated tools to detect and summarize well known opensource licenses. We are gradually adopting the specification, noting that the tags are considered only advisory and do not, in any way, superceed or replace the license texts.
217 lines
8.3 KiB
C
217 lines
8.3 KiB
C
/*-
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* SPDX-License-Identifier: BSD-2-Clause-FreeBSD
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*
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* Copyright (c) 2007-2016 Solarflare Communications Inc.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
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* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
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* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
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* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
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* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
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* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
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* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* The views and conclusions contained in the software and documentation are
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* those of the authors and should not be interpreted as representing official
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* policies, either expressed or implied, of the FreeBSD Project.
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*
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* $FreeBSD$
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*/
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#ifndef _SYS_SIENA_FLASH_H
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#define _SYS_SIENA_FLASH_H
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#pragma pack(1)
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/* Fixed locations near the start of flash (which may be in the internal PHY
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* firmware header) point to the boot header.
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*
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* - parsed by MC boot ROM and firmware
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* - reserved (but not parsed) by PHY firmware
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* - opaque to driver
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*/
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#define SIENA_MC_BOOT_PHY_FW_HDR_LEN (0x20)
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#define SIENA_MC_BOOT_PTR_LOCATION (0x18) /* First thing we try to boot */
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#define SIENA_MC_BOOT_ALT_PTR_LOCATION (0x1c) /* Alternative if that fails */
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#define SIENA_MC_BOOT_HDR_LEN (0x200)
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#define SIENA_MC_BOOT_MAGIC (0x51E4A001)
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#define SIENA_MC_BOOT_VERSION (1)
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/*Structures supporting an arbitrary number of binary blobs in the flash image
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intended to house code and tables for the satellite cpus*/
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/*thanks to random.org for:*/
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#define BLOBS_HEADER_MAGIC (0xBDA3BBD4)
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#define BLOB_HEADER_MAGIC (0xA1478A91)
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typedef struct blobs_hdr_s { /* GENERATED BY scripts/genfwdef */
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efx_dword_t magic;
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efx_dword_t no_of_blobs;
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} blobs_hdr_t;
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typedef struct blob_hdr_s { /* GENERATED BY scripts/genfwdef */
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efx_dword_t magic;
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efx_dword_t cpu_type;
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efx_dword_t build_variant;
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efx_dword_t offset;
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efx_dword_t length;
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efx_dword_t checksum;
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} blob_hdr_t;
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#define BLOB_CPU_TYPE_TXDI_TEXT (0)
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#define BLOB_CPU_TYPE_RXDI_TEXT (1)
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#define BLOB_CPU_TYPE_TXDP_TEXT (2)
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#define BLOB_CPU_TYPE_RXDP_TEXT (3)
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#define BLOB_CPU_TYPE_RXHRSL_HR_LUT (4)
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#define BLOB_CPU_TYPE_RXHRSL_HR_LUT_CFG (5)
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#define BLOB_CPU_TYPE_TXHRSL_HR_LUT (6)
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#define BLOB_CPU_TYPE_TXHRSL_HR_LUT_CFG (7)
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#define BLOB_CPU_TYPE_RXHRSL_HR_PGM (8)
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#define BLOB_CPU_TYPE_RXHRSL_SL_PGM (9)
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#define BLOB_CPU_TYPE_TXHRSL_HR_PGM (10)
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#define BLOB_CPU_TYPE_TXHRSL_SL_PGM (11)
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#define BLOB_CPU_TYPE_RXDI_VTBL0 (12)
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#define BLOB_CPU_TYPE_TXDI_VTBL0 (13)
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#define BLOB_CPU_TYPE_RXDI_VTBL1 (14)
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#define BLOB_CPU_TYPE_TXDI_VTBL1 (15)
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#define BLOB_CPU_TYPE_DUMPSPEC (32)
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#define BLOB_CPU_TYPE_MC_XIP (33)
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#define BLOB_CPU_TYPE_INVALID (31)
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/*
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* The upper four bits of the CPU type field specify the compression
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* algorithm used for this blob.
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*/
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#define BLOB_COMPRESSION_MASK (0xf0000000)
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#define BLOB_CPU_TYPE_MASK (0x0fffffff)
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#define BLOB_COMPRESSION_NONE (0x00000000) /* Stored as is */
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#define BLOB_COMPRESSION_LZ (0x10000000) /* see lib/lzdecoder.c */
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typedef struct siena_mc_boot_hdr_s { /* GENERATED BY scripts/genfwdef */
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efx_dword_t magic; /* = SIENA_MC_BOOT_MAGIC */
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efx_word_t hdr_version; /* this structure definition is version 1 */
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efx_byte_t board_type;
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efx_byte_t firmware_version_a;
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efx_byte_t firmware_version_b;
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efx_byte_t firmware_version_c;
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efx_word_t checksum; /* of whole header area + firmware image */
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efx_word_t firmware_version_d;
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efx_byte_t mcfw_subtype;
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efx_byte_t generation; /* Valid for medford, SBZ for earlier chips */
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efx_dword_t firmware_text_offset; /* offset to firmware .text */
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efx_dword_t firmware_text_size; /* length of firmware .text, in bytes */
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efx_dword_t firmware_data_offset; /* offset to firmware .data */
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efx_dword_t firmware_data_size; /* length of firmware .data, in bytes */
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efx_byte_t spi_rate; /* SPI rate for reading image, 0 is BootROM default */
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efx_byte_t spi_phase_adj; /* SPI SDO/SCL phase adjustment, 0 is default (no adj) */
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efx_word_t xpm_sector; /* The sector that contains the key, or 0xffff if unsigned (medford) SBZ (earlier) */
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efx_dword_t reserved_c[7]; /* (set to 0) */
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} siena_mc_boot_hdr_t;
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#define SIENA_MC_BOOT_HDR_PADDING \
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(SIENA_MC_BOOT_HDR_LEN - sizeof(siena_mc_boot_hdr_t))
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#define SIENA_MC_STATIC_CONFIG_MAGIC (0xBDCF5555)
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#define SIENA_MC_STATIC_CONFIG_VERSION (0)
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typedef struct siena_mc_static_config_hdr_s { /* GENERATED BY scripts/genfwdef */
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efx_dword_t magic; /* = SIENA_MC_STATIC_CONFIG_MAGIC */
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efx_word_t length; /* of header area (i.e. not including VPD) */
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efx_byte_t version;
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efx_byte_t csum; /* over header area (i.e. not including VPD) */
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efx_dword_t static_vpd_offset;
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efx_dword_t static_vpd_length;
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efx_dword_t capabilities;
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efx_byte_t mac_addr_base[6];
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efx_byte_t green_mode_cal; /* Green mode calibration result */
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efx_byte_t green_mode_valid; /* Whether cal holds a valid value */
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efx_word_t mac_addr_count;
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efx_word_t mac_addr_stride;
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efx_word_t calibrated_vref; /* Vref as measured during production */
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efx_word_t adc_vref; /* Vref as read by ADC */
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efx_dword_t reserved2[1]; /* (write as zero) */
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efx_dword_t num_dbi_items;
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struct {
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efx_word_t addr;
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efx_word_t byte_enables;
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efx_dword_t value;
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} dbi[];
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} siena_mc_static_config_hdr_t;
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#define SIENA_MC_DYNAMIC_CONFIG_MAGIC (0xBDCFDDDD)
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#define SIENA_MC_DYNAMIC_CONFIG_VERSION (0)
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typedef struct siena_mc_fw_version_s { /* GENERATED BY scripts/genfwdef */
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efx_dword_t fw_subtype;
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efx_word_t version_w;
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efx_word_t version_x;
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efx_word_t version_y;
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efx_word_t version_z;
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} siena_mc_fw_version_t;
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typedef struct siena_mc_dynamic_config_hdr_s { /* GENERATED BY scripts/genfwdef */
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efx_dword_t magic; /* = SIENA_MC_DYNAMIC_CONFIG_MAGIC */
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efx_word_t length; /* of header area (i.e. not including VPD) */
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efx_byte_t version;
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efx_byte_t csum; /* over header area (i.e. not including VPD) */
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efx_dword_t dynamic_vpd_offset;
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efx_dword_t dynamic_vpd_length;
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efx_dword_t num_fw_version_items;
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siena_mc_fw_version_t fw_version[];
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} siena_mc_dynamic_config_hdr_t;
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#define SIENA_MC_EXPROM_SINGLE_MAGIC (0xAA55) /* little-endian uint16_t */
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#define SIENA_MC_EXPROM_COMBO_MAGIC (0xB0070102) /* little-endian uint32_t */
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#define SIENA_MC_EXPROM_COMBO_V2_MAGIC (0xB0070103) /* little-endian uint32_t */
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typedef struct siena_mc_combo_rom_hdr_s { /* GENERATED BY scripts/genfwdef */
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efx_dword_t magic; /* = SIENA_MC_EXPROM_COMBO_MAGIC or SIENA_MC_EXPROM_COMBO_V2_MAGIC */
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union {
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struct {
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efx_dword_t len1; /* length of first image */
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efx_dword_t len2; /* length of second image */
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efx_dword_t off1; /* offset of first byte to edit to combine images */
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efx_dword_t off2; /* offset of second byte to edit to combine images */
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efx_word_t infoblk0_off;/* infoblk offset */
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efx_word_t infoblk1_off;/* infoblk offset */
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efx_byte_t infoblk_len;/* length of space reserved for one infoblk structure */
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efx_byte_t reserved[7];/* (set to 0) */
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} v1;
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struct {
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efx_dword_t len1; /* length of first image */
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efx_dword_t len2; /* length of second image */
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efx_dword_t off1; /* offset of first byte to edit to combine images */
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efx_dword_t off2; /* offset of second byte to edit to combine images */
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efx_word_t infoblk_off;/* infoblk start offset */
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efx_word_t infoblk_count;/* infoblk count */
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efx_byte_t infoblk_len;/* length of space reserved for one infoblk structure */
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efx_byte_t reserved[7];/* (set to 0) */
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} v2;
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} data;
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} siena_mc_combo_rom_hdr_t;
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#pragma pack()
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#endif /* _SYS_SIENA_FLASH_H */
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