Andrew Turner e899a0575b Stop calling cpu_dcache_wb_range from PTE_SYNC. ... We set the shareability attributes in TCR_EL1 on boot. These tell the hardware the pagetables are in cached memory so there is no need to flush the entries from the cache to memory. This has about 4.2% improvement in system time and 2.7% improvement in user time for a buildkernel -j48 on a ThunderX. Keep the old code for now to allow for further comparisons.		2017-06-25 13:22:49 +00:00
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acpica	Add support to find the arm64 serial using the ACPI tables. This uses the	2016-11-21 19:26:58 +00:00
arm64	Stop calling cpu_dcache_wb_range from PTE_SYNC.	2017-06-25 13:22:49 +00:00
cavium	If ofw_bus_msimap fails don't try to use the invalid MSI/MSI-X parent node.	2017-03-16 17:49:37 +00:00
cloudabi64	Move struct syscall_args syscall arguments parameters container into	2017-06-12 21:03:23 +00:00
conf	Add COMPAT_FREEBSD11 on arm64, the arch is almost tier-1.	2017-05-23 13:57:55 +00:00
include	Make struct syscall_args visible to userspace compilation environment	2017-06-12 20:53:44 +00:00