b3e9732a76
the legacy 8259A PICs. - Implement an ICH-comptabile PCI interrupt router on the lpc device with 8 steerable pins configured via config space access to byte-wide registers at 0x60-63 and 0x68-6b. - For each configured PCI INTx interrupt, route it to both an I/O APIC pin and a PCI interrupt router pin. When a PCI INTx interrupt is asserted, ensure that both pins are asserted. - Provide an initial routing of PCI interrupt router (PIRQ) pins to 8259A pins (ISA IRQs) and initialize the interrupt line config register for the corresponding PCI function with the ISA IRQ as this matches existing hardware. - Add a global _PIC method for OSPM to select the desired interrupt routing configuration. - Update the _PRT methods for PCI bridges to provide both APIC and legacy PRT tables and return the appropriate table based on the configured routing configuration. Note that if the lpc device is not configured, no routing information is provided. - When the lpc device is enabled, provide ACPI PCI link devices corresponding to each PIRQ pin. - Add a VMM ioctl to adjust the trigger mode (edge vs level) for 8259A pins via the ELCR. - Mark the power management SCI as level triggered. - Don't hardcode the number of elements in Packages in the source for the DSDT. iasl(8) will fill in the actual number of elements, and this makes it simpler to generate a Package with a variable number of elements. Reviewed by: tycho
126 lines
5.5 KiB
C
126 lines
5.5 KiB
C
/*-
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* Copyright (c) 2011 NetApp, Inc.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY NETAPP, INC ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL NETAPP, INC OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#ifndef _VMMAPI_H_
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#define _VMMAPI_H_
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struct vmctx;
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enum x2apic_state;
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/*
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* Different styles of mapping the memory assigned to a VM into the address
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* space of the controlling process.
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*/
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enum vm_mmap_style {
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VM_MMAP_NONE, /* no mapping */
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VM_MMAP_ALL, /* fully and statically mapped */
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VM_MMAP_SPARSE, /* mappings created on-demand */
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};
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#define VM_MEM_F_INCORE 0x01 /* include guest memory in core file */
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int vm_create(const char *name);
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struct vmctx *vm_open(const char *name);
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void vm_destroy(struct vmctx *ctx);
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int vm_parse_memsize(const char *optarg, size_t *memsize);
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int vm_get_memory_seg(struct vmctx *ctx, vm_paddr_t gpa, size_t *ret_len,
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int *wired);
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int vm_setup_memory(struct vmctx *ctx, size_t len, enum vm_mmap_style s);
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void *vm_map_gpa(struct vmctx *ctx, vm_paddr_t gaddr, size_t len);
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int vm_get_gpa_pmap(struct vmctx *, uint64_t gpa, uint64_t *pte, int *num);
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uint32_t vm_get_lowmem_limit(struct vmctx *ctx);
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void vm_set_lowmem_limit(struct vmctx *ctx, uint32_t limit);
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void vm_set_memflags(struct vmctx *ctx, int flags);
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int vm_set_desc(struct vmctx *ctx, int vcpu, int reg,
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uint64_t base, uint32_t limit, uint32_t access);
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int vm_get_desc(struct vmctx *ctx, int vcpu, int reg,
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uint64_t *base, uint32_t *limit, uint32_t *access);
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int vm_set_register(struct vmctx *ctx, int vcpu, int reg, uint64_t val);
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int vm_get_register(struct vmctx *ctx, int vcpu, int reg, uint64_t *retval);
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int vm_run(struct vmctx *ctx, int vcpu, uint64_t rip,
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struct vm_exit *ret_vmexit);
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int vm_suspend(struct vmctx *ctx, enum vm_suspend_how how);
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int vm_apicid2vcpu(struct vmctx *ctx, int apicid);
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int vm_inject_exception(struct vmctx *ctx, int vcpu, int vec);
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int vm_inject_exception2(struct vmctx *ctx, int vcpu, int vec, int errcode);
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int vm_lapic_irq(struct vmctx *ctx, int vcpu, int vector);
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int vm_lapic_local_irq(struct vmctx *ctx, int vcpu, int vector);
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int vm_lapic_msi(struct vmctx *ctx, uint64_t addr, uint64_t msg);
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int vm_ioapic_assert_irq(struct vmctx *ctx, int irq);
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int vm_ioapic_deassert_irq(struct vmctx *ctx, int irq);
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int vm_ioapic_pulse_irq(struct vmctx *ctx, int irq);
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int vm_ioapic_pincount(struct vmctx *ctx, int *pincount);
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int vm_isa_assert_irq(struct vmctx *ctx, int atpic_irq, int ioapic_irq);
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int vm_isa_deassert_irq(struct vmctx *ctx, int atpic_irq, int ioapic_irq);
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int vm_isa_pulse_irq(struct vmctx *ctx, int atpic_irq, int ioapic_irq);
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int vm_isa_set_irq_trigger(struct vmctx *ctx, int atpic_irq,
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enum vm_intr_trigger trigger);
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int vm_inject_nmi(struct vmctx *ctx, int vcpu);
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int vm_capability_name2type(const char *capname);
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const char *vm_capability_type2name(int type);
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int vm_get_capability(struct vmctx *ctx, int vcpu, enum vm_cap_type cap,
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int *retval);
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int vm_set_capability(struct vmctx *ctx, int vcpu, enum vm_cap_type cap,
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int val);
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int vm_assign_pptdev(struct vmctx *ctx, int bus, int slot, int func);
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int vm_unassign_pptdev(struct vmctx *ctx, int bus, int slot, int func);
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int vm_map_pptdev_mmio(struct vmctx *ctx, int bus, int slot, int func,
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vm_paddr_t gpa, size_t len, vm_paddr_t hpa);
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int vm_setup_pptdev_msi(struct vmctx *ctx, int vcpu, int bus, int slot,
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int func, uint64_t addr, uint64_t msg, int numvec);
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int vm_setup_pptdev_msix(struct vmctx *ctx, int vcpu, int bus, int slot,
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int func, int idx, uint64_t addr, uint64_t msg,
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uint32_t vector_control);
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/*
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* Return a pointer to the statistics buffer. Note that this is not MT-safe.
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*/
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uint64_t *vm_get_stats(struct vmctx *ctx, int vcpu, struct timeval *ret_tv,
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int *ret_entries);
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const char *vm_get_stat_desc(struct vmctx *ctx, int index);
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int vm_get_x2apic_state(struct vmctx *ctx, int vcpu, enum x2apic_state *s);
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int vm_set_x2apic_state(struct vmctx *ctx, int vcpu, enum x2apic_state s);
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int vm_get_hpet_capabilities(struct vmctx *ctx, uint32_t *capabilities);
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/* Reset vcpu register state */
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int vcpu_reset(struct vmctx *ctx, int vcpu);
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/*
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* FreeBSD specific APIs
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*/
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int vm_setup_freebsd_registers(struct vmctx *ctx, int vcpu,
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uint64_t rip, uint64_t cr3, uint64_t gdtbase,
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uint64_t rsp);
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int vm_setup_freebsd_registers_i386(struct vmctx *vmctx, int vcpu,
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uint32_t eip, uint32_t gdtbase,
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uint32_t esp);
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void vm_setup_freebsd_gdt(uint64_t *gdtr);
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#endif /* _VMMAPI_H_ */
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