666 lines
25 KiB
C++
666 lines
25 KiB
C++
//===-- TailDuplication.cpp - Duplicate blocks into predecessors' tails ---===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This pass duplicates basic blocks ending in unconditional branches into
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// the tails of their predecessors.
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//
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//===----------------------------------------------------------------------===//
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#define DEBUG_TYPE "tailduplication"
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#include "llvm/Function.h"
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#include "llvm/CodeGen/Passes.h"
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#include "llvm/CodeGen/MachineModuleInfo.h"
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#include "llvm/CodeGen/MachineFunctionPass.h"
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#include "llvm/CodeGen/MachineRegisterInfo.h"
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#include "llvm/CodeGen/MachineSSAUpdater.h"
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#include "llvm/Target/TargetInstrInfo.h"
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#include "llvm/Support/CommandLine.h"
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#include "llvm/Support/Debug.h"
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#include "llvm/Support/ErrorHandling.h"
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#include "llvm/Support/raw_ostream.h"
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#include "llvm/ADT/SmallSet.h"
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#include "llvm/ADT/SetVector.h"
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#include "llvm/ADT/Statistic.h"
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using namespace llvm;
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STATISTIC(NumTails , "Number of tails duplicated");
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STATISTIC(NumTailDups , "Number of tail duplicated blocks");
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STATISTIC(NumInstrDups , "Additional instructions due to tail duplication");
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STATISTIC(NumDeadBlocks, "Number of dead blocks removed");
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// Heuristic for tail duplication.
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static cl::opt<unsigned>
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TailDuplicateSize("tail-dup-size",
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cl::desc("Maximum instructions to consider tail duplicating"),
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cl::init(2), cl::Hidden);
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static cl::opt<bool>
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TailDupVerify("tail-dup-verify",
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cl::desc("Verify sanity of PHI instructions during taildup"),
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cl::init(false), cl::Hidden);
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static cl::opt<unsigned>
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TailDupLimit("tail-dup-limit", cl::init(~0U), cl::Hidden);
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typedef std::vector<std::pair<MachineBasicBlock*,unsigned> > AvailableValsTy;
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namespace {
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/// TailDuplicatePass - Perform tail duplication.
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class TailDuplicatePass : public MachineFunctionPass {
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bool PreRegAlloc;
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const TargetInstrInfo *TII;
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MachineModuleInfo *MMI;
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MachineRegisterInfo *MRI;
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// SSAUpdateVRs - A list of virtual registers for which to update SSA form.
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SmallVector<unsigned, 16> SSAUpdateVRs;
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// SSAUpdateVals - For each virtual register in SSAUpdateVals keep a list of
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// source virtual registers.
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DenseMap<unsigned, AvailableValsTy> SSAUpdateVals;
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public:
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static char ID;
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explicit TailDuplicatePass(bool PreRA) :
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MachineFunctionPass(&ID), PreRegAlloc(PreRA) {}
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virtual bool runOnMachineFunction(MachineFunction &MF);
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virtual const char *getPassName() const { return "Tail Duplication"; }
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private:
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void AddSSAUpdateEntry(unsigned OrigReg, unsigned NewReg,
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MachineBasicBlock *BB);
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void ProcessPHI(MachineInstr *MI, MachineBasicBlock *TailBB,
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MachineBasicBlock *PredBB,
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DenseMap<unsigned, unsigned> &LocalVRMap,
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SmallVector<std::pair<unsigned,unsigned>, 4> &Copies);
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void DuplicateInstruction(MachineInstr *MI,
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MachineBasicBlock *TailBB,
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MachineBasicBlock *PredBB,
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MachineFunction &MF,
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DenseMap<unsigned, unsigned> &LocalVRMap);
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void UpdateSuccessorsPHIs(MachineBasicBlock *FromBB, bool isDead,
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SmallVector<MachineBasicBlock*, 8> &TDBBs,
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SmallSetVector<MachineBasicBlock*, 8> &Succs);
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bool TailDuplicateBlocks(MachineFunction &MF);
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bool TailDuplicate(MachineBasicBlock *TailBB, MachineFunction &MF,
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SmallVector<MachineBasicBlock*, 8> &TDBBs,
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SmallVector<MachineInstr*, 16> &Copies);
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void RemoveDeadBlock(MachineBasicBlock *MBB);
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};
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char TailDuplicatePass::ID = 0;
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}
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FunctionPass *llvm::createTailDuplicatePass(bool PreRegAlloc) {
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return new TailDuplicatePass(PreRegAlloc);
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}
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bool TailDuplicatePass::runOnMachineFunction(MachineFunction &MF) {
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TII = MF.getTarget().getInstrInfo();
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MRI = &MF.getRegInfo();
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MMI = getAnalysisIfAvailable<MachineModuleInfo>();
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bool MadeChange = false;
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while (TailDuplicateBlocks(MF))
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MadeChange = true;
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return MadeChange;
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}
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static void VerifyPHIs(MachineFunction &MF, bool CheckExtra) {
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for (MachineFunction::iterator I = ++MF.begin(), E = MF.end(); I != E; ++I) {
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MachineBasicBlock *MBB = I;
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SmallSetVector<MachineBasicBlock*, 8> Preds(MBB->pred_begin(),
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MBB->pred_end());
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MachineBasicBlock::iterator MI = MBB->begin();
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while (MI != MBB->end()) {
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if (!MI->isPHI())
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break;
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for (SmallSetVector<MachineBasicBlock *, 8>::iterator PI = Preds.begin(),
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PE = Preds.end(); PI != PE; ++PI) {
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MachineBasicBlock *PredBB = *PI;
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bool Found = false;
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for (unsigned i = 1, e = MI->getNumOperands(); i != e; i += 2) {
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MachineBasicBlock *PHIBB = MI->getOperand(i+1).getMBB();
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if (PHIBB == PredBB) {
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Found = true;
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break;
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}
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}
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if (!Found) {
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dbgs() << "Malformed PHI in BB#" << MBB->getNumber() << ": " << *MI;
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dbgs() << " missing input from predecessor BB#"
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<< PredBB->getNumber() << '\n';
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llvm_unreachable(0);
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}
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}
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for (unsigned i = 1, e = MI->getNumOperands(); i != e; i += 2) {
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MachineBasicBlock *PHIBB = MI->getOperand(i+1).getMBB();
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if (CheckExtra && !Preds.count(PHIBB)) {
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// This is not a hard error.
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dbgs() << "Warning: malformed PHI in BB#" << MBB->getNumber()
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<< ": " << *MI;
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dbgs() << " extra input from predecessor BB#"
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<< PHIBB->getNumber() << '\n';
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}
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if (PHIBB->getNumber() < 0) {
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dbgs() << "Malformed PHI in BB#" << MBB->getNumber() << ": " << *MI;
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dbgs() << " non-existing BB#" << PHIBB->getNumber() << '\n';
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llvm_unreachable(0);
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}
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}
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++MI;
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}
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}
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}
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/// TailDuplicateBlocks - Look for small blocks that are unconditionally
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/// branched to and do not fall through. Tail-duplicate their instructions
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/// into their predecessors to eliminate (dynamic) branches.
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bool TailDuplicatePass::TailDuplicateBlocks(MachineFunction &MF) {
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bool MadeChange = false;
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if (PreRegAlloc && TailDupVerify) {
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DEBUG(dbgs() << "\n*** Before tail-duplicating\n");
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VerifyPHIs(MF, true);
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}
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SmallVector<MachineInstr*, 8> NewPHIs;
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MachineSSAUpdater SSAUpdate(MF, &NewPHIs);
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for (MachineFunction::iterator I = ++MF.begin(), E = MF.end(); I != E; ) {
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MachineBasicBlock *MBB = I++;
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if (NumTails == TailDupLimit)
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break;
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// Only duplicate blocks that end with unconditional branches.
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if (MBB->canFallThrough())
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continue;
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// Save the successors list.
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SmallSetVector<MachineBasicBlock*, 8> Succs(MBB->succ_begin(),
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MBB->succ_end());
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SmallVector<MachineBasicBlock*, 8> TDBBs;
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SmallVector<MachineInstr*, 16> Copies;
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if (TailDuplicate(MBB, MF, TDBBs, Copies)) {
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++NumTails;
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// TailBB's immediate successors are now successors of those predecessors
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// which duplicated TailBB. Add the predecessors as sources to the PHI
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// instructions.
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bool isDead = MBB->pred_empty();
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if (PreRegAlloc)
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UpdateSuccessorsPHIs(MBB, isDead, TDBBs, Succs);
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// If it is dead, remove it.
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if (isDead) {
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NumInstrDups -= MBB->size();
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RemoveDeadBlock(MBB);
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++NumDeadBlocks;
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}
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// Update SSA form.
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if (!SSAUpdateVRs.empty()) {
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for (unsigned i = 0, e = SSAUpdateVRs.size(); i != e; ++i) {
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unsigned VReg = SSAUpdateVRs[i];
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SSAUpdate.Initialize(VReg);
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// If the original definition is still around, add it as an available
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// value.
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MachineInstr *DefMI = MRI->getVRegDef(VReg);
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MachineBasicBlock *DefBB = 0;
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if (DefMI) {
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DefBB = DefMI->getParent();
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SSAUpdate.AddAvailableValue(DefBB, VReg);
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}
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// Add the new vregs as available values.
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DenseMap<unsigned, AvailableValsTy>::iterator LI =
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SSAUpdateVals.find(VReg);
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for (unsigned j = 0, ee = LI->second.size(); j != ee; ++j) {
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MachineBasicBlock *SrcBB = LI->second[j].first;
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unsigned SrcReg = LI->second[j].second;
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SSAUpdate.AddAvailableValue(SrcBB, SrcReg);
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}
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// Rewrite uses that are outside of the original def's block.
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MachineRegisterInfo::use_iterator UI = MRI->use_begin(VReg);
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while (UI != MRI->use_end()) {
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MachineOperand &UseMO = UI.getOperand();
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MachineInstr *UseMI = &*UI;
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++UI;
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if (UseMI->getParent() == DefBB)
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continue;
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SSAUpdate.RewriteUse(UseMO);
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}
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}
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SSAUpdateVRs.clear();
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SSAUpdateVals.clear();
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}
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// Eliminate some of the copies inserted by tail duplication to maintain
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// SSA form.
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for (unsigned i = 0, e = Copies.size(); i != e; ++i) {
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MachineInstr *Copy = Copies[i];
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unsigned Src, Dst, SrcSR, DstSR;
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if (TII->isMoveInstr(*Copy, Src, Dst, SrcSR, DstSR)) {
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MachineRegisterInfo::use_iterator UI = MRI->use_begin(Src);
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if (++UI == MRI->use_end()) {
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// Copy is the only use. Do trivial copy propagation here.
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MRI->replaceRegWith(Dst, Src);
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Copy->eraseFromParent();
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}
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}
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}
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if (PreRegAlloc && TailDupVerify)
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VerifyPHIs(MF, false);
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MadeChange = true;
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}
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}
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return MadeChange;
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}
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static bool isDefLiveOut(unsigned Reg, MachineBasicBlock *BB,
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const MachineRegisterInfo *MRI) {
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for (MachineRegisterInfo::use_iterator UI = MRI->use_begin(Reg),
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UE = MRI->use_end(); UI != UE; ++UI) {
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MachineInstr *UseMI = &*UI;
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if (UseMI->getParent() != BB)
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return true;
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}
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return false;
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}
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static unsigned getPHISrcRegOpIdx(MachineInstr *MI, MachineBasicBlock *SrcBB) {
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for (unsigned i = 1, e = MI->getNumOperands(); i != e; i += 2)
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if (MI->getOperand(i+1).getMBB() == SrcBB)
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return i;
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return 0;
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}
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/// AddSSAUpdateEntry - Add a definition and source virtual registers pair for
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/// SSA update.
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void TailDuplicatePass::AddSSAUpdateEntry(unsigned OrigReg, unsigned NewReg,
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MachineBasicBlock *BB) {
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DenseMap<unsigned, AvailableValsTy>::iterator LI= SSAUpdateVals.find(OrigReg);
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if (LI != SSAUpdateVals.end())
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LI->second.push_back(std::make_pair(BB, NewReg));
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else {
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AvailableValsTy Vals;
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Vals.push_back(std::make_pair(BB, NewReg));
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SSAUpdateVals.insert(std::make_pair(OrigReg, Vals));
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SSAUpdateVRs.push_back(OrigReg);
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}
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}
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/// ProcessPHI - Process PHI node in TailBB by turning it into a copy in PredBB.
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/// Remember the source register that's contributed by PredBB and update SSA
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/// update map.
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void TailDuplicatePass::ProcessPHI(MachineInstr *MI,
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MachineBasicBlock *TailBB,
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MachineBasicBlock *PredBB,
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DenseMap<unsigned, unsigned> &LocalVRMap,
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SmallVector<std::pair<unsigned,unsigned>, 4> &Copies) {
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unsigned DefReg = MI->getOperand(0).getReg();
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unsigned SrcOpIdx = getPHISrcRegOpIdx(MI, PredBB);
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assert(SrcOpIdx && "Unable to find matching PHI source?");
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unsigned SrcReg = MI->getOperand(SrcOpIdx).getReg();
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const TargetRegisterClass *RC = MRI->getRegClass(DefReg);
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LocalVRMap.insert(std::make_pair(DefReg, SrcReg));
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// Insert a copy from source to the end of the block. The def register is the
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// available value liveout of the block.
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unsigned NewDef = MRI->createVirtualRegister(RC);
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Copies.push_back(std::make_pair(NewDef, SrcReg));
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if (isDefLiveOut(DefReg, TailBB, MRI))
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AddSSAUpdateEntry(DefReg, NewDef, PredBB);
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// Remove PredBB from the PHI node.
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MI->RemoveOperand(SrcOpIdx+1);
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MI->RemoveOperand(SrcOpIdx);
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if (MI->getNumOperands() == 1)
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MI->eraseFromParent();
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}
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/// DuplicateInstruction - Duplicate a TailBB instruction to PredBB and update
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/// the source operands due to earlier PHI translation.
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void TailDuplicatePass::DuplicateInstruction(MachineInstr *MI,
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MachineBasicBlock *TailBB,
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MachineBasicBlock *PredBB,
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MachineFunction &MF,
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DenseMap<unsigned, unsigned> &LocalVRMap) {
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MachineInstr *NewMI = TII->duplicate(MI, MF);
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for (unsigned i = 0, e = NewMI->getNumOperands(); i != e; ++i) {
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MachineOperand &MO = NewMI->getOperand(i);
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if (!MO.isReg())
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continue;
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unsigned Reg = MO.getReg();
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if (!Reg || TargetRegisterInfo::isPhysicalRegister(Reg))
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continue;
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if (MO.isDef()) {
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const TargetRegisterClass *RC = MRI->getRegClass(Reg);
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unsigned NewReg = MRI->createVirtualRegister(RC);
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MO.setReg(NewReg);
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LocalVRMap.insert(std::make_pair(Reg, NewReg));
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if (isDefLiveOut(Reg, TailBB, MRI))
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AddSSAUpdateEntry(Reg, NewReg, PredBB);
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} else {
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DenseMap<unsigned, unsigned>::iterator VI = LocalVRMap.find(Reg);
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if (VI != LocalVRMap.end())
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MO.setReg(VI->second);
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}
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}
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PredBB->insert(PredBB->end(), NewMI);
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}
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/// UpdateSuccessorsPHIs - After FromBB is tail duplicated into its predecessor
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/// blocks, the successors have gained new predecessors. Update the PHI
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/// instructions in them accordingly.
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void
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TailDuplicatePass::UpdateSuccessorsPHIs(MachineBasicBlock *FromBB, bool isDead,
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SmallVector<MachineBasicBlock*, 8> &TDBBs,
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SmallSetVector<MachineBasicBlock*,8> &Succs) {
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for (SmallSetVector<MachineBasicBlock*, 8>::iterator SI = Succs.begin(),
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SE = Succs.end(); SI != SE; ++SI) {
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MachineBasicBlock *SuccBB = *SI;
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for (MachineBasicBlock::iterator II = SuccBB->begin(), EE = SuccBB->end();
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II != EE; ++II) {
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if (!II->isPHI())
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break;
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unsigned Idx = 0;
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for (unsigned i = 1, e = II->getNumOperands(); i != e; i += 2) {
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MachineOperand &MO = II->getOperand(i+1);
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if (MO.getMBB() == FromBB) {
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Idx = i;
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break;
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}
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}
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assert(Idx != 0);
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MachineOperand &MO0 = II->getOperand(Idx);
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unsigned Reg = MO0.getReg();
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if (isDead) {
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// Folded into the previous BB.
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// There could be duplicate phi source entries. FIXME: Should sdisel
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// or earlier pass fixed this?
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for (unsigned i = II->getNumOperands()-2; i != Idx; i -= 2) {
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MachineOperand &MO = II->getOperand(i+1);
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if (MO.getMBB() == FromBB) {
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II->RemoveOperand(i+1);
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II->RemoveOperand(i);
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}
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}
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} else
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Idx = 0;
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// If Idx is set, the operands at Idx and Idx+1 must be removed.
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// We reuse the location to avoid expensive RemoveOperand calls.
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DenseMap<unsigned,AvailableValsTy>::iterator LI=SSAUpdateVals.find(Reg);
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if (LI != SSAUpdateVals.end()) {
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// This register is defined in the tail block.
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for (unsigned j = 0, ee = LI->second.size(); j != ee; ++j) {
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MachineBasicBlock *SrcBB = LI->second[j].first;
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unsigned SrcReg = LI->second[j].second;
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if (Idx != 0) {
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II->getOperand(Idx).setReg(SrcReg);
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II->getOperand(Idx+1).setMBB(SrcBB);
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Idx = 0;
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} else {
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II->addOperand(MachineOperand::CreateReg(SrcReg, false));
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II->addOperand(MachineOperand::CreateMBB(SrcBB));
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}
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}
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} else {
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// Live in tail block, must also be live in predecessors.
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for (unsigned j = 0, ee = TDBBs.size(); j != ee; ++j) {
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MachineBasicBlock *SrcBB = TDBBs[j];
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if (Idx != 0) {
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II->getOperand(Idx).setReg(Reg);
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II->getOperand(Idx+1).setMBB(SrcBB);
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Idx = 0;
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} else {
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II->addOperand(MachineOperand::CreateReg(Reg, false));
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II->addOperand(MachineOperand::CreateMBB(SrcBB));
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}
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}
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}
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if (Idx != 0) {
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II->RemoveOperand(Idx+1);
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II->RemoveOperand(Idx);
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}
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}
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}
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}
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/// TailDuplicate - If it is profitable, duplicate TailBB's contents in each
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/// of its predecessors.
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bool
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TailDuplicatePass::TailDuplicate(MachineBasicBlock *TailBB, MachineFunction &MF,
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SmallVector<MachineBasicBlock*, 8> &TDBBs,
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SmallVector<MachineInstr*, 16> &Copies) {
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// Set the limit on the number of instructions to duplicate, with a default
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// of one less than the tail-merge threshold. When optimizing for size,
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// duplicate only one, because one branch instruction can be eliminated to
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// compensate for the duplication.
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unsigned MaxDuplicateCount;
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if (MF.getFunction()->hasFnAttr(Attribute::OptimizeForSize))
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MaxDuplicateCount = 1;
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else
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MaxDuplicateCount = TailDuplicateSize;
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if (PreRegAlloc) {
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// Pre-regalloc tail duplication hurts compile time and doesn't help
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// much except for indirect branches.
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if (TailBB->empty() || !TailBB->back().getDesc().isIndirectBranch())
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return false;
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// If the target has hardware branch prediction that can handle indirect
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// branches, duplicating them can often make them predictable when there
|
|
// are common paths through the code. The limit needs to be high enough
|
|
// to allow undoing the effects of tail merging and other optimizations
|
|
// that rearrange the predecessors of the indirect branch.
|
|
MaxDuplicateCount = 20;
|
|
}
|
|
|
|
// Don't try to tail-duplicate single-block loops.
|
|
if (TailBB->isSuccessor(TailBB))
|
|
return false;
|
|
|
|
// Check the instructions in the block to determine whether tail-duplication
|
|
// is invalid or unlikely to be profitable.
|
|
unsigned InstrCount = 0;
|
|
bool HasCall = false;
|
|
for (MachineBasicBlock::iterator I = TailBB->begin();
|
|
I != TailBB->end(); ++I) {
|
|
// Non-duplicable things shouldn't be tail-duplicated.
|
|
if (I->getDesc().isNotDuplicable()) return false;
|
|
// Do not duplicate 'return' instructions if this is a pre-regalloc run.
|
|
// A return may expand into a lot more instructions (e.g. reload of callee
|
|
// saved registers) after PEI.
|
|
if (PreRegAlloc && I->getDesc().isReturn()) return false;
|
|
// Don't duplicate more than the threshold.
|
|
if (InstrCount == MaxDuplicateCount) return false;
|
|
// Remember if we saw a call.
|
|
if (I->getDesc().isCall()) HasCall = true;
|
|
if (!I->isPHI())
|
|
InstrCount += 1;
|
|
}
|
|
// Heuristically, don't tail-duplicate calls if it would expand code size,
|
|
// as it's less likely to be worth the extra cost.
|
|
if (InstrCount > 1 && HasCall)
|
|
return false;
|
|
|
|
DEBUG(dbgs() << "\n*** Tail-duplicating BB#" << TailBB->getNumber() << '\n');
|
|
|
|
// Iterate through all the unique predecessors and tail-duplicate this
|
|
// block into them, if possible. Copying the list ahead of time also
|
|
// avoids trouble with the predecessor list reallocating.
|
|
bool Changed = false;
|
|
SmallSetVector<MachineBasicBlock*, 8> Preds(TailBB->pred_begin(),
|
|
TailBB->pred_end());
|
|
for (SmallSetVector<MachineBasicBlock *, 8>::iterator PI = Preds.begin(),
|
|
PE = Preds.end(); PI != PE; ++PI) {
|
|
MachineBasicBlock *PredBB = *PI;
|
|
|
|
assert(TailBB != PredBB &&
|
|
"Single-block loop should have been rejected earlier!");
|
|
if (PredBB->succ_size() > 1) continue;
|
|
|
|
MachineBasicBlock *PredTBB, *PredFBB;
|
|
SmallVector<MachineOperand, 4> PredCond;
|
|
if (TII->AnalyzeBranch(*PredBB, PredTBB, PredFBB, PredCond, true))
|
|
continue;
|
|
if (!PredCond.empty())
|
|
continue;
|
|
// EH edges are ignored by AnalyzeBranch.
|
|
if (PredBB->succ_size() != 1)
|
|
continue;
|
|
// Don't duplicate into a fall-through predecessor (at least for now).
|
|
if (PredBB->isLayoutSuccessor(TailBB) && PredBB->canFallThrough())
|
|
continue;
|
|
|
|
DEBUG(dbgs() << "\nTail-duplicating into PredBB: " << *PredBB
|
|
<< "From Succ: " << *TailBB);
|
|
|
|
TDBBs.push_back(PredBB);
|
|
|
|
// Remove PredBB's unconditional branch.
|
|
TII->RemoveBranch(*PredBB);
|
|
|
|
// Clone the contents of TailBB into PredBB.
|
|
DenseMap<unsigned, unsigned> LocalVRMap;
|
|
SmallVector<std::pair<unsigned,unsigned>, 4> CopyInfos;
|
|
MachineBasicBlock::iterator I = TailBB->begin();
|
|
while (I != TailBB->end()) {
|
|
MachineInstr *MI = &*I;
|
|
++I;
|
|
if (MI->isPHI()) {
|
|
// Replace the uses of the def of the PHI with the register coming
|
|
// from PredBB.
|
|
ProcessPHI(MI, TailBB, PredBB, LocalVRMap, CopyInfos);
|
|
} else {
|
|
// Replace def of virtual registers with new registers, and update
|
|
// uses with PHI source register or the new registers.
|
|
DuplicateInstruction(MI, TailBB, PredBB, MF, LocalVRMap);
|
|
}
|
|
}
|
|
MachineBasicBlock::iterator Loc = PredBB->getFirstTerminator();
|
|
for (unsigned i = 0, e = CopyInfos.size(); i != e; ++i) {
|
|
const TargetRegisterClass *RC = MRI->getRegClass(CopyInfos[i].first);
|
|
TII->copyRegToReg(*PredBB, Loc, CopyInfos[i].first,
|
|
CopyInfos[i].second, RC,RC);
|
|
MachineInstr *CopyMI = prior(Loc);
|
|
Copies.push_back(CopyMI);
|
|
}
|
|
NumInstrDups += TailBB->size() - 1; // subtract one for removed branch
|
|
|
|
// Update the CFG.
|
|
PredBB->removeSuccessor(PredBB->succ_begin());
|
|
assert(PredBB->succ_empty() &&
|
|
"TailDuplicate called on block with multiple successors!");
|
|
for (MachineBasicBlock::succ_iterator I = TailBB->succ_begin(),
|
|
E = TailBB->succ_end(); I != E; ++I)
|
|
PredBB->addSuccessor(*I);
|
|
|
|
Changed = true;
|
|
++NumTailDups;
|
|
}
|
|
|
|
// If TailBB was duplicated into all its predecessors except for the prior
|
|
// block, which falls through unconditionally, move the contents of this
|
|
// block into the prior block.
|
|
MachineBasicBlock *PrevBB = prior(MachineFunction::iterator(TailBB));
|
|
MachineBasicBlock *PriorTBB = 0, *PriorFBB = 0;
|
|
SmallVector<MachineOperand, 4> PriorCond;
|
|
bool PriorUnAnalyzable =
|
|
TII->AnalyzeBranch(*PrevBB, PriorTBB, PriorFBB, PriorCond, true);
|
|
// This has to check PrevBB->succ_size() because EH edges are ignored by
|
|
// AnalyzeBranch.
|
|
if (!PriorUnAnalyzable && PriorCond.empty() && !PriorTBB &&
|
|
TailBB->pred_size() == 1 && PrevBB->succ_size() == 1 &&
|
|
!TailBB->hasAddressTaken()) {
|
|
DEBUG(dbgs() << "\nMerging into block: " << *PrevBB
|
|
<< "From MBB: " << *TailBB);
|
|
if (PreRegAlloc) {
|
|
DenseMap<unsigned, unsigned> LocalVRMap;
|
|
SmallVector<std::pair<unsigned,unsigned>, 4> CopyInfos;
|
|
MachineBasicBlock::iterator I = TailBB->begin();
|
|
// Process PHI instructions first.
|
|
while (I != TailBB->end() && I->isPHI()) {
|
|
// Replace the uses of the def of the PHI with the register coming
|
|
// from PredBB.
|
|
MachineInstr *MI = &*I++;
|
|
ProcessPHI(MI, TailBB, PrevBB, LocalVRMap, CopyInfos);
|
|
if (MI->getParent())
|
|
MI->eraseFromParent();
|
|
}
|
|
|
|
// Now copy the non-PHI instructions.
|
|
while (I != TailBB->end()) {
|
|
// Replace def of virtual registers with new registers, and update
|
|
// uses with PHI source register or the new registers.
|
|
MachineInstr *MI = &*I++;
|
|
DuplicateInstruction(MI, TailBB, PrevBB, MF, LocalVRMap);
|
|
MI->eraseFromParent();
|
|
}
|
|
MachineBasicBlock::iterator Loc = PrevBB->getFirstTerminator();
|
|
for (unsigned i = 0, e = CopyInfos.size(); i != e; ++i) {
|
|
const TargetRegisterClass *RC = MRI->getRegClass(CopyInfos[i].first);
|
|
TII->copyRegToReg(*PrevBB, Loc, CopyInfos[i].first,
|
|
CopyInfos[i].second, RC, RC);
|
|
MachineInstr *CopyMI = prior(Loc);
|
|
Copies.push_back(CopyMI);
|
|
}
|
|
} else {
|
|
// No PHIs to worry about, just splice the instructions over.
|
|
PrevBB->splice(PrevBB->end(), TailBB, TailBB->begin(), TailBB->end());
|
|
}
|
|
PrevBB->removeSuccessor(PrevBB->succ_begin());
|
|
assert(PrevBB->succ_empty());
|
|
PrevBB->transferSuccessors(TailBB);
|
|
TDBBs.push_back(PrevBB);
|
|
Changed = true;
|
|
}
|
|
|
|
return Changed;
|
|
}
|
|
|
|
/// RemoveDeadBlock - Remove the specified dead machine basic block from the
|
|
/// function, updating the CFG.
|
|
void TailDuplicatePass::RemoveDeadBlock(MachineBasicBlock *MBB) {
|
|
assert(MBB->pred_empty() && "MBB must be dead!");
|
|
DEBUG(dbgs() << "\nRemoving MBB: " << *MBB);
|
|
|
|
// Remove all successors.
|
|
while (!MBB->succ_empty())
|
|
MBB->removeSuccessor(MBB->succ_end()-1);
|
|
|
|
// If there are any labels in the basic block, unregister them from
|
|
// MachineModuleInfo.
|
|
if (MMI && !MBB->empty()) {
|
|
for (MachineBasicBlock::iterator I = MBB->begin(), E = MBB->end();
|
|
I != E; ++I) {
|
|
if (I->isLabel())
|
|
// The label ID # is always operand #0, an immediate.
|
|
MMI->InvalidateLabel(I->getOperand(0).getImm());
|
|
}
|
|
}
|
|
|
|
// Remove the block.
|
|
MBB->eraseFromParent();
|
|
}
|
|
|