ca20f8ec29
o Replace __riscv64 with (__riscv && __riscv_xlen == 64) This is required to support new GCC 7.1 compiler. This is compatible with current GCC 6.1 compiler. RISC-V is extensible ISA and the idea here is to have built-in define per each extension, so together with __riscv we will have some subset of these as well (depending on -march string passed to compiler): __riscv_compressed __riscv_atomic __riscv_mul __riscv_div __riscv_muldiv __riscv_fdiv __riscv_fsqrt __riscv_float_abi_soft __riscv_float_abi_single __riscv_float_abi_double __riscv_cmodel_medlow __riscv_cmodel_medany __riscv_cmodel_pic __riscv_xlen Reviewed by: ngie Sponsored by: DARPA, AFRL Differential Revision: https://reviews.freebsd.org/D11901
273 lines
7.0 KiB
C
273 lines
7.0 KiB
C
/*-
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* Copyright (c) 2010 The FreeBSD Foundation
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* All rights reserved.
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*
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* This software was developed by Rui Paulo under sponsorship from the
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* FreeBSD Foundation.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/types.h>
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#include <sys/ptrace.h>
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#include <sys/wait.h>
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#include <assert.h>
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#include <err.h>
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#include <errno.h>
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#include <signal.h>
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#include <stdio.h>
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#include "_libproc.h"
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#if defined(__aarch64__)
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#define AARCH64_BRK 0xd4200000
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#define AARCH64_BRK_IMM16_SHIFT 5
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#define AARCH64_BRK_IMM16_VAL (0xd << AARCH64_BRK_IMM16_SHIFT)
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#define BREAKPOINT_INSTR (AARCH64_BRK | AARCH64_BRK_IMM16_VAL)
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#define BREAKPOINT_INSTR_SZ 4
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#elif defined(__amd64__) || defined(__i386__)
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#define BREAKPOINT_INSTR 0xcc /* int 0x3 */
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#define BREAKPOINT_INSTR_SZ 1
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#define BREAKPOINT_ADJUST_SZ BREAKPOINT_INSTR_SZ
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#elif defined(__arm__)
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#define BREAKPOINT_INSTR 0xe7ffffff /* bkpt */
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#define BREAKPOINT_INSTR_SZ 4
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#elif defined(__mips__)
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#define BREAKPOINT_INSTR 0xd /* break */
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#define BREAKPOINT_INSTR_SZ 4
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#elif defined(__powerpc__)
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#define BREAKPOINT_INSTR 0x7fe00008 /* trap */
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#define BREAKPOINT_INSTR_SZ 4
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#elif defined(__riscv)
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#define BREAKPOINT_INSTR 0x00100073 /* sbreak */
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#define BREAKPOINT_INSTR_SZ 4
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#else
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#error "Add support for your architecture"
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#endif
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/*
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* Use 4-bytes holder for breakpoint instruction on all the platforms.
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* Works for x86 as well until it is endian-little platform.
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* (We are coping one byte only on x86 from this 4-bytes piece of
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* memory).
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*/
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typedef uint32_t instr_t;
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static int
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proc_stop(struct proc_handle *phdl)
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{
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int status;
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if (kill(proc_getpid(phdl), SIGSTOP) == -1) {
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DPRINTF("kill %d", proc_getpid(phdl));
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return (-1);
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} else if (waitpid(proc_getpid(phdl), &status, WSTOPPED) == -1) {
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DPRINTF("waitpid %d", proc_getpid(phdl));
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return (-1);
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} else if (!WIFSTOPPED(status)) {
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DPRINTFX("waitpid: unexpected status 0x%x", status);
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return (-1);
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}
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return (0);
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}
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int
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proc_bkptset(struct proc_handle *phdl, uintptr_t address,
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unsigned long *saved)
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{
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struct ptrace_io_desc piod;
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unsigned long caddr;
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int ret = 0, stopped;
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instr_t instr;
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*saved = 0;
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if (phdl->status == PS_DEAD || phdl->status == PS_UNDEAD ||
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phdl->status == PS_IDLE) {
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errno = ENOENT;
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return (-1);
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}
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DPRINTFX("adding breakpoint at 0x%lx", address);
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stopped = 0;
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if (phdl->status != PS_STOP) {
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if (proc_stop(phdl) != 0)
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return (-1);
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stopped = 1;
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}
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/*
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* Read the original instruction.
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*/
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caddr = address;
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instr = 0;
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piod.piod_op = PIOD_READ_I;
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piod.piod_offs = (void *)caddr;
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piod.piod_addr = &instr;
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piod.piod_len = BREAKPOINT_INSTR_SZ;
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if (ptrace(PT_IO, proc_getpid(phdl), (caddr_t)&piod, 0) < 0) {
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DPRINTF("ERROR: couldn't read instruction at address 0x%jx",
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(uintmax_t)address);
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ret = -1;
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goto done;
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}
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*saved = instr;
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/*
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* Write a breakpoint instruction to that address.
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*/
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caddr = address;
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instr = BREAKPOINT_INSTR;
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piod.piod_op = PIOD_WRITE_I;
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piod.piod_offs = (void *)caddr;
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piod.piod_addr = &instr;
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piod.piod_len = BREAKPOINT_INSTR_SZ;
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if (ptrace(PT_IO, proc_getpid(phdl), (caddr_t)&piod, 0) < 0) {
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DPRINTF("ERROR: couldn't write instruction at address 0x%jx",
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(uintmax_t)address);
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ret = -1;
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goto done;
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}
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done:
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if (stopped)
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/* Restart the process if we had to stop it. */
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proc_continue(phdl);
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return (ret);
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}
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int
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proc_bkptdel(struct proc_handle *phdl, uintptr_t address,
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unsigned long saved)
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{
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struct ptrace_io_desc piod;
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unsigned long caddr;
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int ret = 0, stopped;
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instr_t instr;
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if (phdl->status == PS_DEAD || phdl->status == PS_UNDEAD ||
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phdl->status == PS_IDLE) {
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errno = ENOENT;
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return (-1);
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}
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DPRINTFX("removing breakpoint at 0x%lx", address);
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stopped = 0;
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if (phdl->status != PS_STOP) {
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if (proc_stop(phdl) != 0)
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return (-1);
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stopped = 1;
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}
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/*
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* Overwrite the breakpoint instruction that we setup previously.
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*/
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caddr = address;
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instr = saved;
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piod.piod_op = PIOD_WRITE_I;
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piod.piod_offs = (void *)caddr;
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piod.piod_addr = &instr;
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piod.piod_len = BREAKPOINT_INSTR_SZ;
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if (ptrace(PT_IO, proc_getpid(phdl), (caddr_t)&piod, 0) < 0) {
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DPRINTF("ERROR: couldn't write instruction at address 0x%jx",
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(uintmax_t)address);
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ret = -1;
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}
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if (stopped)
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/* Restart the process if we had to stop it. */
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proc_continue(phdl);
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return (ret);
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}
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/*
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* Decrement pc so that we delete the breakpoint at the correct
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* address, i.e. at the BREAKPOINT_INSTR address.
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*
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* This is only needed on some architectures where the pc value
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* when reading registers points at the instruction after the
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* breakpoint, e.g. x86.
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*/
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void
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proc_bkptregadj(unsigned long *pc)
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{
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(void)pc;
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#ifdef BREAKPOINT_ADJUST_SZ
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*pc = *pc - BREAKPOINT_ADJUST_SZ;
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#endif
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}
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/*
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* Step over the breakpoint.
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*/
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int
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proc_bkptexec(struct proc_handle *phdl, unsigned long saved)
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{
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unsigned long pc;
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unsigned long samesaved;
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int status;
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if (proc_regget(phdl, REG_PC, &pc) < 0) {
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DPRINTFX("ERROR: couldn't get PC register");
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return (-1);
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}
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proc_bkptregadj(&pc);
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if (proc_bkptdel(phdl, pc, saved) < 0) {
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DPRINTFX("ERROR: couldn't delete breakpoint");
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return (-1);
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}
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/*
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* Go back in time and step over the new instruction just
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* set up by proc_bkptdel().
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*/
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proc_regset(phdl, REG_PC, pc);
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if (ptrace(PT_STEP, proc_getpid(phdl), (caddr_t)1, 0) < 0) {
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DPRINTFX("ERROR: ptrace step failed");
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return (-1);
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}
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proc_wstatus(phdl);
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status = proc_getwstat(phdl);
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if (!WIFSTOPPED(status)) {
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DPRINTFX("ERROR: don't know why process stopped");
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return (-1);
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}
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/*
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* Restore the breakpoint. The saved instruction should be
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* the same as the one that we were passed in.
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*/
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if (proc_bkptset(phdl, pc, &samesaved) < 0) {
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DPRINTFX("ERROR: couldn't restore breakpoint");
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return (-1);
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}
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assert(samesaved == saved);
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return (0);
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}
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