Randall Stewart eac3c4cd27 Ok With this commit we actually get through
the mi_startup (or to the last of it).. and
hit a panic after :

uart0: <16550 or compatible> on iodi0
Trap cause = 2 (TLB miss....)

I did have to take the pci bus OUT of the
build to get this far, hit a cache error with
the PCI code in. Interesting thing is the machine
reboots too ;-)
2009-11-06 12:52:51 +00:00
..
2009-11-02 15:08:59 +00:00
2009-10-29 21:14:10 +00:00
2009-10-29 21:14:10 +00:00
2009-10-29 21:14:10 +00:00
2009-10-29 21:14:10 +00:00
2009-10-29 21:14:10 +00:00
2009-10-29 21:14:10 +00:00
2009-10-29 21:14:10 +00:00
2009-10-29 21:14:10 +00:00
2009-10-29 21:14:10 +00:00
2009-10-29 21:14:10 +00:00
2009-10-29 21:14:10 +00:00
2009-10-29 21:14:10 +00:00
2009-10-29 21:14:10 +00:00
2009-10-29 21:14:10 +00:00
2009-10-29 21:14:10 +00:00
2009-10-29 21:14:10 +00:00
2009-10-29 21:14:10 +00:00
2009-10-29 21:14:10 +00:00
2009-10-29 21:14:10 +00:00
2009-10-29 21:14:10 +00:00
2009-10-29 21:14:10 +00:00
2009-10-29 21:14:10 +00:00