1649 lines
39 KiB
C
1649 lines
39 KiB
C
/*
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* Copyright (c) 1995, David Greenman
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* All rights reserved.
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*
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* Modifications to support NetBSD and media selection:
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* Copyright (c) 1997 Jason R. Thorpe. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice unmodified, this list of conditions, and the following
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* disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $Id$
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*/
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/*
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* Intel EtherExpress Pro/100B PCI Fast Ethernet driver
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*/
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#include "bpfilter.h"
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/mbuf.h>
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#include <sys/malloc.h>
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#include <sys/kernel.h>
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#include <sys/socket.h>
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#include <sys/syslog.h>
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#include <net/if.h>
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#include <net/if_media.h>
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#ifdef INET
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#include <netinet/in.h>
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#endif
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#ifdef NS
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#include <netns/ns.h>
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#include <netns/ns_if.h>
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#endif
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#if NBPFILTER > 0
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#include <net/bpf.h>
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#endif
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#if defined(__NetBSD__)
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#include <sys/ioctl.h>
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#include <sys/errno.h>
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#include <sys/device.h>
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#include <net/if_dl.h>
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#include <net/if_ether.h>
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#include <netinet/if_inarp.h>
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#include <vm/vm.h>
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#include <machine/cpu.h>
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#include <machine/bus.h>
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#include <machine/intr.h>
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#include <dev/pci/if_fxpreg.h>
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#include <dev/pci/if_fxpvar.h>
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#include <dev/pci/pcivar.h>
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#include <dev/pci/pcireg.h>
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#include <dev/pci/pcidevs.h>
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#ifdef __alpha__ /* XXX */
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/* XXX XXX NEED REAL DMA MAPPING SUPPORT XXX XXX */
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#undef vtophys
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#define vtophys(va) alpha_XXX_dmamap((vm_offset_t)(va))
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#endif /* __alpha__ */
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#else /* __FreeBSD__ */
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#include <sys/sockio.h>
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#include <netinet/if_ether.h>
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#include <vm/vm.h> /* for vtophys */
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#include <vm/pmap.h> /* for vtophys */
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#include <machine/clock.h> /* for DELAY */
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#include <pci/pcivar.h>
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#include <pci/if_fxpreg.h>
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#include <pci/if_fxpvar.h>
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#endif /* __NetBSD__ */
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/*
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* NOTE! On the Alpha, we have an alignment constraint. The
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* card DMAs the packet immediately following the RFA. However,
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* the first thing in the packet is a 14-byte Ethernet header.
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* This means that the packet is misaligned. To compensate,
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* we actually offset the RFA 2 bytes into the cluster. This
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* alignes the packet after the Ethernet header at a 32-bit
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* boundary. HOWEVER! This means that the RFA is misaligned!
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*/
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#define RFA_ALIGNMENT_FUDGE 2
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/*
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* Inline function to copy a 16-bit aligned 32-bit quantity.
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*/
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static __inline void fxp_lwcopy __P((volatile u_int32_t *,
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volatile u_int32_t *));
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static __inline void
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fxp_lwcopy(src, dst)
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volatile u_int32_t *src, *dst;
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{
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volatile u_int16_t *a = (u_int16_t *)src;
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volatile u_int16_t *b = (u_int16_t *)dst;
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b[0] = a[0];
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b[1] = a[1];
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}
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/*
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* Template for default configuration parameters.
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* See struct fxp_cb_config for the bit definitions.
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*/
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static u_char fxp_cb_config_template[] = {
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0x0, 0x0, /* cb_status */
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0x80, 0x2, /* cb_command */
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0xff, 0xff, 0xff, 0xff, /* link_addr */
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0x16, /* 0 */
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0x8, /* 1 */
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0x0, /* 2 */
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0x0, /* 3 */
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0x0, /* 4 */
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0x80, /* 5 */
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0xb2, /* 6 */
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0x3, /* 7 */
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0x1, /* 8 */
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0x0, /* 9 */
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0x26, /* 10 */
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0x0, /* 11 */
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0x60, /* 12 */
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0x0, /* 13 */
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0xf2, /* 14 */
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0x48, /* 15 */
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0x0, /* 16 */
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0x40, /* 17 */
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0xf3, /* 18 */
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0x0, /* 19 */
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0x3f, /* 20 */
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0x5, /* 21 */
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0x0, 0x0
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};
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/* Supported media types. */
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struct fxp_supported_media {
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const int fsm_phy; /* PHY type */
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const int *fsm_media; /* the media array */
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const int fsm_nmedia; /* the number of supported media */
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const int fsm_defmedia; /* default media for this PHY */
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};
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const int fxp_media_standard[] = {
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IFM_ETHER|IFM_10_T,
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IFM_ETHER|IFM_10_T|IFM_FDX,
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IFM_ETHER|IFM_100_TX,
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IFM_ETHER|IFM_100_TX|IFM_FDX,
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IFM_ETHER|IFM_AUTO,
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};
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#define FXP_MEDIA_STANDARD_DEFMEDIA (IFM_ETHER|IFM_AUTO)
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const int fxp_media_default[] = {
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IFM_ETHER|IFM_MANUAL, /* XXX IFM_AUTO ? */
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};
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#define FXP_MEDIA_DEFAULT_DEFMEDIA (IFM_ETHER|IFM_MANUAL)
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const struct fxp_supported_media fxp_media[] = {
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{ FXP_PHY_DP83840, fxp_media_standard,
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sizeof(fxp_media_standard) / sizeof(fxp_media_standard[0]),
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FXP_MEDIA_STANDARD_DEFMEDIA },
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{ FXP_PHY_DP83840A, fxp_media_standard,
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sizeof(fxp_media_standard) / sizeof(fxp_media_standard[0]),
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FXP_MEDIA_STANDARD_DEFMEDIA },
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{ FXP_PHY_82555, fxp_media_standard,
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sizeof(fxp_media_standard) / sizeof(fxp_media_standard[0]),
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FXP_MEDIA_STANDARD_DEFMEDIA },
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{ FXP_PHY_80C24, fxp_media_default,
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sizeof(fxp_media_default) / sizeof(fxp_media_default[0]),
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FXP_MEDIA_DEFAULT_DEFMEDIA },
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};
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#define NFXPMEDIA (sizeof(fxp_media) / sizeof(fxp_media[0]))
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static int fxp_mediachange __P((struct ifnet *));
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static void fxp_mediastatus __P((struct ifnet *, struct ifmediareq *));
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void fxp_set_media __P((struct fxp_softc *, int));
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static inline void fxp_scb_wait __P((struct fxp_softc *));
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static FXP_INTR_TYPE fxp_intr __P((void *));
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static void fxp_start __P((struct ifnet *));
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static int fxp_ioctl __P((struct ifnet *,
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FXP_IOCTLCMD_TYPE, caddr_t));
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static void fxp_init __P((void *));
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static void fxp_stop __P((struct fxp_softc *));
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static void fxp_watchdog __P((struct ifnet *));
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static int fxp_add_rfabuf __P((struct fxp_softc *, struct mbuf *));
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static int fxp_mdi_read __P((struct fxp_softc *, int, int));
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static void fxp_mdi_write __P((struct fxp_softc *, int, int, int));
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static void fxp_read_eeprom __P((struct fxp_softc *, u_int16_t *,
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int, int));
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static int fxp_attach_common __P((struct fxp_softc *, u_int8_t *));
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void fxp_stats_update __P((void *));
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/*
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* Set initial transmit threshold at 64 (512 bytes). This is
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* increased by 64 (512 bytes) at a time, to maximum of 192
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* (1536 bytes), if an underrun occurs.
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*/
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static int tx_threshold = 64;
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/*
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* Number of transmit control blocks. This determines the number
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* of transmit buffers that can be chained in the CB list.
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* This must be a power of two.
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*/
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#define FXP_NTXCB 128
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/*
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* TxCB list index mask. This is used to do list wrap-around.
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*/
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#define FXP_TXCB_MASK (FXP_NTXCB - 1)
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/*
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* Number of DMA segments in a TxCB. Note that this is carefully
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* chosen to make the total struct size an even power of two. It's
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* critical that no TxCB be split across a page boundry since
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* no attempt is made to allocate physically contiguous memory.
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*
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* XXX - don't forget to change the hard-coded constant in the
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* fxp_cb_tx struct (defined in if_fxpreg.h), too!
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*/
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#define FXP_NTXSEG 29
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/*
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* Number of receive frame area buffers. These are large so chose
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* wisely.
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*/
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#define FXP_NRFABUFS 32
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/*
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* Wait for the previous command to be accepted (but not necessarily
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* completed).
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*/
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static inline void
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fxp_scb_wait(sc)
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struct fxp_softc *sc;
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{
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int i = 10000;
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while ((CSR_READ_1(sc, FXP_CSR_SCB_COMMAND) & FXP_SCB_COMMAND_MASK)
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&& --i);
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}
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/*************************************************************
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* Operating system-specific autoconfiguration glue
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*************************************************************/
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#if defined(__NetBSD__)
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#ifdef __BROKEN_INDIRECT_CONFIG
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static int fxp_match __P((struct device *, void *, void *));
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#else
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static int fxp_match __P((struct device *, struct cfdata *, void *));
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#endif
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static void fxp_attach __P((struct device *, struct device *, void *));
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static void fxp_shutdown __P((void *));
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/* Compensate for lack of a generic ether_ioctl() */
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static int fxp_ether_ioctl __P((struct ifnet *,
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FXP_IOCTLCMD_TYPE, caddr_t));
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#define ether_ioctl fxp_ether_ioctl
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struct cfattach fxp_ca = {
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sizeof(struct fxp_softc), fxp_match, fxp_attach
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};
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struct cfdriver fxp_cd = {
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NULL, "fxp", DV_IFNET
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};
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/*
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* Check if a device is an 82557.
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*/
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static int
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fxp_match(parent, match, aux)
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struct device *parent;
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#ifdef __BROKEN_INDIRECT_CONFIG
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void *match;
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#else
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struct cfdata *match;
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#endif
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void *aux;
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{
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struct pci_attach_args *pa = aux;
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if (PCI_VENDOR(pa->pa_id) != PCI_VENDOR_INTEL)
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return (0);
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switch (PCI_PRODUCT(pa->pa_id)) {
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case PCI_PRODUCT_INTEL_82557:
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return (1);
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}
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return (0);
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}
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static void
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fxp_attach(parent, self, aux)
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struct device *parent, *self;
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void *aux;
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{
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struct fxp_softc *sc = (struct fxp_softc *)self;
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struct pci_attach_args *pa = aux;
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pci_chipset_tag_t pc = pa->pa_pc;
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pci_intr_handle_t ih;
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const char *intrstr = NULL;
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u_int8_t enaddr[6];
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struct ifnet *ifp;
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/*
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* Map control/status registers.
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*/
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if (pci_mapreg_map(pa, FXP_PCI_MMBA, PCI_MAPREG_TYPE_MEM, 0,
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&sc->sc_st, &sc->sc_sh, NULL, NULL)) {
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printf(": can't map registers\n");
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return;
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}
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printf(": Intel EtherExpress Pro 10/100B Ethernet\n");
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/*
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* Allocate our interrupt.
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*/
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if (pci_intr_map(pc, pa->pa_intrtag, pa->pa_intrpin,
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pa->pa_intrline, &ih)) {
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printf("%s: couldn't map interrupt\n", sc->sc_dev.dv_xname);
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return;
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}
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intrstr = pci_intr_string(pc, ih);
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sc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, fxp_intr, sc);
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if (sc->sc_ih == NULL) {
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printf("%s: couldn't establish interrupt",
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sc->sc_dev.dv_xname);
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if (intrstr != NULL)
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printf(" at %s", intrstr);
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printf("\n");
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return;
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}
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printf("%s: interrupting at %s\n", sc->sc_dev.dv_xname, intrstr);
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/* Do generic parts of attach. */
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if (fxp_attach_common(sc, enaddr)) {
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/* Failed! */
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return;
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}
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printf("%s: Ethernet address %s%s\n", sc->sc_dev.dv_xname,
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ether_sprintf(enaddr), sc->phy_10Mbps_only ? ", 10Mbps" : "");
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ifp = &sc->sc_ethercom.ec_if;
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bcopy(sc->sc_dev.dv_xname, ifp->if_xname, IFNAMSIZ);
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ifp->if_softc = sc;
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ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
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ifp->if_ioctl = fxp_ioctl;
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ifp->if_start = fxp_start;
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ifp->if_watchdog = fxp_watchdog;
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/*
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* Attach the interface.
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*/
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if_attach(ifp);
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ether_ifattach(ifp, enaddr);
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#if NBPFILTER > 0
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bpfattach(&sc->sc_ethercom.ec_if.if_bpf, ifp, DLT_EN10MB,
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sizeof(struct ether_header));
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#endif
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/*
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* Add shutdown hook so that DMA is disabled prior to reboot. Not
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* doing do could allow DMA to corrupt kernel memory during the
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* reboot before the driver initializes.
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*/
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shutdownhook_establish(fxp_shutdown, sc);
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}
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/*
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* Device shutdown routine. Called at system shutdown after sync. The
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* main purpose of this routine is to shut off receiver DMA so that
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* kernel memory doesn't get clobbered during warmboot.
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*/
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static void
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fxp_shutdown(sc)
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void *sc;
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{
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fxp_stop((struct fxp_softc *) sc);
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}
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static int
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fxp_ether_ioctl(ifp, cmd, data)
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struct ifnet *ifp;
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FXP_IOCTLCMD_TYPE cmd;
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caddr_t data;
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{
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struct ifaddr *ifa = (struct ifaddr *) data;
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struct fxp_softc *sc = ifp->if_softc;
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switch (cmd) {
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case SIOCSIFADDR:
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ifp->if_flags |= IFF_UP;
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switch (ifa->ifa_addr->sa_family) {
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#ifdef INET
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case AF_INET:
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fxp_init(sc);
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arp_ifinit(ifp, ifa);
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break;
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#endif
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#ifdef NS
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case AF_NS:
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{
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register struct ns_addr *ina = &IA_SNS(ifa)->sns_addr;
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if (ns_nullhost(*ina))
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ina->x_host = *(union ns_host *)
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LLADDR(ifp->if_sadl);
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else
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bcopy(ina->x_host.c_host, LLADDR(ifp->if_sadl),
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ifp->if_addrlen);
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/* Set new address. */
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fxp_init(sc);
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break;
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}
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#endif
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default:
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fxp_init(sc);
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break;
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}
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break;
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default:
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return (EINVAL);
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}
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|
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return (0);
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}
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|
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#else /* __FreeBSD__ */
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static u_long fxp_count;
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static char *fxp_probe __P((pcici_t, pcidi_t));
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static void fxp_attach __P((pcici_t, int));
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|
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static void fxp_shutdown __P((int, void *));
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static struct pci_device fxp_device = {
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"fxp",
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fxp_probe,
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fxp_attach,
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&fxp_count,
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NULL
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};
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DATA_SET(pcidevice_set, fxp_device);
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|
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/*
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* Return identification string if this is device is ours.
|
|
*/
|
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static char *
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fxp_probe(config_id, device_id)
|
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pcici_t config_id;
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pcidi_t device_id;
|
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{
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if (((device_id & 0xffff) == FXP_VENDORID_INTEL) &&
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((device_id >> 16) & 0xffff) == FXP_DEVICEID_i82557)
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return ("Intel EtherExpress Pro 10/100B Ethernet");
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|
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return NULL;
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}
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|
|
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static void
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fxp_attach(config_id, unit)
|
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pcici_t config_id;
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int unit;
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{
|
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struct fxp_softc *sc;
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vm_offset_t pbase;
|
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struct ifnet *ifp;
|
|
int s;
|
|
|
|
sc = malloc(sizeof(struct fxp_softc), M_DEVBUF, M_NOWAIT);
|
|
if (sc == NULL)
|
|
return;
|
|
bzero(sc, sizeof(struct fxp_softc));
|
|
|
|
s = splimp();
|
|
|
|
/*
|
|
* Map control/status registers.
|
|
*/
|
|
if (!pci_map_mem(config_id, FXP_PCI_MMBA,
|
|
(vm_offset_t *)&sc->csr, &pbase)) {
|
|
printf("fxp%d: couldn't map memory\n", unit);
|
|
goto fail;
|
|
}
|
|
|
|
/*
|
|
* Allocate our interrupt.
|
|
*/
|
|
if (!pci_map_int(config_id, fxp_intr, sc, &net_imask)) {
|
|
printf("fxp%d: couldn't map interrupt\n", unit);
|
|
goto fail;
|
|
}
|
|
|
|
/* Do generic parts of attach. */
|
|
if (fxp_attach_common(sc, sc->arpcom.ac_enaddr)) {
|
|
/* Failed! */
|
|
(void) pci_unmap_int(config_id);
|
|
goto fail;
|
|
}
|
|
|
|
printf("fxp%d: Ethernet address %6D%s\n", unit,
|
|
sc->arpcom.ac_enaddr, ":", sc->phy_10Mbps_only ? ", 10Mbps" : "");
|
|
|
|
ifp = &sc->arpcom.ac_if;
|
|
ifp->if_unit = unit;
|
|
ifp->if_name = "fxp";
|
|
ifp->if_output = ether_output;
|
|
ifp->if_baudrate = 100000000;
|
|
ifp->if_init = fxp_init;
|
|
ifp->if_softc = sc;
|
|
ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
|
|
ifp->if_ioctl = fxp_ioctl;
|
|
ifp->if_start = fxp_start;
|
|
ifp->if_watchdog = fxp_watchdog;
|
|
|
|
/*
|
|
* Attach the interface.
|
|
*/
|
|
if_attach(ifp);
|
|
ether_ifattach(ifp);
|
|
#if NBPFILTER > 0
|
|
bpfattach(ifp, DLT_EN10MB, sizeof(struct ether_header));
|
|
#endif
|
|
|
|
/*
|
|
* Add shutdown hook so that DMA is disabled prior to reboot. Not
|
|
* doing do could allow DMA to corrupt kernel memory during the
|
|
* reboot before the driver initializes.
|
|
*/
|
|
at_shutdown(fxp_shutdown, sc, SHUTDOWN_POST_SYNC);
|
|
|
|
splx(s);
|
|
return;
|
|
|
|
fail:
|
|
free(sc, M_DEVBUF);
|
|
splx(s);
|
|
}
|
|
|
|
/*
|
|
* Device shutdown routine. Called at system shutdown after sync. The
|
|
* main purpose of this routine is to shut off receiver DMA so that
|
|
* kernel memory doesn't get clobbered during warmboot.
|
|
*/
|
|
static void
|
|
fxp_shutdown(howto, sc)
|
|
int howto;
|
|
void *sc;
|
|
{
|
|
fxp_stop((struct fxp_softc *) sc);
|
|
}
|
|
|
|
#endif /* __NetBSD__ */
|
|
|
|
/*************************************************************
|
|
* End of operating system-specific autoconfiguration glue
|
|
*************************************************************/
|
|
|
|
/*
|
|
* Do generic parts of attach.
|
|
*/
|
|
static int
|
|
fxp_attach_common(sc, enaddr)
|
|
struct fxp_softc *sc;
|
|
u_int8_t *enaddr;
|
|
{
|
|
u_int16_t data;
|
|
int i, nmedia, defmedia;
|
|
const int *media;
|
|
|
|
/*
|
|
* Reset to a stable state.
|
|
*/
|
|
CSR_WRITE_4(sc, FXP_CSR_PORT, FXP_PORT_SELECTIVE_RESET);
|
|
DELAY(10);
|
|
|
|
sc->cbl_base = malloc(sizeof(struct fxp_cb_tx) * FXP_NTXCB,
|
|
M_DEVBUF, M_NOWAIT);
|
|
if (sc->cbl_base == NULL)
|
|
goto fail;
|
|
|
|
sc->fxp_stats = malloc(sizeof(struct fxp_stats), M_DEVBUF, M_NOWAIT);
|
|
if (sc->fxp_stats == NULL)
|
|
goto fail;
|
|
bzero(sc->fxp_stats, sizeof(struct fxp_stats));
|
|
|
|
/*
|
|
* Pre-allocate our receive buffers.
|
|
*/
|
|
for (i = 0; i < FXP_NRFABUFS; i++) {
|
|
if (fxp_add_rfabuf(sc, NULL) != 0) {
|
|
goto fail;
|
|
}
|
|
}
|
|
|
|
/*
|
|
* Get info about the primary PHY
|
|
*/
|
|
fxp_read_eeprom(sc, (u_int16_t *)&data, 6, 1);
|
|
sc->phy_primary_addr = data & 0xff;
|
|
sc->phy_primary_device = (data >> 8) & 0x3f;
|
|
sc->phy_10Mbps_only = data >> 15;
|
|
|
|
/*
|
|
* Read MAC address.
|
|
*/
|
|
fxp_read_eeprom(sc, (u_int16_t *)enaddr, 0, 3);
|
|
|
|
/*
|
|
* Initialize the media structures.
|
|
*/
|
|
|
|
media = fxp_media_default;
|
|
nmedia = sizeof(fxp_media_default) / sizeof(fxp_media_default[0]);
|
|
defmedia = FXP_MEDIA_DEFAULT_DEFMEDIA;
|
|
|
|
for (i = 0; i < NFXPMEDIA; i++) {
|
|
if (sc->phy_primary_device == fxp_media[i].fsm_phy) {
|
|
media = fxp_media[i].fsm_media;
|
|
nmedia = fxp_media[i].fsm_nmedia;
|
|
defmedia = fxp_media[i].fsm_defmedia;
|
|
}
|
|
}
|
|
|
|
ifmedia_init(&sc->sc_media, 0, fxp_mediachange, fxp_mediastatus);
|
|
for (i = 0; i < nmedia; i++) {
|
|
if (IFM_SUBTYPE(media[i]) == IFM_100_TX && sc->phy_10Mbps_only)
|
|
continue;
|
|
ifmedia_add(&sc->sc_media, media[i], 0, NULL);
|
|
}
|
|
ifmedia_set(&sc->sc_media, defmedia);
|
|
|
|
return (0);
|
|
|
|
fail:
|
|
printf(FXP_FORMAT ": Failed to malloc memory\n", FXP_ARGS(sc));
|
|
if (sc->cbl_base)
|
|
free(sc->cbl_base, M_DEVBUF);
|
|
if (sc->fxp_stats)
|
|
free(sc->fxp_stats, M_DEVBUF);
|
|
/* frees entire chain */
|
|
if (sc->rfa_headm)
|
|
m_freem(sc->rfa_headm);
|
|
|
|
return (ENOMEM);
|
|
}
|
|
|
|
/*
|
|
* Read from the serial EEPROM. Basically, you manually shift in
|
|
* the read opcode (one bit at a time) and then shift in the address,
|
|
* and then you shift out the data (all of this one bit at a time).
|
|
* The word size is 16 bits, so you have to provide the address for
|
|
* every 16 bits of data.
|
|
*/
|
|
static void
|
|
fxp_read_eeprom(sc, data, offset, words)
|
|
struct fxp_softc *sc;
|
|
u_short *data;
|
|
int offset;
|
|
int words;
|
|
{
|
|
u_int16_t reg;
|
|
int i, x;
|
|
|
|
for (i = 0; i < words; i++) {
|
|
CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, FXP_EEPROM_EECS);
|
|
/*
|
|
* Shift in read opcode.
|
|
*/
|
|
for (x = 3; x > 0; x--) {
|
|
if (FXP_EEPROM_OPC_READ & (1 << (x - 1))) {
|
|
reg = FXP_EEPROM_EECS | FXP_EEPROM_EEDI;
|
|
} else {
|
|
reg = FXP_EEPROM_EECS;
|
|
}
|
|
CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, reg);
|
|
CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL,
|
|
reg | FXP_EEPROM_EESK);
|
|
DELAY(1);
|
|
CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, reg);
|
|
DELAY(1);
|
|
}
|
|
/*
|
|
* Shift in address.
|
|
*/
|
|
for (x = 6; x > 0; x--) {
|
|
if ((i + offset) & (1 << (x - 1))) {
|
|
reg = FXP_EEPROM_EECS | FXP_EEPROM_EEDI;
|
|
} else {
|
|
reg = FXP_EEPROM_EECS;
|
|
}
|
|
CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, reg);
|
|
CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL,
|
|
reg | FXP_EEPROM_EESK);
|
|
DELAY(1);
|
|
CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, reg);
|
|
DELAY(1);
|
|
}
|
|
reg = FXP_EEPROM_EECS;
|
|
data[i] = 0;
|
|
/*
|
|
* Shift out data.
|
|
*/
|
|
for (x = 16; x > 0; x--) {
|
|
CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL,
|
|
reg | FXP_EEPROM_EESK);
|
|
DELAY(1);
|
|
if (CSR_READ_2(sc, FXP_CSR_EEPROMCONTROL) &
|
|
FXP_EEPROM_EEDO)
|
|
data[i] |= (1 << (x - 1));
|
|
CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, reg);
|
|
DELAY(1);
|
|
}
|
|
CSR_WRITE_2(sc, FXP_CSR_EEPROMCONTROL, 0);
|
|
DELAY(1);
|
|
}
|
|
}
|
|
|
|
/*
|
|
* Start packet transmission on the interface.
|
|
*/
|
|
static void
|
|
fxp_start(ifp)
|
|
struct ifnet *ifp;
|
|
{
|
|
struct fxp_softc *sc = ifp->if_softc;
|
|
struct fxp_cb_tx *txp;
|
|
struct mbuf *m, *mb_head;
|
|
int segment, first = 1;
|
|
|
|
txloop:
|
|
/*
|
|
* See if we're all filled up with buffers to transmit.
|
|
*/
|
|
if (sc->tx_queued >= FXP_NTXCB)
|
|
return;
|
|
|
|
/*
|
|
* Grab a packet to transmit.
|
|
*/
|
|
IF_DEQUEUE(&ifp->if_snd, mb_head);
|
|
if (mb_head == NULL) {
|
|
/*
|
|
* No more packets to send.
|
|
*/
|
|
return;
|
|
}
|
|
|
|
/*
|
|
* Get pointer to next available (unused) descriptor.
|
|
*/
|
|
txp = sc->cbl_last->next;
|
|
|
|
/*
|
|
* Go through each of the mbufs in the chain and initialize
|
|
* the transmit buffers descriptors with the physical address
|
|
* and size of the mbuf.
|
|
*/
|
|
tbdinit:
|
|
for (m = mb_head, segment = 0; m != NULL; m = m->m_next) {
|
|
if (m->m_len != 0) {
|
|
if (segment == FXP_NTXSEG)
|
|
break;
|
|
txp->tbd[segment].tb_addr =
|
|
vtophys(mtod(m, vm_offset_t));
|
|
txp->tbd[segment].tb_size = m->m_len;
|
|
segment++;
|
|
}
|
|
}
|
|
if (m != NULL) {
|
|
struct mbuf *mn;
|
|
|
|
/*
|
|
* We ran out of segments. We have to recopy this mbuf
|
|
* chain first.
|
|
*/
|
|
MGETHDR(mn, M_DONTWAIT, MT_DATA);
|
|
if (mn == NULL) {
|
|
m_freem(mb_head);
|
|
return;
|
|
}
|
|
if (mb_head->m_pkthdr.len > MHLEN) {
|
|
MCLGET(mn, M_DONTWAIT);
|
|
if ((mn->m_flags & M_EXT) == 0) {
|
|
m_freem(mn);
|
|
m_freem(mb_head);
|
|
return;
|
|
}
|
|
}
|
|
m_copydata(mb_head, 0, mb_head->m_pkthdr.len,
|
|
mtod(mn, caddr_t));
|
|
mn->m_pkthdr.len = mn->m_len = mb_head->m_pkthdr.len;
|
|
m_freem(mb_head);
|
|
mb_head = mn;
|
|
goto tbdinit;
|
|
}
|
|
|
|
txp->tbd_number = segment;
|
|
txp->mb_head = mb_head;
|
|
|
|
/*
|
|
* Finish the initialization of this TxCB.
|
|
*/
|
|
txp->cb_status = 0;
|
|
txp->cb_command =
|
|
FXP_CB_COMMAND_XMIT | FXP_CB_COMMAND_SF | FXP_CB_COMMAND_S;
|
|
txp->tx_threshold = tx_threshold;
|
|
|
|
/*
|
|
* Advance the end-of-list forward.
|
|
*/
|
|
sc->cbl_last->cb_command &= ~FXP_CB_COMMAND_S;
|
|
sc->cbl_last = txp;
|
|
|
|
/*
|
|
* Advance the beginning of the list forward if there are
|
|
* no other packets queued (when nothing is queued, cbl_first
|
|
* sits on the last TxCB that was sent out)..
|
|
*/
|
|
if (sc->tx_queued == 0)
|
|
sc->cbl_first = txp;
|
|
|
|
sc->tx_queued++;
|
|
|
|
/*
|
|
* Only need to wait prior to the first resume command.
|
|
*/
|
|
if (first) {
|
|
first--;
|
|
fxp_scb_wait(sc);
|
|
}
|
|
|
|
/*
|
|
* Resume transmission if suspended.
|
|
*/
|
|
CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, FXP_SCB_COMMAND_CU_RESUME);
|
|
|
|
#if NBPFILTER > 0
|
|
/*
|
|
* Pass packet to bpf if there is a listener.
|
|
*/
|
|
if (ifp->if_bpf)
|
|
bpf_mtap(FXP_BPFTAP_ARG(ifp), mb_head);
|
|
#endif
|
|
/*
|
|
* Set a 5 second timer just in case we don't hear from the
|
|
* card again.
|
|
*/
|
|
ifp->if_timer = 5;
|
|
|
|
goto txloop;
|
|
}
|
|
|
|
/*
|
|
* Process interface interrupts.
|
|
*/
|
|
static FXP_INTR_TYPE
|
|
fxp_intr(arg)
|
|
void *arg;
|
|
{
|
|
struct fxp_softc *sc = arg;
|
|
struct ifnet *ifp = &sc->sc_if;
|
|
u_int8_t statack;
|
|
#if defined(__NetBSD__)
|
|
int claimed = 0;
|
|
#endif
|
|
|
|
while ((statack = CSR_READ_1(sc, FXP_CSR_SCB_STATACK)) != 0) {
|
|
#if defined(__NetBSD__)
|
|
claimed = 1;
|
|
#endif
|
|
/*
|
|
* First ACK all the interrupts in this pass.
|
|
*/
|
|
CSR_WRITE_1(sc, FXP_CSR_SCB_STATACK, statack);
|
|
|
|
/*
|
|
* Free any finished transmit mbuf chains.
|
|
*/
|
|
if (statack & FXP_SCB_STATACK_CNA) {
|
|
struct fxp_cb_tx *txp;
|
|
|
|
for (txp = sc->cbl_first;
|
|
(txp->cb_status & FXP_CB_STATUS_C) != 0;
|
|
txp = txp->next) {
|
|
if (txp->mb_head != NULL) {
|
|
m_freem(txp->mb_head);
|
|
txp->mb_head = NULL;
|
|
sc->tx_queued--;
|
|
}
|
|
if (txp == sc->cbl_last)
|
|
break;
|
|
}
|
|
sc->cbl_first = txp;
|
|
ifp->if_timer = 0;
|
|
/*
|
|
* Try to start more packets transmitting.
|
|
*/
|
|
if (ifp->if_snd.ifq_head != NULL)
|
|
fxp_start(ifp);
|
|
}
|
|
/*
|
|
* Process receiver interrupts. If a no-resource (RNR)
|
|
* condition exists, get whatever packets we can and
|
|
* re-start the receiver.
|
|
*/
|
|
if (statack & (FXP_SCB_STATACK_FR | FXP_SCB_STATACK_RNR)) {
|
|
struct mbuf *m;
|
|
struct fxp_rfa *rfa;
|
|
rcvloop:
|
|
m = sc->rfa_headm;
|
|
rfa = (struct fxp_rfa *)(m->m_ext.ext_buf +
|
|
RFA_ALIGNMENT_FUDGE);
|
|
|
|
if (rfa->rfa_status & FXP_RFA_STATUS_C) {
|
|
/*
|
|
* Remove first packet from the chain.
|
|
*/
|
|
sc->rfa_headm = m->m_next;
|
|
m->m_next = NULL;
|
|
|
|
/*
|
|
* Add a new buffer to the receive chain.
|
|
* If this fails, the old buffer is recycled
|
|
* instead.
|
|
*/
|
|
if (fxp_add_rfabuf(sc, m) == 0) {
|
|
struct ether_header *eh;
|
|
u_int16_t total_len;
|
|
|
|
total_len = rfa->actual_size &
|
|
(MCLBYTES - 1);
|
|
if (total_len <
|
|
sizeof(struct ether_header)) {
|
|
m_freem(m);
|
|
goto rcvloop;
|
|
}
|
|
m->m_pkthdr.rcvif = ifp;
|
|
m->m_pkthdr.len = m->m_len =
|
|
total_len -
|
|
sizeof(struct ether_header);
|
|
eh = mtod(m, struct ether_header *);
|
|
#if NBPFILTER > 0
|
|
if (ifp->if_bpf) {
|
|
bpf_tap(FXP_BPFTAP_ARG(ifp),
|
|
mtod(m, caddr_t),
|
|
total_len);
|
|
/*
|
|
* Only pass this packet up
|
|
* if it is for us.
|
|
*/
|
|
if ((ifp->if_flags &
|
|
IFF_PROMISC) &&
|
|
(rfa->rfa_status &
|
|
FXP_RFA_STATUS_IAMATCH) &&
|
|
(eh->ether_dhost[0] & 1)
|
|
== 0) {
|
|
m_freem(m);
|
|
goto rcvloop;
|
|
}
|
|
}
|
|
#endif /* NBPFILTER > 0 */
|
|
m->m_data +=
|
|
sizeof(struct ether_header);
|
|
ether_input(ifp, eh, m);
|
|
}
|
|
goto rcvloop;
|
|
}
|
|
if (statack & FXP_SCB_STATACK_RNR) {
|
|
fxp_scb_wait(sc);
|
|
CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL,
|
|
vtophys(sc->rfa_headm->m_ext.ext_buf) +
|
|
RFA_ALIGNMENT_FUDGE);
|
|
CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND,
|
|
FXP_SCB_COMMAND_RU_START);
|
|
}
|
|
}
|
|
}
|
|
#if defined(__NetBSD__)
|
|
return (claimed);
|
|
#endif
|
|
}
|
|
|
|
/*
|
|
* Update packet in/out/collision statistics. The i82557 doesn't
|
|
* allow you to access these counters without doing a fairly
|
|
* expensive DMA to get _all_ of the statistics it maintains, so
|
|
* we do this operation here only once per second. The statistics
|
|
* counters in the kernel are updated from the previous dump-stats
|
|
* DMA and then a new dump-stats DMA is started. The on-chip
|
|
* counters are zeroed when the DMA completes. If we can't start
|
|
* the DMA immediately, we don't wait - we just prepare to read
|
|
* them again next time.
|
|
*/
|
|
void
|
|
fxp_stats_update(arg)
|
|
void *arg;
|
|
{
|
|
struct fxp_softc *sc = arg;
|
|
struct ifnet *ifp = &sc->sc_if;
|
|
struct fxp_stats *sp = sc->fxp_stats;
|
|
|
|
ifp->if_opackets += sp->tx_good;
|
|
ifp->if_collisions += sp->tx_total_collisions;
|
|
ifp->if_ipackets += sp->rx_good;
|
|
ifp->if_ierrors +=
|
|
sp->rx_crc_errors +
|
|
sp->rx_alignment_errors +
|
|
sp->rx_rnr_errors +
|
|
sp->rx_overrun_errors;
|
|
/*
|
|
* If any transmit underruns occured, bump up the transmit
|
|
* threshold by another 512 bytes (64 * 8).
|
|
*/
|
|
if (sp->tx_underruns) {
|
|
ifp->if_oerrors += sp->tx_underruns;
|
|
if (tx_threshold < 192)
|
|
tx_threshold += 64;
|
|
}
|
|
/*
|
|
* If there is no pending command, start another stats
|
|
* dump. Otherwise punt for now.
|
|
*/
|
|
if ((CSR_READ_1(sc, FXP_CSR_SCB_COMMAND) &
|
|
FXP_SCB_COMMAND_MASK) == 0) {
|
|
/*
|
|
* Start another stats dump. By waiting for it to be
|
|
* accepted, we avoid having to do splhigh locking when
|
|
* writing scb_command in other parts of the driver.
|
|
*/
|
|
CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND,
|
|
FXP_SCB_COMMAND_CU_DUMPRESET);
|
|
fxp_scb_wait(sc);
|
|
} else {
|
|
/*
|
|
* A previous command is still waiting to be accepted.
|
|
* Just zero our copy of the stats and wait for the
|
|
* next timer event to update them.
|
|
*/
|
|
sp->tx_good = 0;
|
|
sp->tx_underruns = 0;
|
|
sp->tx_total_collisions = 0;
|
|
|
|
sp->rx_good = 0;
|
|
sp->rx_crc_errors = 0;
|
|
sp->rx_alignment_errors = 0;
|
|
sp->rx_rnr_errors = 0;
|
|
sp->rx_overrun_errors = 0;
|
|
}
|
|
/*
|
|
* Schedule another timeout one second from now.
|
|
*/
|
|
timeout(fxp_stats_update, sc, hz);
|
|
}
|
|
|
|
/*
|
|
* Stop the interface. Cancels the statistics updater and resets
|
|
* the interface.
|
|
*/
|
|
static void
|
|
fxp_stop(sc)
|
|
struct fxp_softc *sc;
|
|
{
|
|
struct ifnet *ifp = &sc->sc_if;
|
|
struct fxp_cb_tx *txp;
|
|
int i;
|
|
|
|
/*
|
|
* Cancel stats updater.
|
|
*/
|
|
untimeout(fxp_stats_update, sc);
|
|
|
|
/*
|
|
* Issue software reset
|
|
*/
|
|
CSR_WRITE_4(sc, FXP_CSR_PORT, FXP_PORT_SELECTIVE_RESET);
|
|
DELAY(10);
|
|
|
|
/*
|
|
* Release any xmit buffers.
|
|
*/
|
|
for (txp = sc->cbl_first; txp != NULL && txp->mb_head != NULL;
|
|
txp = txp->next) {
|
|
m_freem(txp->mb_head);
|
|
txp->mb_head = NULL;
|
|
}
|
|
sc->tx_queued = 0;
|
|
|
|
/*
|
|
* Free all the receive buffers then reallocate/reinitialize
|
|
*/
|
|
if (sc->rfa_headm != NULL)
|
|
m_freem(sc->rfa_headm);
|
|
sc->rfa_headm = NULL;
|
|
sc->rfa_tailm = NULL;
|
|
for (i = 0; i < FXP_NRFABUFS; i++) {
|
|
if (fxp_add_rfabuf(sc, NULL) != 0) {
|
|
/*
|
|
* This "can't happen" - we're at splimp()
|
|
* and we just freed all the buffers we need
|
|
* above.
|
|
*/
|
|
panic("fxp_stop: no buffers!");
|
|
}
|
|
}
|
|
|
|
ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE);
|
|
ifp->if_timer = 0;
|
|
}
|
|
|
|
/*
|
|
* Watchdog/transmission transmit timeout handler. Called when a
|
|
* transmission is started on the interface, but no interrupt is
|
|
* received before the timeout. This usually indicates that the
|
|
* card has wedged for some reason.
|
|
*/
|
|
static void
|
|
fxp_watchdog(ifp)
|
|
struct ifnet *ifp;
|
|
{
|
|
struct fxp_softc *sc = ifp->if_softc;
|
|
|
|
log(LOG_ERR, FXP_FORMAT ": device timeout\n", FXP_ARGS(sc));
|
|
ifp->if_oerrors++;
|
|
|
|
fxp_init(sc);
|
|
}
|
|
|
|
static void
|
|
fxp_init(xsc)
|
|
void *xsc;
|
|
{
|
|
struct fxp_softc *sc = xsc;
|
|
struct ifnet *ifp = &sc->sc_if;
|
|
struct fxp_cb_config *cbp;
|
|
struct fxp_cb_ias *cb_ias;
|
|
struct fxp_cb_tx *txp;
|
|
int i, s, mcast, prm;
|
|
|
|
s = splimp();
|
|
/*
|
|
* Cancel any pending I/O
|
|
*/
|
|
fxp_stop(sc);
|
|
|
|
prm = (ifp->if_flags & IFF_PROMISC) ? 1 : 0;
|
|
sc->promisc_mode = prm;
|
|
/*
|
|
* Sleeze out here and enable reception of all multicasts if
|
|
* multicasts are enabled. Ideally, we'd program the multicast
|
|
* address filter to only accept specific multicasts.
|
|
*/
|
|
mcast = (ifp->if_flags & (IFF_MULTICAST|IFF_ALLMULTI)) ? 1 : 0;
|
|
|
|
/*
|
|
* Initialize base of CBL and RFA memory. Loading with zero
|
|
* sets it up for regular linear addressing.
|
|
*/
|
|
CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL, 0);
|
|
CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, FXP_SCB_COMMAND_CU_BASE);
|
|
|
|
fxp_scb_wait(sc);
|
|
CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, FXP_SCB_COMMAND_RU_BASE);
|
|
|
|
/*
|
|
* Initialize base of dump-stats buffer.
|
|
*/
|
|
fxp_scb_wait(sc);
|
|
CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL, vtophys(sc->fxp_stats));
|
|
CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, FXP_SCB_COMMAND_CU_DUMP_ADR);
|
|
|
|
/*
|
|
* We temporarily use memory that contains the TxCB list to
|
|
* construct the config CB. The TxCB list memory is rebuilt
|
|
* later.
|
|
*/
|
|
cbp = (struct fxp_cb_config *) sc->cbl_base;
|
|
|
|
/*
|
|
* This bcopy is kind of disgusting, but there are a bunch of must be
|
|
* zero and must be one bits in this structure and this is the easiest
|
|
* way to initialize them all to proper values.
|
|
*/
|
|
bcopy(fxp_cb_config_template, cbp, sizeof(struct fxp_cb_config));
|
|
|
|
cbp->cb_status = 0;
|
|
cbp->cb_command = FXP_CB_COMMAND_CONFIG | FXP_CB_COMMAND_EL;
|
|
cbp->link_addr = -1; /* (no) next command */
|
|
cbp->byte_count = 22; /* (22) bytes to config */
|
|
cbp->rx_fifo_limit = 8; /* rx fifo threshold (32 bytes) */
|
|
cbp->tx_fifo_limit = 0; /* tx fifo threshold (0 bytes) */
|
|
cbp->adaptive_ifs = 0; /* (no) adaptive interframe spacing */
|
|
cbp->rx_dma_bytecount = 0; /* (no) rx DMA max */
|
|
cbp->tx_dma_bytecount = 0; /* (no) tx DMA max */
|
|
cbp->dma_bce = 0; /* (disable) dma max counters */
|
|
cbp->late_scb = 0; /* (don't) defer SCB update */
|
|
cbp->tno_int = 0; /* (disable) tx not okay interrupt */
|
|
cbp->ci_int = 0; /* interrupt on CU not active */
|
|
cbp->save_bf = prm; /* save bad frames */
|
|
cbp->disc_short_rx = !prm; /* discard short packets */
|
|
cbp->underrun_retry = 1; /* retry mode (1) on DMA underrun */
|
|
cbp->mediatype = !sc->phy_10Mbps_only; /* interface mode */
|
|
cbp->nsai = 1; /* (don't) disable source addr insert */
|
|
cbp->preamble_length = 2; /* (7 byte) preamble */
|
|
cbp->loopback = 0; /* (don't) loopback */
|
|
cbp->linear_priority = 0; /* (normal CSMA/CD operation) */
|
|
cbp->linear_pri_mode = 0; /* (wait after xmit only) */
|
|
cbp->interfrm_spacing = 6; /* (96 bits of) interframe spacing */
|
|
cbp->promiscuous = prm; /* promiscuous mode */
|
|
cbp->bcast_disable = 0; /* (don't) disable broadcasts */
|
|
cbp->crscdt = 0; /* (CRS only) */
|
|
cbp->stripping = !prm; /* truncate rx packet to byte count */
|
|
cbp->padding = 1; /* (do) pad short tx packets */
|
|
cbp->rcv_crc_xfer = 0; /* (don't) xfer CRC to host */
|
|
cbp->force_fdx = 0; /* (don't) force full duplex */
|
|
cbp->fdx_pin_en = 1; /* (enable) FDX# pin */
|
|
cbp->multi_ia = 0; /* (don't) accept multiple IAs */
|
|
cbp->mc_all = mcast; /* accept all multicasts */
|
|
|
|
/*
|
|
* Start the config command/DMA.
|
|
*/
|
|
fxp_scb_wait(sc);
|
|
CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL, vtophys(cbp));
|
|
CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, FXP_SCB_COMMAND_CU_START);
|
|
/* ...and wait for it to complete. */
|
|
while (!(cbp->cb_status & FXP_CB_STATUS_C));
|
|
|
|
/*
|
|
* Now initialize the station address. Temporarily use the TxCB
|
|
* memory area like we did above for the config CB.
|
|
*/
|
|
cb_ias = (struct fxp_cb_ias *) sc->cbl_base;
|
|
cb_ias->cb_status = 0;
|
|
cb_ias->cb_command = FXP_CB_COMMAND_IAS | FXP_CB_COMMAND_EL;
|
|
cb_ias->link_addr = -1;
|
|
#if defined(__NetBSD__)
|
|
bcopy(LLADDR(ifp->if_sadl), (void *)cb_ias->macaddr, 6);
|
|
#else
|
|
bcopy(sc->arpcom.ac_enaddr, (void *)cb_ias->macaddr,
|
|
sizeof(sc->arpcom.ac_enaddr));
|
|
#endif /* __NetBSD__ */
|
|
|
|
/*
|
|
* Start the IAS (Individual Address Setup) command/DMA.
|
|
*/
|
|
fxp_scb_wait(sc);
|
|
CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, FXP_SCB_COMMAND_CU_START);
|
|
/* ...and wait for it to complete. */
|
|
while (!(cb_ias->cb_status & FXP_CB_STATUS_C));
|
|
|
|
/*
|
|
* Initialize transmit control block (TxCB) list.
|
|
*/
|
|
|
|
txp = sc->cbl_base;
|
|
bzero(txp, sizeof(struct fxp_cb_tx) * FXP_NTXCB);
|
|
for (i = 0; i < FXP_NTXCB; i++) {
|
|
txp[i].cb_status = FXP_CB_STATUS_C | FXP_CB_STATUS_OK;
|
|
txp[i].cb_command = FXP_CB_COMMAND_NOP;
|
|
txp[i].link_addr = vtophys(&txp[(i + 1) & FXP_TXCB_MASK]);
|
|
txp[i].tbd_array_addr = vtophys(&txp[i].tbd[0]);
|
|
txp[i].next = &txp[(i + 1) & FXP_TXCB_MASK];
|
|
}
|
|
/*
|
|
* Set the stop flag on the first TxCB and start the control
|
|
* unit. It will execute the NOP and then suspend.
|
|
*/
|
|
txp->cb_command = FXP_CB_COMMAND_NOP | FXP_CB_COMMAND_S;
|
|
sc->cbl_first = sc->cbl_last = txp;
|
|
sc->tx_queued = 0;
|
|
|
|
fxp_scb_wait(sc);
|
|
CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, FXP_SCB_COMMAND_CU_START);
|
|
|
|
/*
|
|
* Initialize receiver buffer area - RFA.
|
|
*/
|
|
fxp_scb_wait(sc);
|
|
CSR_WRITE_4(sc, FXP_CSR_SCB_GENERAL,
|
|
vtophys(sc->rfa_headm->m_ext.ext_buf) + RFA_ALIGNMENT_FUDGE);
|
|
CSR_WRITE_1(sc, FXP_CSR_SCB_COMMAND, FXP_SCB_COMMAND_RU_START);
|
|
|
|
/*
|
|
* Set current media.
|
|
*/
|
|
fxp_set_media(sc, sc->sc_media.ifm_cur->ifm_media);
|
|
|
|
ifp->if_flags |= IFF_RUNNING;
|
|
ifp->if_flags &= ~IFF_OACTIVE;
|
|
splx(s);
|
|
|
|
/*
|
|
* Start stats updater.
|
|
*/
|
|
timeout(fxp_stats_update, sc, hz);
|
|
}
|
|
|
|
void
|
|
fxp_set_media(sc, media)
|
|
struct fxp_softc *sc;
|
|
int media;
|
|
{
|
|
|
|
switch (sc->phy_primary_device) {
|
|
case FXP_PHY_DP83840:
|
|
case FXP_PHY_DP83840A:
|
|
fxp_mdi_write(sc, sc->phy_primary_addr, FXP_DP83840_PCR,
|
|
fxp_mdi_read(sc, sc->phy_primary_addr, FXP_DP83840_PCR) |
|
|
FXP_DP83840_PCR_LED4_MODE | /* LED4 always indicates duplex */
|
|
FXP_DP83840_PCR_F_CONNECT | /* force link disconnect bypass */
|
|
FXP_DP83840_PCR_BIT10); /* XXX I have no idea */
|
|
/* fall through */
|
|
case FXP_PHY_82555:
|
|
if (IFM_SUBTYPE(media) != IFM_AUTO) {
|
|
int flags;
|
|
|
|
flags = (IFM_SUBTYPE(media) == IFM_100_TX) ?
|
|
FXP_PHY_BMCR_SPEED_100M : 0;
|
|
flags |= (media & IFM_FDX) ?
|
|
FXP_PHY_BMCR_FULLDUPLEX : 0;
|
|
fxp_mdi_write(sc, sc->phy_primary_addr,
|
|
FXP_PHY_BMCR,
|
|
(fxp_mdi_read(sc, sc->phy_primary_addr,
|
|
FXP_PHY_BMCR) &
|
|
~(FXP_PHY_BMCR_AUTOEN | FXP_PHY_BMCR_SPEED_100M |
|
|
FXP_PHY_BMCR_FULLDUPLEX)) | flags);
|
|
} else {
|
|
fxp_mdi_write(sc, sc->phy_primary_addr,
|
|
FXP_PHY_BMCR,
|
|
(fxp_mdi_read(sc, sc->phy_primary_addr,
|
|
FXP_PHY_BMCR) | FXP_PHY_BMCR_AUTOEN));
|
|
}
|
|
break;
|
|
/*
|
|
* The Seeq 80c24 doesn't have a PHY programming interface, so do
|
|
* nothing.
|
|
*/
|
|
case FXP_PHY_80C24:
|
|
break;
|
|
default:
|
|
printf(FXP_FORMAT
|
|
": warning: unsupported PHY, type = %d, addr = %d\n",
|
|
FXP_ARGS(sc), sc->phy_primary_device,
|
|
sc->phy_primary_addr);
|
|
}
|
|
}
|
|
|
|
/*
|
|
* Change media according to request.
|
|
*/
|
|
int
|
|
fxp_mediachange(ifp)
|
|
struct ifnet *ifp;
|
|
{
|
|
struct fxp_softc *sc = ifp->if_softc;
|
|
struct ifmedia *ifm = &sc->sc_media;
|
|
|
|
if (IFM_TYPE(ifm->ifm_media) != IFM_ETHER)
|
|
return (EINVAL);
|
|
|
|
fxp_set_media(sc, ifm->ifm_media);
|
|
return (0);
|
|
}
|
|
|
|
/*
|
|
* Notify the world which media we're using.
|
|
*/
|
|
void
|
|
fxp_mediastatus(ifp, ifmr)
|
|
struct ifnet *ifp;
|
|
struct ifmediareq *ifmr;
|
|
{
|
|
struct fxp_softc *sc = ifp->if_softc;
|
|
int flags;
|
|
|
|
switch (sc->phy_primary_device) {
|
|
case FXP_PHY_DP83840:
|
|
case FXP_PHY_DP83840A:
|
|
case FXP_PHY_82555:
|
|
flags = fxp_mdi_read(sc, sc->phy_primary_addr, FXP_PHY_BMCR);
|
|
ifmr->ifm_active = IFM_ETHER;
|
|
if (flags & FXP_PHY_BMCR_AUTOEN)
|
|
ifmr->ifm_active |= IFM_AUTO;
|
|
else {
|
|
if (flags & FXP_PHY_BMCR_SPEED_100M)
|
|
ifmr->ifm_active |= IFM_100_TX;
|
|
else
|
|
ifmr->ifm_active |= IFM_10_T;
|
|
|
|
if (flags & FXP_PHY_BMCR_FULLDUPLEX)
|
|
ifmr->ifm_active |= IFM_FDX;
|
|
}
|
|
break;
|
|
|
|
case FXP_PHY_80C24:
|
|
default:
|
|
ifmr->ifm_active = IFM_ETHER|IFM_MANUAL; /* XXX IFM_AUTO ? */
|
|
}
|
|
}
|
|
|
|
/*
|
|
* Add a buffer to the end of the RFA buffer list.
|
|
* Return 0 if successful, 1 for failure. A failure results in
|
|
* adding the 'oldm' (if non-NULL) on to the end of the list -
|
|
* tossing out it's old contents and recycling it.
|
|
* The RFA struct is stuck at the beginning of mbuf cluster and the
|
|
* data pointer is fixed up to point just past it.
|
|
*/
|
|
static int
|
|
fxp_add_rfabuf(sc, oldm)
|
|
struct fxp_softc *sc;
|
|
struct mbuf *oldm;
|
|
{
|
|
u_int32_t v;
|
|
struct mbuf *m;
|
|
struct fxp_rfa *rfa, *p_rfa;
|
|
|
|
MGETHDR(m, M_DONTWAIT, MT_DATA);
|
|
if (m != NULL) {
|
|
MCLGET(m, M_DONTWAIT);
|
|
if ((m->m_flags & M_EXT) == 0) {
|
|
m_freem(m);
|
|
if (oldm == NULL)
|
|
return 1;
|
|
m = oldm;
|
|
m->m_data = m->m_ext.ext_buf;
|
|
}
|
|
} else {
|
|
if (oldm == NULL)
|
|
return 1;
|
|
m = oldm;
|
|
m->m_data = m->m_ext.ext_buf;
|
|
}
|
|
|
|
/*
|
|
* Move the data pointer up so that the incoming data packet
|
|
* will be 32-bit aligned.
|
|
*/
|
|
m->m_data += RFA_ALIGNMENT_FUDGE;
|
|
|
|
/*
|
|
* Get a pointer to the base of the mbuf cluster and move
|
|
* data start past it.
|
|
*/
|
|
rfa = mtod(m, struct fxp_rfa *);
|
|
m->m_data += sizeof(struct fxp_rfa);
|
|
rfa->size = MCLBYTES - sizeof(struct fxp_rfa) - RFA_ALIGNMENT_FUDGE;
|
|
|
|
/*
|
|
* Initialize the rest of the RFA. Note that since the RFA
|
|
* is misaligned, we cannot store values directly. Instead,
|
|
* we use an optimized, inline copy.
|
|
*/
|
|
rfa->rfa_status = 0;
|
|
rfa->rfa_control = FXP_RFA_CONTROL_EL;
|
|
rfa->actual_size = 0;
|
|
|
|
v = -1;
|
|
fxp_lwcopy(&v, &rfa->link_addr);
|
|
fxp_lwcopy(&v, &rfa->rbd_addr);
|
|
|
|
/*
|
|
* If there are other buffers already on the list, attach this
|
|
* one to the end by fixing up the tail to point to this one.
|
|
*/
|
|
if (sc->rfa_headm != NULL) {
|
|
p_rfa = (struct fxp_rfa *) (sc->rfa_tailm->m_ext.ext_buf +
|
|
RFA_ALIGNMENT_FUDGE);
|
|
sc->rfa_tailm->m_next = m;
|
|
v = vtophys(rfa);
|
|
fxp_lwcopy(&v, &p_rfa->link_addr);
|
|
p_rfa->rfa_control &= ~FXP_RFA_CONTROL_EL;
|
|
} else {
|
|
sc->rfa_headm = m;
|
|
}
|
|
sc->rfa_tailm = m;
|
|
|
|
return (m == oldm);
|
|
}
|
|
|
|
static volatile int
|
|
fxp_mdi_read(sc, phy, reg)
|
|
struct fxp_softc *sc;
|
|
int phy;
|
|
int reg;
|
|
{
|
|
int count = 10000;
|
|
int value;
|
|
|
|
CSR_WRITE_4(sc, FXP_CSR_MDICONTROL,
|
|
(FXP_MDI_READ << 26) | (reg << 16) | (phy << 21));
|
|
|
|
while (((value = CSR_READ_4(sc, FXP_CSR_MDICONTROL)) & 0x10000000) == 0
|
|
&& count--)
|
|
DELAY(10);
|
|
|
|
if (count <= 0)
|
|
printf(FXP_FORMAT ": fxp_mdi_read: timed out\n",
|
|
FXP_ARGS(sc));
|
|
|
|
return (value & 0xffff);
|
|
}
|
|
|
|
static void
|
|
fxp_mdi_write(sc, phy, reg, value)
|
|
struct fxp_softc *sc;
|
|
int phy;
|
|
int reg;
|
|
int value;
|
|
{
|
|
int count = 10000;
|
|
|
|
CSR_WRITE_4(sc, FXP_CSR_MDICONTROL,
|
|
(FXP_MDI_WRITE << 26) | (reg << 16) | (phy << 21) |
|
|
(value & 0xffff));
|
|
|
|
while((CSR_READ_4(sc, FXP_CSR_MDICONTROL) & 0x10000000) == 0 &&
|
|
count--)
|
|
DELAY(10);
|
|
|
|
if (count <= 0)
|
|
printf(FXP_FORMAT ": fxp_mdi_write: timed out\n",
|
|
FXP_ARGS(sc));
|
|
}
|
|
|
|
static int
|
|
fxp_ioctl(ifp, command, data)
|
|
struct ifnet *ifp;
|
|
FXP_IOCTLCMD_TYPE command;
|
|
caddr_t data;
|
|
{
|
|
struct fxp_softc *sc = ifp->if_softc;
|
|
struct ifreq *ifr = (struct ifreq *)data;
|
|
int s, error = 0;
|
|
|
|
s = splimp();
|
|
|
|
switch (command) {
|
|
|
|
case SIOCSIFADDR:
|
|
#if !defined(__NetBSD__)
|
|
case SIOCGIFADDR:
|
|
case SIOCSIFMTU:
|
|
#endif
|
|
error = ether_ioctl(ifp, command, data);
|
|
break;
|
|
|
|
case SIOCSIFFLAGS:
|
|
|
|
/*
|
|
* If interface is marked up and not running, then start it.
|
|
* If it is marked down and running, stop it.
|
|
* XXX If it's up then re-initialize it. This is so flags
|
|
* such as IFF_PROMISC are handled.
|
|
*/
|
|
if (ifp->if_flags & IFF_UP) {
|
|
fxp_init(sc);
|
|
} else {
|
|
if (ifp->if_flags & IFF_RUNNING)
|
|
fxp_stop(sc);
|
|
}
|
|
break;
|
|
|
|
case SIOCADDMULTI:
|
|
case SIOCDELMULTI:
|
|
#if defined(__NetBSD__)
|
|
{
|
|
struct ifreq *ifr = (struct ifreq *) data;
|
|
|
|
error = (command == SIOCADDMULTI) ?
|
|
ether_addmulti(ifr, &sc->sc_ethercom) :
|
|
ether_delmulti(ifr, &sc->sc_ethercom);
|
|
|
|
if (error == ENETRESET) {
|
|
/*
|
|
* Multicast list has changed; set the hardware
|
|
* filter accordingly.
|
|
*/
|
|
fxp_init(sc);
|
|
error = 0;
|
|
}
|
|
}
|
|
#else /* __FreeBSD__ */
|
|
/*
|
|
* Multicast list has changed; set the hardware filter
|
|
* accordingly.
|
|
*/
|
|
fxp_init(sc);
|
|
error = 0;
|
|
#endif /* __NetBSD__ */
|
|
break;
|
|
|
|
case SIOCSIFMEDIA:
|
|
case SIOCGIFMEDIA:
|
|
error = ifmedia_ioctl(ifp, ifr, &sc->sc_media, command);
|
|
break;
|
|
|
|
default:
|
|
error = EINVAL;
|
|
}
|
|
(void) splx(s);
|
|
return (error);
|
|
}
|