(1) Invoke cpp to bring in files via #include (although the old /include/ stuff is supported still). (2) bring in files from either vendor tree or freebsd-custom files when building. (3) move all dts* files from sys/boot/fdt/dts to sys/boot/fdt/dts/${MACHINE} as appropriate. (4) encode all the magic to do the build in sys/tools/fdt/make_dtb.sh so that the different places in the tree use the exact same logic. (5) switch back to gpl dtc by default. the bsdl one in the tree has significant issues not easily addressed by those unfamiliar with the code.
493 lines
11 KiB
Plaintext
493 lines
11 KiB
Plaintext
/*-
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* Copyright (c) 2013-2014 Ruslan Bukin <br@bsdpad.com>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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/ {
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model = "Freescale Vybrid Family";
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compatible = "freescale,vybrid", "fsl,mvf";
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#address-cells = <1>;
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#size-cells = <1>;
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interrupt-parent = <&GIC>;
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aliases {
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soc = &SOC;
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serial0 = &serial0;
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serial1 = &serial1;
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sai0 = &sai0;
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sai1 = &sai1;
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sai2 = &sai2;
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sai3 = &sai3;
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esai = &esai;
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adc0 = &adc0;
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adc1 = &adc1;
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edma0 = &edma0;
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edma1 = &edma1;
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src = &SRC;
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};
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SOC: vybrid {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "simple-bus";
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ranges;
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bus-frequency = <0>;
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SRC: src@4006E000 {
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compatible = "fsl,mvf600-src";
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reg = <0x4006E000 0x100>;
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};
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mscm@40001000 {
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compatible = "fsl,mvf600-mscm";
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reg = <0x40001000 0x1000>;
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};
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GIC: interrupt-controller@01c81000 {
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compatible = "arm,gic";
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reg = <0x40003000 0x1000>, /* Distributor Registers */
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<0x40002100 0x100>; /* CPU Interface Registers */
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interrupt-controller;
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#interrupt-cells = <1>;
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};
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anadig@40050000 {
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compatible = "fsl,mvf600-anadig";
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reg = <0x40050000 0x300>;
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};
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ccm@4006b000 {
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compatible = "fsl,mvf600-ccm";
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reg = <0x4006b000 0x1000>;
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clock_names = "pll4";
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};
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mp_tmr@40002100 {
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compatible = "arm,mpcore-timers";
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clock-frequency = <133000000>;
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#address-cells = <1>;
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#size-cells = <0>;
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reg = < 0x40002200 0x100 >, /* Global Timer Registers */
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< 0x40002600 0x100 >; /* Private Timer Registers */
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interrupts = < 27 29 >;
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interrupt-parent = < &GIC >;
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};
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dmamux@40024000 {
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compatible = "fsl,mvf600-dmamux";
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reg = <0x40024000 0x100>,
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<0x40025000 0x100>,
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<0x400A1000 0x100>,
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<0x400A2000 0x100>;
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};
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edma0: edma@40018000 {
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compatible = "fsl,mvf600-edma";
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reg = <0x40018000 0x1000>,
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<0x40019000 0x1000>; /* TCD */
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interrupts = < 40 41 >;
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interrupt-parent = <&GIC>;
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device-id = < 0 >;
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status = "disabled";
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};
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edma1: edma@40098000 {
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compatible = "fsl,mvf600-edma";
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reg = <0x40098000 0x1000>,
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<0x40099000 0x1000>; /* TCD */
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interrupts = < 42 43 >;
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interrupt-parent = <&GIC>;
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device-id = < 1 >;
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status = "disabled";
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};
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pit@40037000 {
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compatible = "fsl,mvf600-pit";
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reg = <0x40037000 0x1000>;
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interrupts = < 71 >;
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interrupt-parent = <&GIC>;
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clock-frequency = < 24000000 >;
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};
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lptmr@40040000 {
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compatible = "fsl,mvf600-lptmr";
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reg = <0x40040000 0x1000>;
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interrupts = < 72 >;
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interrupt-parent = <&GIC>;
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clock-frequency = < 24000000 >;
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};
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iomuxc@40048000 {
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compatible = "fsl,mvf600-iomuxc";
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reg = <0x40048000 0x1000>;
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};
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gpio@400FF000 {
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compatible = "fsl,mvf600-gpio";
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reg = <0x400FF000 0x200>;
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#gpio-cells = <3>;
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gpio-controller;
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interrupts = < 139 140 141 142 143 >;
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interrupt-parent = <&GIC>;
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};
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nand@400E0000 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "fsl,mvf600-nand";
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reg = <0x400E0000 0x10000>;
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interrupts = < 115 >;
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interrupt-parent = <&GIC>;
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clock_names = "nand";
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status = "disabled";
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partition@40000 {
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reg = <0x40000 0x200000>; /* 2MB */
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label = "u-boot";
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read-only;
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};
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partition@240000 {
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reg = <0x240000 0x200000>; /* 2MB */
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label = "test";
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};
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partition@440000 {
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reg = <0x440000 0xa00000>; /* 10MB */
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label = "kernel";
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};
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partition@e40000 {
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reg = <0xe40000 0x1e000000>; /* 480MB */
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label = "root";
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};
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};
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sdhci0: sdhci@400B1000 {
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compatible = "fsl,mvf600-sdhci";
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reg = <0x400B1000 0x1000>;
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interrupts = < 59 >;
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interrupt-parent = <&GIC>;
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clock-frequency = <50000000>;
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status = "disabled";
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clock_names = "esdhc0";
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};
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sdhci1: sdhci@400B2000 {
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compatible = "fsl,mvf600-sdhci";
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reg = <0x400B2000 0x1000>;
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interrupts = < 60 >;
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interrupt-parent = <&GIC>;
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clock-frequency = <50000000>;
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status = "disabled";
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clock_names = "esdhc1";
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iomux_config = < 14 0x500060
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15 0x500060
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16 0x500060
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17 0x500060
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18 0x500060
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19 0x500060 >;
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};
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serial0: serial@40027000 {
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compatible = "fsl,mvf600-uart";
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reg = <0x40027000 0x1000>;
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interrupts = <93>;
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interrupt-parent = <&GIC>;
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current-speed = <115200>;
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clock-frequency = < 24000000 >;
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status = "disabled";
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};
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serial1: serial@40028000 {
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compatible = "fsl,mvf600-uart";
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reg = <0x40028000 0x1000>;
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interrupts = <94>;
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interrupt-parent = <&GIC>;
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current-speed = <115200>;
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clock-frequency = < 24000000 >;
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status = "disabled";
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};
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usb@40034000 {
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compatible = "fsl,mvf600-usb-ehci", "usb-ehci";
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reg = < 0x40034000 0x1000 >, /* ehci */
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< 0x40035000 0x1000 >, /* usbc */
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< 0x40050800 0x100 >; /* phy */
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interrupts = < 107 >;
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interrupt-parent = <&GIC>;
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iomux_config = < 134 0x0001be
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7 0x200060 >;
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};
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usb@400b4000 {
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compatible = "fsl,mvf600-usb-ehci", "usb-ehci";
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reg = < 0x400b4000 0x1000 >, /* ehci */
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< 0x400b5000 0x1000 >, /* usbc */
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< 0x40050C00 0x100 >; /* phy */
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interrupts = < 108 >;
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interrupt-parent = <&GIC>;
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iomux_config = < 134 0x0001be
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7 0x200060 >;
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};
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fec0: ethernet@400D0000 {
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compatible = "fsl,mvf600-fec";
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reg = <0x400D0000 0x1000>;
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interrupts = < 110 >;
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interrupt-parent = <&GIC>;
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phy-mode = "rmii";
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phy-disable-preamble;
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status = "disabled";
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clock_names = "enet";
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iomux_config = < 45 0x100061
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46 0x100061
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47 0x100061
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48 0x100060
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49 0x100060
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50 0x100060
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51 0x100060
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52 0x100060
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53 0x100060 >;
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};
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fec1: ethernet@400D1000 {
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compatible = "fsl,mvf600-fec";
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reg = <0x400D1000 0x1000>;
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interrupts = < 111 >;
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interrupt-parent = <&GIC>;
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phy-mode = "rmii";
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phy-disable-preamble;
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status = "disabled";
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clock_names = "enet";
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iomux_config = < 54 0x103192
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55 0x103193
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56 0x103191
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57 0x103191
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58 0x103191
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59 0x103191
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60 0x103192
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61 0x103192
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62 0x103192 >;
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};
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sai0: sai@4002F000 {
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compatible = "fsl,mvf600-sai";
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reg = <0x4002F000 0x1000>;
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interrupts = < 116 >;
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interrupt-parent = <&GIC>;
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status = "disabled";
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};
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sai1: sai@40030000 {
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compatible = "fsl,mvf600-sai";
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reg = <0x40030000 0x1000>;
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interrupts = < 117 >;
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interrupt-parent = <&GIC>;
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status = "disabled";
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};
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sai2: sai@40031000 {
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compatible = "fsl,mvf600-sai";
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reg = <0x40031000 0x1000>;
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interrupts = < 118 >;
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interrupt-parent = <&GIC>;
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status = "disabled";
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};
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sai3: sai@40032000 {
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compatible = "fsl,mvf600-sai";
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reg = <0x40032000 0x1000>;
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interrupts = < 119 >;
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interrupt-parent = <&GIC>;
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status = "disabled";
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edma-controller = <&edma1>;
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edma-src-receive = < 8 >;
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edma-src-transmit = < 9 >;
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edma-mux-group = < 1 >;
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clock_names = "sai3", "cko1";
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iomux_config = < 16 0x200060
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19 0x200060
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21 0x200060
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40 0x400061 >; /* CKO1 */
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};
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esai: esai@40062000 {
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compatible = "fsl,mvf600-esai";
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reg = <0x40062000 0x1000>;
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interrupts = < 120 >;
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interrupt-parent = <&GIC>;
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status = "disabled";
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clock_names = "esai";
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iomux_config = < 45 0x400061
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46 0x400061
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47 0x400061
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48 0x400060
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49 0x400060
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50 0x400060
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51 0x400060
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52 0x400060
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78 0x3038df
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40 0x400061 >;
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};
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spi0: spi@4002C000 {
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compatible = "fsl,mvf600-spi";
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reg = <0x4002C000 0x1000>;
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interrupts = < 99 >;
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interrupt-parent = <&GIC>;
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status = "disabled";
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iomux_config = < 40 0x100061
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41 0x100061
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42 0x100060
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43 0x100060
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44 0x100061 >;
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};
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spi1: spi@4002D000 {
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compatible = "fsl,mvf600-spi";
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reg = <0x4002D000 0x1000>;
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interrupts = < 100 >;
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interrupt-parent = <&GIC>;
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status = "disabled";
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};
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spi2: spi@400AC000 {
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compatible = "fsl,mvf600-spi";
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reg = <0x400AC000 0x1000>;
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interrupts = < 101 >;
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interrupt-parent = <&GIC>;
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status = "disabled";
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};
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spi3: spi@400AD000 {
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compatible = "fsl,mvf600-spi";
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reg = <0x400AD000 0x1000>;
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interrupts = < 102 >;
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interrupt-parent = <&GIC>;
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status = "disabled";
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};
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i2c0: i2c@40066000 {
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compatible = "fsl,mvf600-i2c";
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reg = <0x40066000 0x1000>;
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interrupts = < 103 >;
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interrupt-parent = <&GIC>;
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status = "disabled";
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clock_names = "ipg";
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iomux_config = < 36 0x2034d3
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37 0x2034d3
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207 0x1
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208 0x1 >;
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};
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i2c1: i2c@40067000 {
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compatible = "fsl,mvf600-i2c";
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reg = <0x40067000 0x1000>;
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interrupts = < 104 >;
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interrupt-parent = <&GIC>;
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status = "disabled";
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};
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i2c2: i2c@400E6000 {
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compatible = "fsl,mvf600-i2c";
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reg = <0x400E6000 0x1000>;
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interrupts = < 105 >;
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interrupt-parent = <&GIC>;
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status = "disabled";
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};
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i2c3: i2c@400E7000 {
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compatible = "fsl,mvf600-i2c";
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reg = <0x400E7000 0x1000>;
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interrupts = < 106 >;
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interrupt-parent = <&GIC>;
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status = "disabled";
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};
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adc0: adc@4003B000 {
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compatible = "fsl,mvf600-adc";
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reg = <0x4003B000 0x1000>;
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interrupts = < 85 >;
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interrupt-parent = <&GIC>;
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status = "disabled";
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};
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adc1: adc@400BB000 {
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compatible = "fsl,mvf600-adc";
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reg = <0x400BB000 0x1000>;
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interrupts = < 86 >;
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interrupt-parent = <&GIC>;
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status = "disabled";
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};
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tcon0: tcon@4003D000 {
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compatible = "fsl,mvf600-tcon";
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reg = <0x4003D000 0x1000>;
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status = "disabled";
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};
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dcu0: dcu4@40058000 {
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compatible = "fsl,mvf600-dcu4";
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reg = <0x40058000 0x7000>;
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interrupts = < 62 >;
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interrupt-parent = <&GIC>;
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status = "disabled";
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clock_names = "dcu0";
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iomux_config = < 105 0x100044
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106 0x100044
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107 0x100060
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108 0x100060
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109 0x100060
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110 0x100060
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111 0x100060
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112 0x100060
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113 0x100060
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114 0x100060
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115 0x100060
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116 0x100060
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117 0x100060
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118 0x100060
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119 0x100060
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120 0x100060
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121 0x100060
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122 0x100060
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123 0x100060
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124 0x100060
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125 0x100060
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126 0x100060
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127 0x100060
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128 0x100060
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129 0x100060
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130 0x100060
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131 0x100060
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132 0x100060
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133 0x100060 >;
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};
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};
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};
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