* Even though I got the registers around "right", it seems
I'm not tickling the MDIO access correctly for the internal PHY
bus. Some of the switches are fine poking at the external PHY
registers; others aren't. So, enable direct PHY bus access
for the AR8327, and leave the existing code in place for the
others.
* Go and shuffle the register access around. Whilst here,
restore the 2ms delay if changing page.
* Comment out some of the stub printf()s; there's some upcoming
work to add port VLAN support.
Tested:
* AP135 development board
* Carambola2 - AR9331 SoC
78549b94cd