b09fefd1f6
currently supporting sparc64. After a `make depend all` there are three programs; testsoftfloat for testing against the SoftFloat in src/lib/libc/softfloat for reference purposes, testemufloat for testing the emulator source in src/lib/libc/sparc64/fpu and testfloat for testing with the installed libc. Support for other architectures can be added as needed. PR: 144900 Submitted by: Peter Jeremy
187 lines
4.2 KiB
ArmAsm
187 lines
4.2 KiB
ArmAsm
/*-
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* Copyright (c) 2010 by Peter Jeremy <peterjeremy@acm.org>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
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* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
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* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <machine/asm.h>
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__FBSDID("$FreeBSD$");
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.section "rodata1",#alloc
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.align 8
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.global insn_int32_to_float32
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insn_int32_to_float32:
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fitos %f0,%f0
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.global insn_int32_to_float64
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insn_int32_to_float64:
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fitod %f0,%f0
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.global insn_int32_to_float128
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insn_int32_to_float128:
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fitoq %f0,%f0
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.global insn_int64_to_float32
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insn_int64_to_float32:
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fxtos %f0,%f0
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.global insn_int64_to_float64
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insn_int64_to_float64:
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fxtod %f0,%f0
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.global insn_int64_to_float128
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insn_int64_to_float128:
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fxtoq %f0,%f0
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.global insn_float32_to_int32_round_to_zero
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insn_float32_to_int32_round_to_zero:
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fstoi %f0,%f0
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.global insn_float32_to_int64_round_to_zero
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insn_float32_to_int64_round_to_zero:
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fstox %f0,%f0
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.global insn_float32_to_float64
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insn_float32_to_float64:
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fstod %f0,%f0
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.global insn_float32_to_float128
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insn_float32_to_float128:
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fstoq %f0,%f0
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.global insn_float32_add
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insn_float32_add:
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fadds %f0,%f1,%f0
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.global insn_float32_sub
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insn_float32_sub:
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fsubs %f0,%f1,%f0
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.global insn_float32_mul
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insn_float32_mul:
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fmuls %f0,%f1,%f0
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.global insn_float32_div
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insn_float32_div:
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fdivs %f0,%f1,%f0
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.global insn_float32_sqrt
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insn_float32_sqrt:
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fsqrts %f0,%f0
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.global insn_float32_cmp
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insn_float32_cmp:
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fcmps %fcc0,%f0,%f1
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.global insn_float32_cmpe
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insn_float32_cmpe:
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fcmpes %fcc0,%f0,%f1
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.global insn_float64_to_int32_round_to_zero
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insn_float64_to_int32_round_to_zero:
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fdtoi %f0,%f0
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.global insn_float64_to_int64_round_to_zero
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insn_float64_to_int64_round_to_zero:
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fdtox %f0,%f0
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.global insn_float64_to_float32
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insn_float64_to_float32:
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fdtos %f0,%f0
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.global insn_float64_to_float128
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insn_float64_to_float128:
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fdtoq %f0,%f0
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.global insn_float64_add
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insn_float64_add:
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faddd %f0,%f2,%f0
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.global insn_float64_sub
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insn_float64_sub:
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fsubd %f0,%f2,%f0
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.global insn_float64_mul
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insn_float64_mul:
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fmuld %f0,%f2,%f0
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.global insn_float64_div
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insn_float64_div:
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fdivd %f0,%f2,%f0
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.global insn_float64_sqrt
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insn_float64_sqrt:
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fsqrtd %f0,%f0
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.global insn_float64_cmp
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insn_float64_cmp:
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fcmpd %fcc0,%f0,%f2
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.global insn_float64_cmpe
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insn_float64_cmpe:
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fcmped %fcc0,%f0,%f2
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.global insn_float128_to_int32_round_to_zero
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insn_float128_to_int32_round_to_zero:
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fqtoi %f0,%f0
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.global insn_float128_to_int64_round_to_zero
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insn_float128_to_int64_round_to_zero:
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fqtox %f0,%f0
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.global insn_float128_to_float32
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insn_float128_to_float32:
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fqtos %f0,%f0
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.global insn_float128_to_float64
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insn_float128_to_float64:
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fqtod %f0,%f0
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.global insn_float128_add
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insn_float128_add:
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faddq %f0,%f4,%f0
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.global insn_float128_sub
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insn_float128_sub:
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fsubq %f0,%f4,%f0
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.global insn_float128_mul
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insn_float128_mul:
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fmulq %f0,%f4,%f0
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.global insn_float128_div
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insn_float128_div:
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fdivq %f0,%f4,%f0
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.global insn_float128_sqrt
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insn_float128_sqrt:
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fsqrtq %f0,%f0
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.global insn_float128_cmp
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insn_float128_cmp:
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fcmpq %fcc0,%f0,%f4
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.global insn_float128_cmpe
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insn_float128_cmpe:
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fcmpeq %fcc0,%f0,%f4
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