b8aa843c63
- Split core DRM routines back into their own module, rather than using the nasty templated system like before. - Development-class R300 support in radeon driver (requires userland pieces, of course). - Mach64 driver (haven't tested in a while -- my mach64s no longer fit in the testbox). Covers Rage Pros, Rage Mobility P/M, Rage XL, and some others. - i915 driver files, which just need to get drm_drv.c fixed to allow attachment to the drmsub device. Covers i830 through i915 integrated graphics. - savage driver files, which should require minimal changes to work. Covers the Savage3D, Savage IX/MX, Savage 4, ProSavage. - Support for color and texture tiling and HyperZ features of Radeon. Thanks to: scottl (much p4 handholding) Jung-uk Kim (helpful prodding) PR: [1] kern/76879, [2] kern/72548 Submitted by: [1] Alex, lesha at intercaf dot ru [2] Shaun Jurrens, shaun at shamz dot net
138 lines
4.3 KiB
C
138 lines
4.3 KiB
C
/* mach64_irq.c -- IRQ handling for ATI Mach64 -*- linux-c -*-
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* Created: Tue Feb 25, 2003 by Leif Delgass, based on radeon_irq.c/r128_irq.c
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*
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* Copyright (C) The Weather Channel, Inc. 2002.
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* Copyright 2003 Leif Delgass
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* All Rights Reserved.
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*
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* The Weather Channel (TM) funded Tungsten Graphics to develop the
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* initial release of the Radeon 8500 driver under the XFree86 license.
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* This notice must be preserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*
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* Authors:
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* Keith Whitwell <keith@tungstengraphics.com>
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* Eric Anholt <anholt@FreeBSD.org>
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* Leif Delgass <ldelgass@retinalburn.net>
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*
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* $FreeBSD$
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*/
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#include "dev/drm/drmP.h"
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#include "dev/drm/drm.h"
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#include "dev/drm/mach64_drm.h"
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#include "dev/drm/mach64_drv.h"
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irqreturn_t mach64_driver_irq_handler(DRM_IRQ_ARGS)
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{
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drm_device_t *dev = (drm_device_t *) arg;
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drm_mach64_private_t *dev_priv =
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(drm_mach64_private_t *) dev->dev_private;
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int status;
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status = MACH64_READ(MACH64_CRTC_INT_CNTL);
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/* VBLANK interrupt */
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if (status & MACH64_CRTC_VBLANK_INT) {
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/* Mask off all interrupt ack bits before setting the ack bit, since
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* there may be other handlers outside the DRM.
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*
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* NOTE: On mach64, you need to keep the enable bits set when doing
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* the ack, despite what the docs say about not acking and enabling
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* in a single write.
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*/
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MACH64_WRITE(MACH64_CRTC_INT_CNTL,
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(status & ~MACH64_CRTC_INT_ACKS)
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| MACH64_CRTC_VBLANK_INT);
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atomic_inc(&dev->vbl_received);
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DRM_WAKEUP(&dev->vbl_queue);
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drm_vbl_send_signals(dev);
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return IRQ_HANDLED;
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}
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return IRQ_NONE;
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}
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int mach64_driver_vblank_wait(drm_device_t * dev, unsigned int *sequence)
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{
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unsigned int cur_vblank;
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int ret = 0;
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/* Assume that the user has missed the current sequence number
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* by about a day rather than she wants to wait for years
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* using vertical blanks...
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*/
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DRM_WAIT_ON(ret, dev->vbl_queue, 3 * DRM_HZ,
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(((cur_vblank = atomic_read(&dev->vbl_received))
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- *sequence) <= (1 << 23)));
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*sequence = cur_vblank;
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return ret;
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}
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/* drm_dma.h hooks
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*/
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void mach64_driver_irq_preinstall(drm_device_t * dev)
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{
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drm_mach64_private_t *dev_priv =
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(drm_mach64_private_t *) dev->dev_private;
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u32 status = MACH64_READ(MACH64_CRTC_INT_CNTL);
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DRM_DEBUG("before install CRTC_INT_CTNL: 0x%08x\n", status);
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/* Disable and clear VBLANK interrupt */
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MACH64_WRITE(MACH64_CRTC_INT_CNTL, (status & ~MACH64_CRTC_VBLANK_INT_EN)
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| MACH64_CRTC_VBLANK_INT);
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}
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void mach64_driver_irq_postinstall(drm_device_t * dev)
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{
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drm_mach64_private_t *dev_priv =
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(drm_mach64_private_t *) dev->dev_private;
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/* Turn on VBLANK interrupt */
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MACH64_WRITE(MACH64_CRTC_INT_CNTL, MACH64_READ(MACH64_CRTC_INT_CNTL)
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| MACH64_CRTC_VBLANK_INT_EN);
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DRM_DEBUG("after install CRTC_INT_CTNL: 0x%08x\n",
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MACH64_READ(MACH64_CRTC_INT_CNTL));
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}
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void mach64_driver_irq_uninstall(drm_device_t * dev)
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{
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drm_mach64_private_t *dev_priv =
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(drm_mach64_private_t *) dev->dev_private;
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if (!dev_priv)
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return;
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/* Disable and clear VBLANK interrupt */
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MACH64_WRITE(MACH64_CRTC_INT_CNTL,
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(MACH64_READ(MACH64_CRTC_INT_CNTL) &
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~MACH64_CRTC_VBLANK_INT_EN)
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| MACH64_CRTC_VBLANK_INT);
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DRM_DEBUG("after uninstall CRTC_INT_CTNL: 0x%08x\n",
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MACH64_READ(MACH64_CRTC_INT_CNTL));
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}
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