17885a7bfd
Most relevant features: - netmap emulation on any NIC, even those without native netmap support. On the ixgbe we have measured about 4Mpps/core/queue in this mode, which is still a lot more than with sockets/bpf. - seamless interconnection of VALE switch, NICs and host stack. If you disable accelerations on your NIC (say em0) ifconfig em0 -txcsum -txcsum you can use the VALE switch to connect the NIC and the host stack: vale-ctl -h valeXX:em0 allowing sharing the NIC with other netmap clients. - THE USER API HAS SLIGHTLY CHANGED (head/cur/tail pointers instead of pointers/count as before). This was unavoidable to support, in the future, multiple threads operating on the same rings. Netmap clients require very small source code changes to compile again. On the plus side, the new API should be easier to understand and the internals are a lot simpler. The manual page has been updated extensively to reflect the current features and give some examples. This is the result of work of several people including Giuseppe Lettieri, Vincenzo Maffione, Michio Honda and myself, and has been financially supported by EU projects CHANGE and OPENLAB, from NetApp University Research Fund, NEC, and of course the Universita` di Pisa.
315 lines
9.1 KiB
C
315 lines
9.1 KiB
C
/*
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* Copyright (C) 2011-2014 Universita` di Pisa. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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/*
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* $FreeBSD$
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*
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* Netmap support for igb, partly contributed by Ahmed Kooli
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* For details on netmap support please see ixgbe_netmap.h
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*/
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#include <net/netmap.h>
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#include <sys/selinfo.h>
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#include <vm/vm.h>
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#include <vm/pmap.h> /* vtophys ? */
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#include <dev/netmap/netmap_kern.h>
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/*
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* Adaptation to different versions of the driver.
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*/
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#ifndef IGB_MEDIA_RESET
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/* at the same time as IGB_MEDIA_RESET was defined, the
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* tx buffer descriptor was renamed, so use this to revert
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* back to the old name.
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*/
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#define igb_tx_buf igb_tx_buffer
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#endif
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/*
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* Register/unregister. We are already under netmap lock.
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*/
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static int
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igb_netmap_reg(struct netmap_adapter *na, int onoff)
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{
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struct ifnet *ifp = na->ifp;
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struct adapter *adapter = ifp->if_softc;
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IGB_CORE_LOCK(adapter);
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igb_disable_intr(adapter);
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/* Tell the stack that the interface is no longer active */
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ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE);
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/* enable or disable flags and callbacks in na and ifp */
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if (onoff) {
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nm_set_native_flags(na);
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} else {
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nm_clear_native_flags(na);
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}
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igb_init_locked(adapter); /* also enable intr */
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IGB_CORE_UNLOCK(adapter);
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return (ifp->if_drv_flags & IFF_DRV_RUNNING ? 0 : 1);
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}
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/*
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* Reconcile kernel and user view of the transmit ring.
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*/
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static int
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igb_netmap_txsync(struct netmap_adapter *na, u_int ring_nr, int flags)
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{
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struct ifnet *ifp = na->ifp;
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struct netmap_kring *kring = &na->tx_rings[ring_nr];
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struct netmap_ring *ring = kring->ring;
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u_int nm_i; /* index into the netmap ring */
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u_int nic_i; /* index into the NIC ring */
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u_int n;
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u_int const lim = kring->nkr_num_slots - 1;
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u_int const head = kring->rhead;
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/* generate an interrupt approximately every half ring */
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u_int report_frequency = kring->nkr_num_slots >> 1;
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/* device-specific */
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struct adapter *adapter = ifp->if_softc;
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struct tx_ring *txr = &adapter->tx_rings[ring_nr];
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/* 82575 needs the queue index added */
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u32 olinfo_status =
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(adapter->hw.mac.type == e1000_82575) ? (txr->me << 4) : 0;
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bus_dmamap_sync(txr->txdma.dma_tag, txr->txdma.dma_map,
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BUS_DMASYNC_POSTREAD);
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/*
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* First part: process new packets to send.
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*/
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nm_i = kring->nr_hwcur;
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if (nm_i != head) { /* we have new packets to send */
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nic_i = netmap_idx_k2n(kring, nm_i);
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for (n = 0; nm_i != head; n++) {
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struct netmap_slot *slot = &ring->slot[nm_i];
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u_int len = slot->len;
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uint64_t paddr;
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void *addr = PNMB(slot, &paddr);
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/* device-specific */
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union e1000_adv_tx_desc *curr =
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(union e1000_adv_tx_desc *)&txr->tx_base[nic_i];
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struct igb_tx_buf *txbuf = &txr->tx_buffers[nic_i];
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int flags = (slot->flags & NS_REPORT ||
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nic_i == 0 || nic_i == report_frequency) ?
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E1000_ADVTXD_DCMD_RS : 0;
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NM_CHECK_ADDR_LEN(addr, len);
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if (slot->flags & NS_BUF_CHANGED) {
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/* buffer has changed, reload map */
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netmap_reload_map(txr->txtag, txbuf->map, addr);
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}
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slot->flags &= ~(NS_REPORT | NS_BUF_CHANGED);
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/* Fill the slot in the NIC ring. */
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curr->read.buffer_addr = htole64(paddr);
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// XXX check olinfo and cmd_type_len
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curr->read.olinfo_status =
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htole32(olinfo_status |
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(len<< E1000_ADVTXD_PAYLEN_SHIFT));
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curr->read.cmd_type_len =
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htole32(len | E1000_ADVTXD_DTYP_DATA |
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E1000_ADVTXD_DCMD_IFCS |
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E1000_ADVTXD_DCMD_DEXT |
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E1000_ADVTXD_DCMD_EOP | flags);
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/* make sure changes to the buffer are synced */
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bus_dmamap_sync(txr->txtag, txbuf->map,
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BUS_DMASYNC_PREWRITE);
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nm_i = nm_next(nm_i, lim);
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nic_i = nm_next(nic_i, lim);
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}
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kring->nr_hwcur = head;
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/* Set the watchdog XXX ? */
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txr->queue_status = IGB_QUEUE_WORKING;
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txr->watchdog_time = ticks;
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/* synchronize the NIC ring */
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bus_dmamap_sync(txr->txdma.dma_tag, txr->txdma.dma_map,
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BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
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/* (re)start the tx unit up to slot nic_i (excluded) */
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E1000_WRITE_REG(&adapter->hw, E1000_TDT(txr->me), nic_i);
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}
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/*
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* Second part: reclaim buffers for completed transmissions.
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*/
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if (flags & NAF_FORCE_RECLAIM || nm_kr_txempty(kring)) {
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/* record completed transmissions using TDH */
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nic_i = E1000_READ_REG(&adapter->hw, E1000_TDH(ring_nr));
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if (nic_i >= kring->nkr_num_slots) { /* XXX can it happen ? */
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D("TDH wrap %d", nic_i);
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nic_i -= kring->nkr_num_slots;
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}
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txr->next_to_clean = nic_i;
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kring->nr_hwtail = nm_prev(netmap_idx_n2k(kring, nic_i), lim);
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}
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nm_txsync_finalize(kring);
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return 0;
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}
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/*
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* Reconcile kernel and user view of the receive ring.
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*/
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static int
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igb_netmap_rxsync(struct netmap_adapter *na, u_int ring_nr, int flags)
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{
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struct ifnet *ifp = na->ifp;
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struct netmap_kring *kring = &na->rx_rings[ring_nr];
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struct netmap_ring *ring = kring->ring;
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u_int nm_i; /* index into the netmap ring */
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u_int nic_i; /* index into the NIC ring */
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u_int n;
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u_int const lim = kring->nkr_num_slots - 1;
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u_int const head = nm_rxsync_prologue(kring);
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int force_update = (flags & NAF_FORCE_READ) || kring->nr_kflags & NKR_PENDINTR;
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/* device-specific */
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struct adapter *adapter = ifp->if_softc;
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struct rx_ring *rxr = &adapter->rx_rings[ring_nr];
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if (head > lim)
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return netmap_ring_reinit(kring);
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/* XXX check sync modes */
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bus_dmamap_sync(rxr->rxdma.dma_tag, rxr->rxdma.dma_map,
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BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
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/*
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* First part: import newly received packets.
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*/
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if (netmap_no_pendintr || force_update) {
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uint16_t slot_flags = kring->nkr_slot_flags;
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nic_i = rxr->next_to_check;
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nm_i = netmap_idx_n2k(kring, nic_i);
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for (n = 0; ; n++) {
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union e1000_adv_rx_desc *curr = &rxr->rx_base[nic_i];
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uint32_t staterr = le32toh(curr->wb.upper.status_error);
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if ((staterr & E1000_RXD_STAT_DD) == 0)
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break;
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ring->slot[nm_i].len = le16toh(curr->wb.upper.length);
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ring->slot[nm_i].flags = slot_flags;
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bus_dmamap_sync(rxr->ptag,
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rxr->rx_buffers[nic_i].pmap, BUS_DMASYNC_POSTREAD);
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nm_i = nm_next(nm_i, lim);
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nic_i = nm_next(nic_i, lim);
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}
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if (n) { /* update the state variables */
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rxr->next_to_check = nic_i;
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kring->nr_hwtail = nm_i;
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}
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kring->nr_kflags &= ~NKR_PENDINTR;
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}
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/*
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* Second part: skip past packets that userspace has released.
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*/
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nm_i = kring->nr_hwcur;
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if (nm_i != head) {
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nic_i = netmap_idx_k2n(kring, nm_i);
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for (n = 0; nm_i != head; n++) {
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struct netmap_slot *slot = &ring->slot[nm_i];
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uint64_t paddr;
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void *addr = PNMB(slot, &paddr);
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union e1000_adv_rx_desc *curr = &rxr->rx_base[nic_i];
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struct igb_rx_buf *rxbuf = &rxr->rx_buffers[nic_i];
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if (addr == netmap_buffer_base) /* bad buf */
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goto ring_reset;
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if (slot->flags & NS_BUF_CHANGED) {
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/* buffer has changed, reload map */
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netmap_reload_map(rxr->ptag, rxbuf->pmap, addr);
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slot->flags &= ~NS_BUF_CHANGED;
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}
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curr->wb.upper.status_error = 0;
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curr->read.pkt_addr = htole64(paddr);
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bus_dmamap_sync(rxr->ptag, rxbuf->pmap,
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BUS_DMASYNC_PREREAD);
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nm_i = nm_next(nm_i, lim);
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nic_i = nm_next(nic_i, lim);
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}
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kring->nr_hwcur = head;
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bus_dmamap_sync(rxr->rxdma.dma_tag, rxr->rxdma.dma_map,
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BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
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/*
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* IMPORTANT: we must leave one free slot in the ring,
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* so move nic_i back by one unit
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*/
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nic_i = nm_prev(nic_i, lim);
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E1000_WRITE_REG(&adapter->hw, E1000_RDT(rxr->me), nic_i);
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}
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/* tell userspace that there might be new packets */
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nm_rxsync_finalize(kring);
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return 0;
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ring_reset:
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return netmap_ring_reinit(kring);
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}
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static void
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igb_netmap_attach(struct adapter *adapter)
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{
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struct netmap_adapter na;
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bzero(&na, sizeof(na));
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na.ifp = adapter->ifp;
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na.na_flags = NAF_BDG_MAYSLEEP;
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na.num_tx_desc = adapter->num_tx_desc;
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na.num_rx_desc = adapter->num_rx_desc;
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na.nm_txsync = igb_netmap_txsync;
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na.nm_rxsync = igb_netmap_rxsync;
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na.nm_register = igb_netmap_reg;
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na.num_tx_rings = na.num_rx_rings = adapter->num_queues;
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netmap_attach(&na);
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}
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/* end of file */
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